Abstract: The embodiments described herein include amplifiers that are typically used in radio frequency (RF) applications. The amplifiers described herein use a combiner that is implemented inside the device package. Specifically, the amplifiers can be implemented with a combiner that includes a transmission line inside the device package, where the transmission line has a length between first and second ends configured to provide an impedance inverter between the outputs (e.g., drain terminals) of transistors in the amplifier.

Abstract: A method for selecting at least one device to be controlled by a radio frequency (RF) controller device is described. The method comprising arranging a plurality of controllable devices into a plurality of groups; determining at least one link quality value for at least one device associated with the plurality of groups; calculating a proximity factor for the plurality of groups of controllable devices based at least partly on the determined at least one link quality value; comparing proximity factors for the plurality of groups of and selecting the group of controllable devices comprising a favorable proximity factor to be controlled by the RF controller device.

Abstract: Protection circuits, device structures and related fabrication methods are provided. An exemplary protection circuit includes a first protection arrangement and a second protection arrangement. The first protection arrangement includes a first transistor having a first collector, a first emitter, and a first base coupled to the first emitter at a first node, and a second transistor having a second collector, a second emitter, and a second base coupled to the second emitter at a second node, the second collector being coupled to the first collector at a third node. The second protection arrangement is coupled electrically in series between the second node and a fourth node. The protection circuit further includes a first diode coupled between the third node and the fourth node.

Abstract: An overcurrent protection device comprises a maximum-allowed-current unit and a power switch. The maximum-allowed-current unit determines a maximum allowed current in real-time. The maximum allowed current is determined at least partially on an instantaneous level of a load voltage. The load voltage is a voltage across a load to be powered. The power switch is connectable with a switch input to a voltage supply and with a switch output to the load, for providing power to said load. The power switch has a conductive state and a nonconductive state, and is arranged to assume the nonconductive state in response to an indication that a current through the power switch is exceeding the maximum allowed current. A method of operating a power switch is also described.

Abstract: A radio frequency coupling structure is arranged to couple a radio frequency signal between a first side of the radio frequency coupling structure to a second side of the radio frequency coupling structure opposite to the first side. The radio frequency coupling structure comprises a dielectric layer, a first electrically conductive layer comprising a first transition structure, a second electrically conductive layer comprising a second transition structure, and an integrated waveguide structure formed by an array of electrically conductive vias extending through the dielectric layer from the first to the second electrically conductive layer to enclose a portion of the dielectric layer. The portion is arranged to guide the radio frequency signal between the first transition structure and the second transition structure.

Abstract: A data tag containing self-descriptive data, a method for reading such a data tag and a system for interpreting such a data tag are disclosed. Characterizing information about a first data element stored in a memory of the data tag is stored in a first header preceding a first data element. In addition, characterizing information about a second data element stored in the memory of the data tag is stored in a second header preceding a second data element. The application of a multitude of descriptive headers, each characterizing a data element stored in the data tag memory, facilitates flexible data storage on such devices. Furthermore, it also facilitates data compression due to the fact that field lengths can be characterized as well, thus excluding the presence of redundant bits in the data stored in the memory.

Abstract: Various exemplary embodiments relate to a radar device for detecting objects that intersect an area, the device including a mount attachment; a radar sensor; an output interface; a memory storing one or more environment parameters; a processor in communication with the radar sensor, the output interface, and the memory, the processor being configured to: receive, from the radar sensor, signal information; retrieve, from the memory, environment parameters; calculate, based on the signal information, the distance relative to the sensor of one or more objects; calculate an area based on at least one of the environment parameters; and determine that at least one of the one or more objects intersect the area.

Abstract: A method of managing a thermal budget, for at least a part of a processing system, is described. The method comprises, upon detection of a use case event, determining a thermal budget violation time window for a current use case scenario of the at least part of the processing system, and managing the thermal budget for the at least part of the processing system based at least partly on the determined thermal budget violation time window.

Abstract: An electronic device includes a wiring board having one or more layers, an integrated circuit arranged on the wiring board, an antenna, and a signal path. The integrated circuit generates a high frequency signal and feeds it to the signal path. The signal path conveys the high frequency signal to the antenna. The antenna emits the high frequency signal into an environment of the electronic device. Alternatively or in addition, the antenna receives the high frequency signal from the environment and feeds it to the signal path. The signal path conveys the high frequency signal to the integrated circuit. The integrated circuit processes the high frequency signal. The signal path includes a wave guide that traverses one or more of the layers of the wiring board.

Abstract: The present application relates to a pulse generator for energizing an ultrasonic transducer, a method of operating thereof and an ultrasonic distance sensing system comprising the pulse generator. The pulse generator is arranged to generate an excitation pulse sequence comprising a first number of pulses; to generate a cancellation pulse sequence comprising at least a fractional pulse, wherein the cancellation pulse sequence has a phase shift of about 180° in relation to the excitation pulse sequence; and to output at an output of the generator the excitation pulse sequence and the cancellation pulse sequence forming an energizing pulse sequence to the ultrasonic transducer.

Abstract: An RF receiver comprising: an RF signal processing unit for receiving an RF signal, wherein the RF signal processing unit comprises a dynamically reconfigurable RF filter for filtering the RF signal; an analog-to-digital converter for converting the filtered RF signal to a digital signal; and a digital signal processing unit for processing the digital signal to provide at least one channel; wherein the digital signal processing unit is adapted to adjust a respective transfer function of at least one said channel when the RF filter is reconfigured, to at least partially compensate a change in the transfer function of the RF filter.

Abstract: A memory device has first and second memory cells in and over a substrate. A first doped region is in a first active region. A top surface of the first active region is substantially coplanar with a top surface of the first doped region. A control gate is over the first doped region and extends over a first side of the first doped region and over a second side of the first doped region. A charge storage layer is between the first control gate and the first active region including between the first select gate and the first doped region. A first select gate is over the first active region on the first side of the first doped region and adjacent to the control gate. A second select gate is over the first active region on the second side of the first doped region and adjacent to the control gate.

Abstract: A high side driver component for generating a drive signal at an output thereof for driving a high side switching device within a high voltage driver circuit. The high side driver component is arranged to operate in at least one reduced slew rate mode in which at least one drive stages is arranged to be in a non-drive state, and the high side driver component further comprises at least one discharge protection component arranged to, when the high side driver component is operating in the at least one reduced slew rate mode, receive an indication of the high voltage driver circuit being in an idle state, and cause the second switching device within the at least one drive stage in a non-drive state to be turned on, in response to the indication of the high voltage driver circuit being in an idle state.

Abstract: A charge pump comprises one or more pump stages for providing a negative boosted output voltage. Each of the one or more pump stages comprises a P-channel transistor formed in an isolated P-well and an N-channel transistor coupled in series with the P-channel transistor. Forming the P-channel transistor in the isolated P-well essentially eliminates a raised threshold voltage due to body effect.

Abstract: A method provides access to an integrated circuit which may comprise a storage containing an unalterable first security key and a memory containing a second security key. The method may comprise: checking the second security key by comparing the first security key and the second security key, if the second security key is valid, providing access to the integrated circuit, optionally depending on the validity of an access key, and if the second security key is invalid, enabling erasing the memory, and storing in the memory a new second security key which corresponds to the first security key. Erasing the memory may be followed by checking the erasing for completeness.

Abstract: Integrated circuits (1) on a wafer comprise a wafer substrate (2) and a plurality of integrated circuits (Ia, Ib, Ic) formed on the wafer substrate (2). Each integrated circuit (Ia, Ib, Ic) comprises an electric circuit (24) and some of the integrated circuits (Ib, Ic) comprise, in addition to their electric circuits (24), process control modules (3) as integral parts. The process control modules (3) are employed during dicing and pick-and-place to align the dicing/pick-and-place devices.

Abstract: Embodiments of a current mirror for a constant-current light-emitting diode (LED) driver system and a constant-current LED driver integrated circuit (IC) device having the current mirror are described. In one embodiment, a current mirror includes at least one current mirror cell. Each of the at least one current mirror cell includes semiconductor circuits configured to generate an output current based on a reference current and a control module configured to alternately and continuously charge the semiconductor circuits in response to non-overlapping clock signals.

Abstract: A data sampler circuit comprises a transconductance amplifier, a latch circuit, a current-to-voltage converter, and a negative resistance circuit. The transconductance amplifier has an input and an output. The latch circuit is coupled to the output of the transconductance amplifier. The current-to-voltage converter has an input coupled to the output of the transconductance amplifier, and an output for providing a feedback signal to the latch circuit. The negative resistance circuit is coupled to the output of the transconductance amplifier and provides equalization during both a sampling mode and a data latching mode. In one embodiment, the negative resistance circuit comprises a pair of cross-coupled transistors. A gain of the negative resistance circuit can be adjusted based on a pulse width of an input signal.

Abstract: A controller for a switched mode power converter is disclosed, the switched mode power converter comprising a transformer defining a primary side circuit and a secondary side circuit, the primary side circuit comprising a primary switch, the secondary side circuit comprising a synchronous rectification switch, the controller comprising: a baseline off-set circuit configured to provide a baseline timing off-set between opening the synchronous rectification switch and closing the primary switch; a peak current detector configured to detect a peak negative current in the secondary side circuit; and a feedback circuit configured to add an off-set adaptation to the baseline timing off-set to provide an adapted timing off-set, wherein the feedback circuit is configured to adjust the off-set adaptation to minimize the negative peak current. A switched mode power converter and electronic equipment using such a controller is also disclose, as is a method for controlling a switch mode power converter.

Abstract: Mobile devices such as mobile phones have always-on modes using sensors which respond to changes in the environment. A mobile device is described comprising a loudspeaker; a controller having an input coupled to the loudspeaker. The controller is operable in a first mode of operation to detect an electrical signal generated by the loudspeaker in response to an acoustic input signal. This signal can be used to activate further circuitry. Using a loudspeaker as an acoustic sensor may reduce the power consumption of the mobile device.