Abstract: An electrostatic discharge (ESD) device is disclosed having two PNP transistors. During a high-voltage ESD event a parasitic NPN transistor couples to one of the two PNP transistors to provide ESD protection.

Abstract: Microelectromechanical system (MEMS) devices and methods for forming MEMS devices are provided. The MEMS devices include a substrate, an anchored structure fixedly coupled to the substrate, and a movable structure resiliently coupled to the substrate. The movable structure has an opening formed therethrough and is positioned such that the anchored structure is at least partially within the opening and is in a capacitor-forming relationship with the movable structure. The movable structure comprises a movable structure finger extending only partially across the opening.

Abstract: Embodiments of a device and method are disclosed. A controller area network (CAN) device includes a compare module configured to interface with a CAN transceiver, the compare module having a receive data (RXD) interface configured to receive data from the CAN transceiver, a CAN decoder configured to decode an identifier of a CAN message received from the RXD interface, and an identifier memory configured to store an entry that corresponds to at least one identifier, and compare logic configured to compare a received identifier from a CAN message to the entry that is stored in the identifier memory and to output a match signal when the comparison indicates that the received identifier of the CAN message matches the entry that is stored at the CAN device. The CAN device also includes a signal generator configured to output, in response to the match signal, a signal to invalidate the CAN message.

Abstract: Embodiments of a device and method are disclosed. In an embodiment, a method for controlling CAN traffic is disclosed. The method for controlling CAN traffic involves decoding bits of an identifier of a CAN message from a TXD path, obtaining a weighted value using the decoded bits of the identifier, adding the weighted value to a running weighted value for received CAN messages, and throttling transmission of CAN messages via the TXD path if the running weighted value exceeds a pre-established threshold.

Abstract: A processor system is adapted to carry out a predicate swap instruction of an instruction set to swap, via a data pathway, predicate data in a first predicate data location of a predicate register with data in a corresponding additional predicate data location of a first additional predicate data container and to swap, via a data pathway, predicate data in a second predicate storage location of the predicate register with data in a corresponding additional predicate data location in a second additional predicate data container.

Abstract: An isolation circuit arranged to provide electrical isolation between at least one control module and at least one driver module. The isolation circuit comprises at least one boost circuit arranged to receive at least one control signal from the at least one control module, and boost the at least one control signal from a first voltage level signal to an increased voltage level signal. The isolation circuit further comprising at least a first capacitive isolation component comprising a first electrically conductive element and at least one further electrically conductive element formed from at least a part of printed circuit board layer, the first and at least one further electrically conductive elements being electrically isolated with respect to one another and arranged to comprise capacitive characteristics there between.

Abstract: Communications between a base station and a transponder that is powered by the base station are effected using a signal differentiation approach. A first radio frequency signal is communicated between the base station and the transponder to power the transponder, with the first radio frequency signal including noise and data for authenticating communications between the base station and the transponder. A second radio frequency signal is communicated between the base station and the transponder, with the second radio frequency signal including data for authenticating communications between the base station and the transponder. The detection of noise presented via the first radio frequency signal is mitigated while detecting data in the second radio frequency signal, via signal differentiation.

Abstract: A method for granting trusted applications (SP1_WL) of a Service Provider (SP1, SP2)access to applications (appSP1.1, appSP1.2; appSP2.1) of that Service Provider (SP1, SP2) that have been stored in a secure element (SE) comprises: the Service Provider (SP1, SP2) transmits a request (REQ1) for granting access to its applications to a Trusted Service Manager (TSM); the Trusted Service Manager (TSM) generates an access right code (AC1) and transmits it to both the Service Provider (SP1, SP2) and a service manager (SM) in the secure element (SE); the Service Provider (SP1, SP2) generates the trusted application (SP1_WL), provides it with the access right code (AC1) and sends it to the secure element (SE); the trusted application (SP1_WL) connects to the service manager (SM) with the access right code (AC1) whereupon the service manager (SM) grants the wallet (SP1_WL) access to the applications (appSP1.1, appSP1.2; appSP2.1).

Abstract: In an NFC mobile communication device (3) an operating system, such as a JAVA operating system (J2ME), is able to start software applications (6) identifiable by application identifications (AID). The mobile communication device (3) is equipped with a secure memory device (2), e.g. configured as a SmartMX card, which comprises a first memory portion (2a) configured as a MIFARE memory. The mobile communication device (3) comprises NFC means (5) adapted to trigger a hardware interruption (INT), when the first memory portion (2a) has been accessed by an external RFID reader (1). The hardware interruption (INT) is detected by the operating system (J2ME) and causes it to access a pre-defined sector (S) of the first memory portion (2a), to read information from said sector (S) which is representative for an application identification (AID) and to start the software applications (6) associated to it.

Abstract: An audio system is described including an audio processor, an amplifier and a speaker and a distortion estimator. The distortion estimator calculates at least one of an expected response of the amplifier to an audio signal and an expected response of the loudspeaker to an audio signal. The distortion estimator is operable to generate a distortion prediction signal determined by a difference between an expected non-linear response of at least one of the loudspeaker and the amplifier and an expected linear response of at least one of the loudspeaker and the amplifier. A controller coupled to the audio processor and a control input of the audio processor may vary the operating parameters of the audio processor depending on the estimated distortion.

Abstract: There is provided a lateral flow immunoassay test device. The test device comprises a test strip. The test strip comprises a test membrane having a translucent section including a control zone and a test zone. The device is adapted to house the test strip such that at least the translucent section is exposable to ambient light. The device comprises a backing structure for backing the test strip which comprises a first optical detector for detecting ambient light which has passed through the test zone, and a second optical detector for detecting ambient light which has passed through the translucent section in a further zone outside of the test and control zones. Using the detector outputs an amount of analyte in a test liquid may be calculated.

Abstract: One example discloses an inductive power supply device, comprises: an inductive coupler including a resonant circuit having a first resonant state in response to an object at a first distance from the inductive power supply, and a second resonant state in response to the object at a second distance from the inductive power supply; a driver circuit coupled to send a first power-level to the inductive coupler when in a charge-object state and to send a second power-level to the inductive coupler when in a detect-object state, wherein the second power-level is less than the first power-level; and an object detector coupled to detect the first and second resonant states and place the driver circuit in the charge-object state in response to the first resonant state, and place the driver circuit in the detect-object state in response to the second resonant state.

Abstract: Various embodiments relate to an in-cell battery management device including: an integrated circuit (IC) including a controller, a resistive balancer, a voltage sensor, and a pressure sensor; and an IC package that encloses the IC having a hole over the pressure sensor wherein the hole allows the pressure sensor to measure pressure in a battery cell; wherein the IC package is contact with the battery cell.

Abstract: A method of calculating at least one delay timing value for at least one setup timing stage within an integrated circuit design includes applying Negative/Positive Bias Temperature Instability (N/PBTI) compensation margins to delay values for elements within the at least one setup timing stage, and calculating the at least one delay timing value for the at least one setup timing stage based at least partly on the N/PBTI compensation margins applied to the delay values. The method further includes identifying at least partially equivalent elements within the parallel timing paths of the at least one setup timing stage, and applying reduced N/PBTI compensation margins to delay values for the identified at least partially equivalent elements within parallel timing paths of the at least one setup timing stage.

Abstract: A semiconductor device package includes an isolation wall located between a first circuit and a second circuit on a substrate. The isolation wall is configured to reduce inductive coupling between the first and second circuits during operation of the semiconductor device. Encapsulation material covers the substrate, first and second circuits, and the isolation wall. The isolation wall has features, such as indentation, along its upper edge that facilitate a flow of the encapsulation material across the isolation wall during fabrication to largely eliminate interior defects and/or visual defects on the surface of the completed semiconductor device package. For a dual-path amplifier, such as a Doherty power amplifier, the isolation wall separates the carrier amplifier elements from the peaking amplifier elements included within the semiconductor device package.

Abstract: Embodiments include methods of forming a semiconductor device having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a source region of the first conductivity type, and the diode circuit is connected between the isolation structure and the source region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).

Abstract: Embodiments of a sensor device include a sensor substrate and a first cap substrate attached to the sensor substrate with a first bond material. The first bond material is arranged to define a first device cavity. A second cap substrate is attached to the sensor substrate with a second bond material. The second bond material is arranged to define a second device cavity. The second bond material has a lower bonding temperature than the first bond material. The second cap substrate is further secured to the sensor substrate by an adhesive material disposed between the sensor substrate and the second cap substrate.

Abstract: Fan-Out Wafer Level Packages (FO-WLPs) and methods for fabricating FO-WLPs containing Embedded Ground Planes (EGPs) and backside EGP interconnect structures are provided. In one embodiment, the method includes electrically coupling an EGP to a backside terminal of a first microelectronic device through a backside EGP interconnect structure. A molded package body is formed around the first microelectronic device, the EGP, and the EGP interconnect structure. The molded package body has a frontside at which the EGP is exposed. One or more Redistribution Layers are formed over the frontside of the molded packaged body and contain at least one interconnect line electrically coupled to the backside contact through the EGP and the backside EGP interconnect structure.

Abstract: A multi-partition networking device comprising a primary partition running on a first set of hardware resources and a secondary partition running on a further set of hardware resources. The multi-partition networking device is arranged to operate in a first operating state, whereby the first set of hardware resources are in an active state and the primary partition is arranged to process network traffic, and the further set of hardware resources are in a standby state. The multi-partition networking device is further arranged to transition to a second operating state upon detection of a suspicious condition within the primary partition, whereby the further set of hardware resources are transitioned from a standby state to an active state, and to transition to a third operating state upon detection of a failure condition within the primary partition, whereby processing of network traffic is transferred to the secondary partition.

Abstract: A memory circuit includes a first bit line, a second bit line, and a memory cell that is coupled to first bit line and the second bit line. The memory cell includes a capacitor, a first pass gate transistor, a non-volatile (NV) element, and a second pass gate transistor. The first capacitor has a first terminal coupled to a first storage node and a second terminal coupled to a reference. The first pass gate transistor is coupled between the first bit line and the first storage node. The NV element and a second pass gate transistor are coupled in series, wherein the first NV element and the second pass gate transistor are coupled between the first storage node and the first program line.