Abstract: Consistent with an example embodiment, a System on Chip (SoC) device operates in millimeter wave frequencies. The SoC device comprises, a silicon device having at least one differential pair pad, the at least one differential pair pad having a shunt inductor coupled thereon. A parasitic capacitance on at least one differential pair pads is tuned out by resonance of the shunt inductor. A package has a redistribution layer (RDL), with an array of contact areas to which the silicon device is mounted and then encapsulated. A connection corresponds to the at least one differential pair pad and the connection is located about an outer row or column of the array of contact areas.

Abstract: A method for setting one or more breakpoints within executable program code of an embedded device is described. The method comprises copying at least one area of non-volatile memory (NVM) of the embedded device, comprising at least one instruction at which a breakpoint is to be set, into at least one area of overlay memory replacing within the overlay memory the at least one instruction at which a breakpoint is to be set with a breakpoint operation code, and enabling a mapping of the at least one area of NVM, comprising the at least one instruction at which a breakpoint is to be set, to the at least one area of overlay memory during execution of the program code within the embedded device.

Abstract: A memory device has an SRAM that stores a logic state. A first MTJ has two terminals. A second one of the terminals is coupled to a storing node. A first terminal of a second MTJ is coupled to the storing node. The first and second MTJs are programmed to a first resistance by flowing current from the first second terminals and to a second resistance by flowing current from the second to first terminal. A storing circuit is coupled to the storing node, the SRAM cell, and a non-volatile word line. The storing circuit couples the logic state of the SRAM cell to the storing node during a store mode. The logic state of the SRAM cell is stored in the first and second MTJs by applying a storing voltage between the first terminal of the first MTJ and the second terminal of the second MTJ of a first polarity then a second polarity.

Abstract: A decoder unit for determining a substance or material structure of a detected object based on signals of a capacitive sensor comprises a distribution determination device arranged to determine a detected distribution relation based on signals of the at least one capacitive sensor; a comparison device arranged to compare the detected distribution relation with at least one predetermined distribution relation, the at least one predetermined distribution relation corresponding to a substance or a material structure and an output device arranged to indicate the result of the comparison carried out by the comparison device.

Abstract: A method for a video recording and editing application analyses the audio and video during the process of video recording using a smart device such as a smartphone or tablet. The method provides feedback to the user during the video recording to improve user performance and reduce video and audio user errors. The method includes the option of automatic skipping or editing of video segments that suffer from user errors during playback.

Abstract: The use of a data link between two or more smart devices for voice communication allows for the enhancement of voice quality in a collaborative way through the exchange of well-defined meta-data between the smart devices. The meta-data may be exchanged on a separate IP data link or as part of the exchanged voice data packets.

Abstract: Disclosed is an antenna apparatus including a radio frequency (RF) antenna, a magnetic induction (MI) antenna disposed within the RF antenna, and electronic circuitry to receive and process audio received from at least one of the RF antenna and MI antenna.

Abstract: A MEMS device (40) includes a base structure (42) and a microstructure (44) suspended above the structure (42). The base structure (42) includes an oxide layer (50) formed on a substrate (48), a structural layer (54) formed on the oxide layer (50), and an insulating layer (56) formed over the structural layer (54). A sacrificial layer (112) is formed overlying the base structure (42), and the microstructure (44) is formed in another structural layer (116) over the sacrificial layer (112). Methodology (90) entails removing the sacrificial layer (112) and a portion of the oxide layer (50) to release the microstructure (44) and to expose a top surface (52) of the substrate (48). Following removal, a width (86) of a gap (80) produced between the microstructure (44) and the top surface (52) is greater than a width (88) of a gap (84) produced between the microstructure (44) and the structural layer (54).

Abstract: Various aspects of the present disclosure are directed to monitoring battery cells. In accordance with various embodiments, a battery pack having a plurality of battery cells connected in series is monitored. Current is separately injected into individual ones of the plurality of battery cells, such as by operating a balancing circuit coupled across an individual cell, to inject current (e.g., positive or negative) into the cell. For each of the battery cells, an output is provided to indicate cell voltage of the battery cell responsive to the current injected therein. An output indicative of current through each of the battery cells is provided as well. From the respective outputs as corresponding to each individual cell, amplitude and phase characteristics of the current and voltage outputs for each of the cells are extracted to provide an indication of an impedance characteristic of the cell(s).

Abstract: A control signal is generated for mechanical loudspeaker protection, or for other signal pre-processing functions. The procedure contains the following steps: perform a non-linearity analysis based on current and voltage measurements; use the results of the non-linearity analysis, and the voltage and current measurements to control audio processing for the loudspeaker thereby to implement loudspeaker protection and/or acoustic signal processing.

Abstract: A semiconductor device comprising a bipolar transistor and a method of making the same. A power amplifier including a bipolar transistor. The bipolar transistor includes a collector including a laterally extending drift region. The also includes a base located above the collector. The bipolar transistor further includes an emitter located above the base. The bipolar transistor also includes a doped region having a conductivity type that is different to that of the collector. The doped region extends laterally beneath the collector to form a junction at a region of contact between the doped region and the collector. The doped region has a non-uniform lateral doping profile. A doping level of the doped region is highest in a part of the doped region closest to a collector-base junction of the bipolar transistor.

Abstract: Embodiments of a driver circuit for a power stage of a class-D amplifier and a class-D amplifier are described. In one embodiment, a driver circuit for a power stage of a class-D amplifier includes serially connected transistor devices connected to a gate terminal of a power transistor of the power stage of the class-D amplifier, a voltage generator connected between a gate terminal of a first transistor device of the serially connected transistor devices and a source terminal of the power transistor, and a current multiplier connected between the gate terminal of the power transistor and one of a source terminal and a drain terminal of the first transistor device. The current multiplier is configured to produce an output current that is proportional to a current at the one of the source terminal and the drain terminal of the first transistor device.

Abstract: The invention provides an antenna which has two feed ports and two conductor areas. Where the two areas face each other, there is a set of interdigitated arms and slots. These define a shape with two open slots (one on each side) extending from the two feed points, and a central closed slot.

Abstract: A dual band transmitter for transmitting a data signal in a first frequency or second frequency band. An antenna receives and sends data in one of the first and second frequency bands. An impedance matching network is connected in series with the antenna, and to a first node, and matches the impedance of the antenna to a predetermined value. The impedance matching network includes first and second antenna matching networks. The first antenna matching network is connected in series with the second matching network. In the first frequency band, the first antenna matching network matches the impedance of the antenna to the predetermined value, and in the second frequency band the second antenna matching network matches the impedance of the antenna to the predetermined value without affecting the first antenna matching network's matching in the first frequency band.

Abstract: A single tone RF signal generator and a method of generating a single tone RF signal. The single tone RF signal generator includes an output and a power amplifier that has an input. The power amplifier is operable to receive an RF signal including a first harmonic corresponding to a single tone signal to be produced by the signal generator. The power amplifier is also operable to amplify the RF signal. The power amplifier is further operable to provide the amplified RF signal to the output of the signal generator. The single tone RF signal generator further includes a feedback circuit connected between the output of the signal generator and the input of the power amplifier. The feedback circuit is configured to add one or more predistortion harmonics to the RF signal received by the power amplifier for cancelling harmonics in the amplified RF signal provided by the power amplifier.

Abstract: Aspects of the present disclosure are directed to circuits, apparatuses, and methods for power management. According to an example embodiment, an apparatus includes a low drop-out (LDO) voltage-regulation circuit configured to generate a regulated voltage from a voltage provided to a supply terminal of the LDO voltage-regulation circuit. The apparatus also includes switching circuitry coupled to the LDO voltage-regulation circuit and to a plurality of voltage sources. The voltage sources include at least power line carried along with a data bus and another voltage source. Each of the plurality of voltage sources provides a respectively different voltage range. The switching circuitry is configured, in response to a power-related condition of the plurality of voltage sources and while maintaining power to the LDO voltage-regulation circuit, to select and couple one of the voltage sources to the supply terminal and uncouple other ones of voltage sources from the supply terminal.

Abstract: Embodiments of a system and method are disclosed. One embodiment is an I2C compatible device. The I2C compatible device includes an SDA interface for connection to an SDA line and a single-line I2C module configured to transmit a sync word from the SDA interface over the SDA line and following the sync word, to transmit I2C data from the SDA interface over the SDA line such that digital data is communicated via a single line. In an embodiment, the sync word is a sync byte+NACK.

Abstract: A processing system includes a processor and a temperature security module coupled to provide a temperature tamper signal to the processor. The temperature security module includes a shelf mode trim value, an operating mode trim value, and a programmable temperature trim value. One of the programmable temperature trim value, the shelf mode trim value, and the operating mode trim value, is used based on a deployment mode of the processing system to set a temperature monitor trim value.

Abstract: A semiconductor die is disclosed comprising a lateral semiconductor device on an upper major surface of a substrate, the integrated circuit comprising a silicon layer over the substrate, a recess in the silicon layer, a layer of LOCOS silicon oxide within the recess and having a grown upper surface which is coplanar with the surface of an un-recessed portion of the silicon layer, wherein the silicon layer beneath the recess has a non-uniform lateral doping profile, and is comprised in a drift region of the lateral semiconductor device. A method of making such a die is also disclosed, as is an integrated circuit and a driver circuit.

Abstract: A switched capacitor power converter comprising a set of at least two capacitors; an input for receiving an input voltage an output for outputting an output voltage different to the input voltage, a plurality of switches configured to arrange the set of capacitors into a plurality of different subcircuit arrangements between the input and output for converting the input voltage to the output voltage; wherein the set of capacitors is configured to adopt a first subcircuit arrangement in which the set is connected to the input, a second subcircuit arrangement different to the first subcircuit arrangement and a third subcircuit arrangement, different to the first and second arrangements, in which the set is connected to the output, the subcircuit arrangements configured such that each of the capacitors in the set acts as a floating capacitor.