Patents Assigned to NXP
  • Publication number: 20100231276
    Abstract: A digital electronic device is provided with a first and second sequential logic unit (SS1, SS2), each for receiving an input signal (D) and for outputting a first and second output signal (Q, QF), respectively. The electronic device furthermore comprises a comparator unit (C) for comparing the first and second output signals (Q, QF) and an adaptive clock generator unit (ACG) for generating a first and second internal clock (CK, CKF) for the first and second sequential logic unit (SS1, SS2), respectively. In a self-tuning mode, the adaptive clock generator unit (ACG) is adapted to delay the first and second internal clock signals (CK, CKF) with respect to the other internal clock signal (CKF). The delay induced by the adaptive control generator unit (ACG) is dependent on the result of the comparison unit (C). In a normal operation mode the adaptive control generator unit (ACG) is adapted to maintain the delay between the first and second internal clock signals constant.
    Type: Application
    Filed: January 31, 2008
    Publication date: September 16, 2010
    Applicant: NXP, B.V.
    Inventor: Vincent Huard
  • Publication number: 20100233977
    Abstract: A multi-mode radio transmitter for use in mobile radio cellular standards, such as 2G, 2.5G and 3G, and a method of operating the transmitter in which an input signal is modulated independently of controlling the drive of a power amplifier (PA) module (40). The transmitter comprises circuitry (12, 60) for extracting the phase (?) and amplitude (R) components from envelope information in the input signal. A modulator (110) uses the phase component (?) to produce a constant-envelope signal comprising a phase modulated real signal at the transmitter frequency. This signal is multiplied in a multiplier (72) with either a fixed bias voltage (Vg1) to produce a constant envelope signal or a low level envelope tracking signal derived from an amplitude component (R) by a first amplitude control circuit (78) to produce a signal modulated exactly by the amplitude component. An output from the multiplier is applied to the PA module (40) having a control input (41).
    Type: Application
    Filed: March 26, 2007
    Publication date: September 16, 2010
    Applicant: NXP B.V.
    Inventors: Brian J. Minnis, Paul A. Moore
  • Publication number: 20100232245
    Abstract: Data is read from a memory matrix (10) with a plurality of bit lines (12). A differential sense amplifier (14) receives a signal derived from a first one of the bit lines (12) on a first input. The differential sense amplifier (14) receives a reference signal from a reference output of a reference circuit (15) to a second input. A second one of the bit lines (12), which is adjacent to the first one of the bit lines (12), is coupled to the reference circuit (15), so that a bit line signal value on the second one of the bit lines (12) affects a reference signal value on the reference output, at least partly reproducing an effect of crosstalk of the bit line signal value (12) on the second one of the bit lines (12) on a bit line signal value on the first one of the bit lines (12).
    Type: Application
    Filed: March 27, 2007
    Publication date: September 16, 2010
    Applicant: NXP B.V.
    Inventors: Victor M. G. Van Acht, Nicolaas Lambert
  • Publication number: 20100232499
    Abstract: The invention relates to a method of determining an image distribution (Dopt) for a light field data structure, which method comprises obtaining a plurality of images (F1, F2, . . . , Fn) from a plurality of image sources (C1, C2, . . . , Cn), performing image analysis on each image (F1, F2, . . . , Fn) of the plurality of images (F1, F2, . . . , Fn) to determine whether a specified criterion is satisfied by the content of that image (F1, F2, . . . , Fn), and identifying a group (12) of images (F1, F2, . . . , Fn) whose contents satisfy the specified criterion. The image group (12) is compared to each reference image distribution (D1, D2, . . . , Dm) of a set of predefined reference image distributions (D1, D2, . . . , Dm,) to select an optimal image distribution (Dopt), wherein a reference image distribution (D1, D2, . . . , Dm) comprises a predefined arrangement of I-images and P-images of the light field data structure. Each image (F1, F2, . . . , Fn) of the plurality of images (F1, F2, . . .
    Type: Application
    Filed: May 14, 2008
    Publication date: September 16, 2010
    Applicant: NXP B.V.
    Inventor: Jean-Marc Reme
  • Publication number: 20100231446
    Abstract: The invention provides a method of processing signals from a satellite positioning system in which a user inputs an approximate indication of current position, and this is used when processing satellite samples to reduce the processing required or increase the reliability. This approach avoids the need for an automated approximate location system (for example using cellular telephony). This represents a change in the way GPS (or other satellite systems) is used. Instead of relying on a GPS system to provide a location in entirely automated manner, the approach is for the user to give an approximate location (which will generally be known), and for the GPS system then to correct this and provide an accurate location. This approach can enable the GPS system to function in areas where it would normally be unreliable.
    Type: Application
    Filed: October 16, 2008
    Publication date: September 16, 2010
    Applicant: NXP B.V.
    Inventors: Christopher B. Marshall, Saul Dooley
  • Publication number: 20100230672
    Abstract: It is described a method for producing an integrated circuit element comprising a first electric component of a first type and a second electric component of a second type, wherein the two components require different measurement conditions for testing the components as to be defective or as to be defect free. The production method comprises the steps of (a) forming the first and the second component on a substrate, (b) providing a conductor path on the substrate in order to contact the first and the second component, the conductor path comprising a galvanic gap, wherein the galvanic gap provides the possibility to individually connect the first component with a measurement device, (c) accomplishing a test of the first component with the measurement device and (d) in case the test shows a defect free first component, closing the galvanic gap with a conductive connection, and in case the test shows a defective first component, identifying the corresponding integrated circuit element as to be defective.
    Type: Application
    Filed: January 25, 2007
    Publication date: September 16, 2010
    Applicant: NXP B.V.
    Inventor: Wolfgang Schnitt
  • Publication number: 20100235555
    Abstract: A host controller (304) having a first communication interface, or protocol, writes to and reads from one or more slave devices (310) each having a second communication interlace, or protocol, which is different from the first, through a translation device (302), or integrated circuit, that is responsive to command streams from the host controller (304). The present invention provides a high-level communications protocol by which command information and data are passed to a translation device (302), and the translation device (302) interprets these commands and engages in the desired data transfer operation between the host controller (304) and the slave devices (310). In a further aspect of the present invention, the high-level communications protocol also includes commands interpreted by the translation device (302) to achieve data transfers between the host controller (304) and the translation device (302), including accessing internal registers and I/O ports of the translation device (302).
    Type: Application
    Filed: June 30, 2006
    Publication date: September 16, 2010
    Applicant: NXP B.V.
    Inventor: Dong Nguyen
  • Publication number: 20100231266
    Abstract: The present invention provides a system and a method for driving a differential signal which includes a differential data input, a plurality of switches coupled to a current source for steering current depending on the differential data input, a first differential output and a second differential output and a coupled to at least two of the plurality of switches and a first source follower and a second source follower coupled to the first differential output for controlling output impedance. This architecture prevents the common mode noise reflected from the driver from becoming a differential signal and meets the requirements of the LVDS and SubLVDS standard down till 1.62V. Also this architecture is capable of operating in Gbps range making it a high-speed differential driver with very low power.
    Type: Application
    Filed: March 21, 2007
    Publication date: September 16, 2010
    Applicant: NXP B.V.
    Inventor: Madhuban Kishor
  • Publication number: 20100231314
    Abstract: The present invention relates in general to transferring the envelope information of a polar modulated signal to a varying pulsewidth signal, while the phase modulation is direct transferred to the phase modulation of this PWM signal. Accordingly, the resultant signal is a PWM-PPM-signal. Such a signal can efficiently amplified by use of switching amplifying stages. By the present invention four pre-distorted baseband signals are applied basically to 4 linear RF mixers and a two adders, which are, the only needed external RF building blocks to build the modulator according to the invention. That is, the basic idea of the invention resides in the way of modulation of the four baseband signals and the way of combining of the RF modulated signals.
    Type: Application
    Filed: March 26, 2007
    Publication date: September 16, 2010
    Applicant: NXP B.V.
    Inventors: Jan Vromans, Gerben W. De Jong, Mihai A. T. Sanduleanu
  • Publication number: 20100230787
    Abstract: The invention relates to an electric device including an electric element, the electric element comprising a first electrode (104) having a first surface (106) and a pillar (108), the pillar extending from the first surface in a first direction (110), the pillar having a length measured from the first surface parallel to the first direction, the pillar having a cross section (116) perpendicular to the first direction and the pillar having a sidewall surface (120) enclosing the pillar and extending in the first direction, characterized in—that, the pillar comprises any one of a score (124) and protrusion (122) extending along at least part of the length of the pillar for giving the pillar (108) improved mechanical stability. The electrode allows electrical elements such as capacitors, energy storage devices or diodes to be made with improved properties in a cost effective way.
    Type: Application
    Filed: April 30, 2007
    Publication date: September 16, 2010
    Applicant: NXP B.V.
    Inventors: Lionel Guiraud, Francois Lecornec, Johan H. Klootwijk, Freddy Roozeboom, David D. R. Chevrie
  • Publication number: 20100231297
    Abstract: The present invention relates to an electronic device that includes an integrated power comparator circuit (1) for a self-oscillating class D system (100). The integrated power comparator circuit (1) has a modulation stage (10), wherein the modulation stage (10) comprises a compensation circuit (40) for providing a compensation signal to the modulation stage, which is dimensioned for compensating a variation of a process parameter for smoothing initialization of the self-oscillating class D system (100).
    Type: Application
    Filed: August 10, 2007
    Publication date: September 16, 2010
    Applicant: NXP, B.V.
    Inventor: Pieter Buitendijk
  • Publication number: 20100231301
    Abstract: An amplifier circuit, comprising a differential input stage (M1, M2), two cross-coupled current mirrors (M3, M4; M5, M6) coupled to respective outputs of the differential input stage (M1, M2), and a minimum selector circuit (M11, M12, M13, M14) coupled to outputs of the current mirrors.
    Type: Application
    Filed: January 17, 2007
    Publication date: September 16, 2010
    Applicant: NXP B.V.
    Inventor: Paul Bruin
  • Publication number: 20100232401
    Abstract: A system, apparatus and methods are described that define the frequency in which a scan for a wireless local area network access point (140) is performed. In one embodiment, a scan is performed when a change in the geographic location of a mobile wireless device (115) is identified.
    Type: Application
    Filed: March 23, 2006
    Publication date: September 16, 2010
    Applicant: NXP B.V.
    Inventor: Olaf Hirsch
  • Patent number: 7795969
    Abstract: Recently, the use of class D audio amplifiers has become more and more widespread. In contrast to the generally employed class A-B linear amplification technology, class D allows for improved efficiency. However, the class D principle is known for its poor distortion characteristics. According to the present invention, a digital amplifier is provided for converting an input signal to a power output. The digital amplifier according to the present invention comprises a supply ripple pre-compensation circuit for compensating voltage ripples on a supply voltage supplied to bridge circuits of the digital amplifier on the basis of the input signal. By this, supply ripples in the supply voltage supplied to the bridge which have been found to cause a major part of the distortions in the output signal of the digital amplifier may be compensated.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: September 14, 2010
    Assignee: NXP B.V.
    Inventors: Javier F. Esguevillas, Matthias Wendt, Roger Steadman
  • Patent number: 7794540
    Abstract: Method of manufacturing a semiconductor device, in which on a region of silicon oxide (5) situated next to a region of monocrystalline silicon (4) at the surface (3) of a semiconductor body (1), a non-monocrystalline auxiliary layer (8) is formed. The auxiliary layer is formed in two steps. In the first step, the silicon body is heated in an atmosphere comprising a gaseous arsenic compound; in the second step it is heated in an atmosphere comprising a gaseous silicon compound instead of said arsenic compound. Thus, the regions of silicon oxide are provided with an amorphous or polycrystalline silicon seed layer in a self-aligned manner.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: September 14, 2010
    Assignee: NXP B.V.
    Inventors: Petrus Hubertus Cornelis Magnee, Johannes Josephus Theodorus Marinus Donkers, Xiaoping Shi
  • Patent number: 7796482
    Abstract: The invention provides for a method, and related apparatus, of producing a Land Pre-Pit signal during playback of an optical disc and including the steps of obtaining an output signal from an optical detector and from which the Land Pre-Pit signal is to be derived, scaling the said output signal responsive to a determined amplitude of a high frequency crosstalk signal arising during reading of the disc and in a manner so as to increase the said output signal when the Land Pre-Pit identified as corresponding to a mark on the disc, and so as to decrease the output signal when the Land Pre-Pit is identified as corresponding to a space on the disc.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: September 14, 2010
    Assignee: NXP B.V.
    Inventors: Xinyan Wu, John A. Harold-Barry
  • Patent number: 7796773
    Abstract: In a communication device (1) that is designed to deliver sound, in an against the-ear mode, into a space (22) bounded by the ear and, in an away-from-the-ear mode, into an acoustic free space, a loudspeaker (3) is provided for generating the sound and a holding device (2) is furthermore provided, which holding device (2) comprises a first holding-device region (16) via which, in the against-the-ear mode, the sound generated by the loudspeaker (3) can be delivered without hindrance by the ear and which holding device (2) comprises a second holding-device region (15A) that does not comprise the first holding-device region (16) and via which, in the against-the-ear mode, the sound generated by the loudspeaker (3) can be fed to the space (22) bounded by the ear and a first sound-conveying device is furthermore provided with whose aid the sound generated by the loudspeaker (3) can be conveyed, in the away-from-the-ear mode, through the first holding-device region (16) into the acoustic free space, and a second so
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: September 14, 2010
    Assignee: NXP B.V.
    Inventor: Erich Klein
  • Patent number: 7795112
    Abstract: A method of forming a transistor structure on a substrate (SOI) is disclosed, wherein the substrate comprises a supporting Si layer, a buried insulating layer, and a top Si layer. The method comprises forming a gate region of the transistor structure on the top Si layer, wherein the gate region is separated from the top Si layer by a dielectric layer, and wherein the top Si layer comprises a high dopant level. The method further comprises forming an open area on the top Si layer demarcated by a demarcating oxide and/or resist layer region, forming high level impurity or heavily-damaged regions by ion implantation, and exposing the open area to an ion beam, wherein the ion beam comprises a combination of beam energy and dose, and wherein the demarcating layer region and the gate region act as an implantation mask.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: September 14, 2010
    Assignees: IMEC, NXP B.V.
    Inventors: Youri V. Ponomarev, Josine Johanna Gerarda Petra Loo
  • Patent number: 7795912
    Abstract: An integrated circuit comprises a matrix (10) of programmable cells (100). Each particular one of the programmable cells (100) comprises a programmable logic circuit (22) and a bank (24) of routing multiplexers (25a-d). Each routing multiplexer (25a-d) in the bank (24) has a set of inputs connected to connections selected from a group consisting of connections to an output of the programmable logic circuit (22) and connections dedicated to outputs of routing multiplexers (25a-d) in further ones of the programmable cells (100) other than the particular one of the programmable cells (100). The further ones of the programmable cells (100) the inputs of the routing multiplexer (25a-d) in the bank (24) are connected to are positioned relative to the particular one of the programmable cells (100) in the matrix (10) in neighboring cells (100) of the particular one of the programmable cells (100) and in cells (100) beyond the neighboring cells (100).
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: September 14, 2010
    Assignee: NXP B.V.
    Inventors: Alexander A. Danilin, Martinus T. Bennebroek
  • Publication number: 20100224987
    Abstract: The present invention relates to a stress buffering package for a semiconductor component, wherein a stress buffering means comprises individual stress buffering elements that do not influence the stress buffering effect from each other. Furthermore the invention relates a method for manufacturing a stress buffering package for a semiconductor component.
    Type: Application
    Filed: January 18, 2007
    Publication date: September 9, 2010
    Applicant: NXP B.V.
    Inventor: Hendrik P. Hochstenbach