Abstract: An electronic compass has a 2D magnetometer for determining two of the three components of the earth-magnetic field vector. Values for the magnitude and inclination of the field at the location of the device are given. If at least one of the body axes of the device is held horizontally in operational use, an educated guess can be made about the actual orientation of the device (e.g., heading and tilt angles) with respect to the earth. Accordingly, this compass is a very-low cost device.

Abstract: A decoder (100) is disclosed, which selectively reconstructs at least one predetermined data unit out of a coded bit stream (c). The decoder (100) includes a parsing unit (120) to search and parse unambiguous information (up) characterizing the at least one predetermined data unit uniquely. Next, the parsing unit (120) provides this parsed information (up) either directly to a decoding unit (130) or to a look-up table (140) such that the decoding unit (130) could reconstruct the predetermined data unit directly out of the coded bit stream (c) based on the parsed information (up) without decoding and reconstructing the coded bit stream (c) completely. Optionally, a specification unit (110) provides an start position (us) of the coded bit stream (c) to the parsing unit (120) used for starting the search. Therewith, data traffic, computation time and memory resources could be saved for decoding and displaying e.g. compressed JPEG pictures.

Abstract: An integrated circuit (IC) is disclosed that comprises a circuit portion (100) having a plurality of inputs (102) and a plurality of outputs (106), the plurality of inputs being arranged to receive a test pattern in a test mode of the integrated circuit, the test pattern comprising a plurality of test vectors for feeding to the plurality of inputs in successive clock cycles. The IC also comprises a test arrangement for testing the circuit portion (100), comprising a test pattern generator (110) for generating the test pattern, masking logic (150) for masking selected outputs of the plurality of outputs (106) and a signal generator (130) coupled to the masking logic (150) for generating a masking signal triggering the masking of all of said circuit portion outputs during selected cycles of the successive clock cycles, the signal generator (130) being responsive to clock cycle selection data (s1-st).

Abstract: A system and method for synchronizing otherwise independent oscillators private to I2C Bus slave devices. An I2C Bus master device is capable of issuing two new general call commands, MEASURE PULSE and RESET PRESCALE. The I2C Bus slave devices respond to the MEASURE PULSE command by returning a digital count related to the number of ticks its local, private oscillator cycles through during a signal pulse on the I2C Bus. All such I2C Bus slave devices measure the same signal pulse on the I2C Bus, so the differences in the digital measurements returned during the MEASURE PULSE command are proportional to their respective oscillator frequencies. The various digital measurements returned are used to calculate appropriate oscillator prescale factors that will harmonize the final product frequencies of all of the local oscillators on all of the I2C Bus slave devices in the system.

Abstract: An electronic device has an orientation sensing system for determining an orientation of the device. The system comprises a magnetometer and an accelero meter. The system further has calibration means to calibrate the sensing system for operational use. The accelerometer supplies measurements used to constrain a range of possible directions of the external magnetic field to be determined. The calibration means numerically solves a set of equations and is equally well useable for a 2D or 3D magnetometer in combination with a 2D or 3D accelerometer.

Abstract: The present invention relates to a mixer circuit and method of frequency transformation, wherein an input signal is switched in accordance with a first local oscillator signal and in accordance with at least one second local oscillator signal having a smaller duty cycle than said first local oscillator signal, or having a respective predetermined phase shift with respect to said first local oscillator signal. Output signals obtained by the switching in accordance with the first and at least one second local oscillator signals are summed and the polarity of one of said first local oscillator signal and said at least one second local oscillator signal is switched in response to a control input, to thereby switch between a harmonic-rejection mode and a sub-harmonic mixing mode.

Abstract: The present invention relates to a configurable trench multi-capacitor device comprising a trench in a semiconductor substrate. The trench has a lateral extension exceeding 10 micrometer and a trench filling includes a number of at least four electrically conductive capacitor-electrode layers. A switching unit is provided that comprises a plurality of switching elements electrically interconnected between different capacitor-electrode layers of the trench filling. A control unit is connected with the switching unit and configured to generate and provide to the switching unit respective control signals for forming a respective one of a plurality of multi-capacitor configurations using the capacitor-electrode layers of the trench filling.

Abstract: The present invention provides an improved method and device for digital motion blur removal by using motion information extracted from a sequence of images captured immediately before the image to be corrected was captured. In particular, the invention includes estimating (56) motion information of the previous sequence of images and analyzing them based on motion estimation techniques and then extrapolating (58) the motion of the image to be corrected based on the motion estimation in order to remove (62) the motion blur effects in the desired captured image. The various types of devices which may implement the method of the present invention will thereby display (64) blur free digital images.

Abstract: An electrophoretic fluid separation structure (100) comprising a substrate (101) and a plurality of vertical nanowires (102) grown on the substrate (101).

Abstract: A memory cell (300, 500), the memory cell (300, 500) comprising a substrate (301), a nanowire (302) extending along a vertical trench formed in the substrate (301), a control gate (303) surrounding the nanowire (302), and a charge storage structure (320, 501) formed between the control gate (303) and the nanowire (302).

Abstract: Sensor package 1 and a corresponding manufacturing method, wherein the sensor package 1 includes several components like a magneto resistive sensor 40 and electronic components 30, and the orientation of the elements and components is maintained by a moulding body 200 manufactured in a single moulding step.

Abstract: Apparatus (10) for matching an input frame rate of a video stream with an output frame rate of an output stream. The apparatus (10) comprises at least one memory buffer (13; 22), an output frame generator (14), and regulating means (8, 14, 24, 25, 27, 28, 29, 30) implementing a control feedback regarding a state of said at least one memory buffer (13; 22). The regulating means (8, 14, 24, 25, 27, 28, 29, 30) allow this state to be monitored and perform a regulation between two or more different settings to slow down or speed up the output frame or line rate of the output stream.

Abstract: An electronic apparatus comprises a main apparatus portion, a unique identification device for attachment in close proximity to the main apparatus portion and an interrogation system provided as part of the main apparatus portion for wirelessly interrogating the identification device such that the main apparatus portion function is enabled only when in close proximity to the identification device. The identification device is adapted to be made disfunctional by detachment or attempted detachment. In this arrangement, the main apparatus portion is the normal electronic apparatus to be protected from theft. It is provided with an interrogation system so that it can be made to cease functioning if not in close proximity to the identification device.

Abstract: In a two-dimensional optical storage (TwoDOS) arrangement, at certain places on the optical disc, calibration pits are placed, for instance in the lead-in and/or additionally sparsely in the data. The signal waveform resulting from the read out of the calibration bits is measured, and matrix multiplication is performed on these signals to obtain the linear interference coefficients. This can be done since the bit sequence is known (along all of the bit-rows of the 2D patterns). From these linear interference coefficients, the electric field distribution of the read-out spots at the pitholes can be reconstructed. This information can be used in at least two ways: The signal processing unit can use this as input for its settings, so it uses a measured response of the optical channel instead of an expected response.

Abstract: Test vectors for structural testing of an analog circuit are selected by first selecting an initial set of test input vectors for the analog circuit. A set of faults is selected, comprising faults that each correspond to a respective node in the analog circuit and corresponding fault voltage value for that node. A measure of overlap is computed between probability distributions of test output signal values for the analog circuit in response to the test input vectors in the presence and absence of each of the faults from said set of faults respectively, as a function of estimated statistical spread of component and/or process parameter values in the analog circuit. Test input vectors are selected from the initial set of test input vectors for use in testing on the basis of whether the measure of overlap for at least one if the faults is below a threshold value in response to the selected test input vector under control of the test selection computer.

Abstract: A plurality of data processing tasks with processing elements (10) that contend for a resource (18). Execution of each task comprising executing a series of instructions. During execution indications are measured of the speed of progress of executing the instructions for respective ones of the tasks. Requests to access the resource (18) for different ones of the tasks are arbitrated, a priority for judging arbitration being assigned to each task based on the measured indication of the speed of progress of the task. At least over a part of a range of possible speed of progress values increasingly higher priority is assigned in case of increasingly lower indication of the speed of progress.

Abstract: A radiofrequency transmitting device delivers output signals having a chosen radiofrequency from input data split up into complementary phase data and amplitude data. This device includes a radiofrequency reference oscillator for outputting a reference signal having a fixed radiofrequency reference, and a digital phase modulator for synthesizing the chosen radiofrequency from the fixed radiofrequency reference and for phase modulating the reference signal with the phase data, in order to produce an output signal having the chosen radiofrequency.

Abstract: An orientation sensing system uses an algorithm that iteratively improves an estimate of the body attitude. In each iteration, an error vector is generated that represents the difference between the actually measured sensor signals on the one hand, and a model-based prediction of these sensor signals, given the attitude estimate of the previous iteration, on the other hand. From the compound sensor data error vector, an attitude estimation error (a 3 degrees-of-freedom rotation) is calculated by multiplying the compound error vector by the pseudo-inverse of a sensitivity matrix. An improved attitude estimate is then obtained by applying the inverse of the attitude estimation error to the old attitude estimate.

Abstract: A signal processor comprises a reference voltage circuit (RVC) for imposing a reference voltage (VR) onto a capacitance (Cr). The reference voltage circuit (RVC) comprises a negative slope module (NSM) for providing a negative slope signal (SN), which has a magnitude that decreases when a voltage that is present on the capacitance (Cr) increases. A positive slope module (PSM) provides a positive slope signal (SP), which has a magnitude that increases when the voltage that is present on the capacitance (Cr) increases. A minimum selection module (MSM) controls a maximum current (IMX) that the reference voltage circuit (RVC) can apply to the capacitance (Cr) substantially in dependence on the negative slope signal (SN), if the magnitude of the negative slope signal (SN) is smaller than that of the positive slope signal (SP).

Abstract: A digital electronic device is provided which comprises a digital clock deviation detecting means and a digital clock correcting means. The clock deviation detecting means is used to detect a deviation of a first clock signal of the electronic device and/or the duty cycle of the first clock signal. The clock correcting means is used to correct the first clock signal and/or the duty cycle of the first clock signal if the clock deviation detecting means has detected a deviation of the first clock signal and/or the duty cycle of the first clock signal. The clock correcting means comprises at least a first and second compensation path (P1, P2) for compensating deviations in the first clock signal and/or the duty cycle thereof, when the first clock signal passes through the first or second path. The first path (P1) does not induce a compensation and is selected if the clock deviation detecting means has not detected a deviation in the first clock signal.