Abstract: An administrator node (130) adjusts a trustworthy-measure associated with nodes (110) that are suspected of unauthorized modifications of content material. The original provider of the content material to a network binds an identifying code to it. Upon receiving the material from a source node (110), a target node (120) computes an associated code for the received material. If the computed code and the identifying code differ, the material is determined to be modified, and a discrepancy report is submitted to the administrator node (130). The administrator node (130) effects a penalty against the root source if the modification is confirmed; or against the target node (120) if the discrepancy report is unfounded. The penalties include downgrading of the trustworthiness-measure associated with each node, and these trustworthiness-measures are available for use by potential target nodes in their selection of preferred source nodes.

Abstract: The invention relates to a semiconductor device (10) consisting of a substrate (11) and a semiconductor body (2) comprising a strip-shaped semiconductor region (3,3A,3B) of silicon in which a field effect transistor is formed, wherein a source region (4) of a first conductivity type, a channel region (33) of a second conductivity type opposed to the first, and a drain region (5) of the first conductivity type are arranged in succession, successively, seen in the longitudinal direction of the strip-shaped semiconductor region (3,3A,3B), and wherein the channel region (33) is provided with a gate dielectric (6), on which a first gate electrode (7) is present on a first vertical side of the strip-shaped semiconductor region (3,3A,3B), which gate electrode (7) is provided with a first connection region (7A), and on which a second gate electrode (8) is present on a second vertical side of the strip-shaped semiconductor region (3,3A,3B) positioned opposite the first vertical side, which second gate electrode (8) is

Abstract: A passivating coupling material for, on the one hand, passivating a dielectric layer in a semiconductor device, and on the other hand, for permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. In a particular example, the dielectric layer may be a porous material having a desirably decreased dielectric constant k, and the passivating coupling material provides steric shielding groups that substantially block the adsorption and uptake of ambient moisture into the porous dielectric layer. The passivating coupling materials also provides metal nucleation sides for promoting the deposition of a metal thereon in liquid phase, in comparison with metal deposition without the presence of the passivating coupling material. The use of a liquid phase metal deposition process facilitates the subsequent manufacture of the semiconductor device.

Abstract: A tamper-resistant semiconductor device (5;20;30;40;50;60) which includes a plurality of electronic circuits formed on a circuitry side (6) of a substrate (7) having an opposite side which is a backside (8) of the semiconductor device, and comprises at least one light-emitting device (9a-f;21) and at least one light-sensing device (10a-f;22a-b) provided on the circuitry side (6) of the semiconductor device. The light-emitting device (9a-f;21) is arranged to emit light, including a wavelength range for which the substrate (7) is transparent, into the substrate towards the backside (8), and the light-sensing device (10a-f;22a-b) is arranged to sense at least a fraction of the emitted light following passage through the substrate (7) and reflection at the backside (8), and configured to output a signal indicative of a reflecting state of the backside, thereby enabling detection of an attempt to tamper with the backside (8) of the semiconductor device (5;20;30;40;50;60).

Abstract: In accordance with the invention, a method and system relating to the rate recovery mechanism in a Wireless Local Area Network (WLAN) and Bluetooth coexistence system is provided.

Abstract: The invention relates to a testable integrated circuit. In order to replace ground and VDD in certain points of such a circuit, the circuit comprises a cell (34) which comprises a flipflop (11) and means (31) able to set the output voltage of the cell when the circuit is in the operation mode. These means for setting the output voltage are controlled by a control signal (15) which depends on the mode signal that indicates whether the signal is in the test mode or in the operation mode.

Abstract: A method of obtaining parametric test data for use in monitoring alignment between layers of a semiconductor device. The method employs a test structure comprising a meander (10, 30) of the material of a first layer of the semiconductor device, deposited relative to a conductive line (18,38). A number of sets (16a, 16b, 16e, 16d) of components 16, such as contacts or vias, are provided relative to the meander (10), at successively smaller distances therefrom. A single analogue measurement can be performed between a first and (A) of the meander (10, 30) and the conductive line (18, 38) so as to determine the resistance therebetween, and the critical distance at (or on acceptable margin in relation thereto) between the first layer and a component of the semiconductor device can be obtained.

Abstract: A new test pattern which consists of performing “very small jumps” and “very big jumps” within the matrix. The “very small jumps” are controlled by the row decoder, and have the effect of sensitizing the resistive open defects which lead to slow-to-fall behavior in the word line. A “very small jump” means that the memory position of two consecutive accesses remains in a unique sub-cluster until all rows in that sub-cluster have been tested, remains in the same cluster until all rows in that cluster have been tested, remains in the same U section until all rows in that U section have been tested, and finally, remains in the same Z block until all of the rows of that Z block have been tested. The “very big jumps” are intended to cover the class of resistive open defects which leads to slow-to-rise behavior, and is intended to mean that two consecutive memory accesses must never stay in the same subcluster, at the same cluster, or at the same U section.

Abstract: In a multi-resonance converter for converting a first DC voltage into a second DC voltage, wherein the output of a half-bridge comprising semiconductor switches is connected through a resonance capacitor to the primary winding of a transformer and the secondary winding of the transformer, together with rectifier elements, an output inductor and an output capacitor, forms a current output, it is proposed that a controller, which can be supplied which the voltage across the output capacitor and a reference voltage, should control the semiconductor switches alternately so that one of the semiconductor switches is respectively turned on at a predetermined time after the other semiconductor switch is turned off. Preferably, the frequency is controlled in an upper range of the drawn power while in a lower range of the drawn power, the mark-space ratio is controlled for selected respectively constant frequencies.

Abstract: The invention relates to a functional system comprising a set of functions (F, F?) which are to access a collective resource (RSRC), the system including an interface (INT) arranged to implement an access scheme (AS) including at least one state (I) defined by an order of priority for an arbitration according to which the functions (F, F?) can access the collective resource (RSRC), the state (I) being characterized in that, for at least one set of at least two functions (F), the access possibilities in read mode (F_R) and the access possibilities in write mode (F_W) have different priority levels, the access possibilities in read mode having consecutive priority levels higher than the priority levels of the access possibilities in write mode.

Abstract: A plurality of source files and one or more header files are provided. The header files that contain information that several of the source files refer to. The original files are preprocessed, each to generate a respective preprocessed file, said preprocessing comprising expanding the several of the source files with the information from a first header 5 file. A collective processing step is applied to make coordinated changes to information from the preprocessed files. The changed preprocessed files are used to regenerate modified source and header files. For regenerating the first header file, one of the preprocessed files is selected on the basis of detection that the selected file elaborates the information from the first header file. The first header file is regenerated from the information in the selected file.

Abstract: The method for determining the thickness of a dielectric layer according to the invention comprises the step of providing an electrically conductive body having a dielectric layer which is separated from the electrically conductive body by at least a further dielectric layer and a surface of which is exposed. Onto the exposed surface an electric charge is deposited, thereby inducing an electric potential difference between the exposed surface and the electrically conductive body. An electrical parameter relating to the electric potential difference is determined and a measurement is performed to obtain additional measurement data relating to the thickness of the dielectric layer and/or to the thickness of the further dielectric layer. In this way the thickness of the dielectric layer and/or of the further dielectric layer is determined. The method of manufacturing an electric device comprises this method for determining the thickness of a dielectric layer.

Abstract: A method of operating a mobile device comprises operating the mobile device in a low power mode, switching the mobile device to a high power mode in response to an event, identifying the event as specific type of event, selecting a time period according to the identified type of event, preventing an algorithm for switching the mobile device to the low power mode from executing, for the time period, and (ultimately) executing the algorithm.

Abstract: In a method for operating a transponder (1, 41), the transponder (1, 4) receives a signal from a transmitter (2, 42). The signal comprises an information about a reference sensitivity and the transponder (1, 41) has an input sensitivity such that the transponder (1, 41) detects only signals above a certain power corresponding to the input sensitivity. In response to the received signal, the input sensitivity of the transponder (1, 41) is adjusted to the reference sensitivity.

Abstract: A computer system includes a data cache supported by a copy-back buffer and pre-allocation request stack. A programmable trigger mechanism inspects each store operation made by the processor to the data cache to see if a next cache line should be pre-allocated. If the store operation memory address occurs within a range defined by START and END programmable registers, then the next cache line that includes a memory address within that defined by a programmable STRIDE register is requested for pre-allocation. Bunches of pre-allocation requests are organized and scheduled by the pre-allocation request stack, and will take their turns to allow the cache lines being replaced to be processed through the copy-back buffer. By the time the processor gets to doing the store operation in the next cache line, such cache line has already been pre-allocated and there will be a cache hit, thus saving stall cycles.

Abstract: An announcement managing device for communication equipment includes a method recording means arranged for storing data within the communication equipment which is representative of successive actions carried out by a user for accessing the messaging server to record an announcement, and for storing timings between these successive actions, the data and the corresponding timings defining a method. The announcement managing device also includes a managing means which when triggered by a dedicated action, is operable for providing a list of titles respectively associated with recorded announcements on a display means of the communication equipment so that a user can select a title.

Abstract: Logic level crossings in an integrated circuit are detected. According to an example embodiment, a reset signal is provided to a flip-flop (314) as a function of a logic level of an integrated circuit. A logic level crossing condition of the integrated circuit is indicated as a function of the reset condition of the flip flop. In one implementation, the flip-flop is reset when the logic level is different than an expected logic level. In another implementation, a pair of flip-flops (414, 418) are implemented such that only one flip-flop is reset at a particular logic level; if the logic level crosses, both flip-flops are reset. The aforesaid condition of both flip-flops being reset is used to indicate the logic level crossing.

Abstract: A tamper-resistant packaging approach protects an integrated circuit (100) from undesirable access. According to an example embodiment of the present invention, data is encrypted as a function of the state of a plurality of magnetically-responsive circuit elements (130-135) and then decrypted as a function of the state (130-135). A package (106) is arranged to prevent access to the integrated circuit and having magnetic particles (120-125) therein. The magnetic particles (120-125) are arranged to cause the magnetically-responsive circuit elements (130-135) to take on a state that is used to encrypt the data. The state of these elements is again accordingly used to decrypt the data (e.g., as a key). When the magnetic particles are altered, for example, by removing a portion of the package, the state of one or more of the magnetically-responsive circuit elements is changed, thus rendering the state incapable of being used for decrypting the data.

Abstract: The present invention relates to a phase locked loop arrangement having an oscillator circuit (240) controlled in response to an output signal of a phase or frequency detection circuit (210), wherein change control (130) are provided for generating a blocking signal in response to the outputs of a first timer (110) to which a predetermined threshold frequency is supplied and a second timer (112) to which an output frequency of the oscillator circuit (240) is supplied. Based on the blocking signal, blocking (260) suppress supply of the output signal to said oscillator circuit (240). Thereby, the output frequency of the PLL arrangement can be prevented from changing beyond the frequency threshold, while only one PLL circuit is required.

Abstract: A periodic Low Density Parity Check (LPDC) coding apparatus and method allows reference to an LDPC code parity check matrix, where such reference is accomplished row by row. A specially configured memory and cyclical shift operation are used by the apparatus to efficiently compute check equations of the periodic LDPC code.