Abstract: A system and method for intra-frame compression using predictive coding utilizes some pixels of a macroblock of a video frame as reference pixels to perform predictive coding on the rest of the macroblock when some or all predefined reference pixels for performing predictive coding on the macroblock are not available in the video frame.

Abstract: A system and method for providing trick modes uses a trick mode video bitstream generated from an original video bitstream to produce video frames during a trick mode. The trick mode video bitstream is generated to be less complex with respect to decoding than the original video bitstream. Thus, the computational cost to provide trick modes is significantly lowered.

Abstract: In an I-Q receiver, I-Q baseband mixer receives a real signal, and outputs an in-phase baseband information signal and a quadrature baseband information signal, a decoupling compensator multiplies in-phase baseband information signal and the quadrature baseband information signal by a trained decoupling matrix that, based on adaptive training in response to purely in-phase and purely quadrature phase training signals, decouples the in-phase baseband information signal from a quadrature component of the I-Q signal, and decouples quadrature-phase baseband information signal from an in-phase component of the I-Q signal. Optionally, a trained I-arm-Q-arm imbalance compensator performs a filter compensation on one or both of the decoupled in-phase baseband signal and the quadrature-phase baseband signal output by the trained decoupling matrix.

Abstract: Consistent with one example embodiment, communications systems, using a serial data transfer bus having a serial data line and a clock line used to implement a communications protocol, incorporate programmable loading of a logic value into parallel slave device registers. The communications system includes a slave device having two or more registers, each register having two or more bits, each register configured to load data therein received in accordance with the communications protocol over the data transfer bus in a first configuration, and to load a single logic value into the plurality of bits in a second configuration. A programmable configuration register is configured to be programmed, in accordance with the communications protocol over the data transfer bus, to select two or more of the registers in the second configuration.

Abstract: A novel high speed, >1 GHz or 2 Gbits/s, low voltage differential signal (LVDS) driver is disclosed. The LVDS design achieves low power consumption while providing LVDS compliant impedance termination to power supply and ground. An output stage of the LVDS is implemented using a Nmos and a Pmos follower in a push pull configuration. This new design relies first on a follower type of an output stage, which provides the inherent impedance termination, second on an AC, capacitive, coupling and DC restoration to drive output stage gates, and on a low power dummy bias generator that supplies DC restoration voltages. As the supply voltage is lower the thick oxide devices performance suffer, therefore for this new design is mainly implemented with thin oxide devices.

Abstract: A high voltage driver circuit for devices such as non-volatile memories, in which a low voltage driver is combined in two different ways with a high voltage driver In one, input-independent embodiment, a low voltage driver (Q7, Q8) is connected directly in parallel with a high voltage driver, thereby providing a high voltage signal path for high voltage operations and a low voltage signal path for low voltage operations. In an alternative, partially input-dependent embodiment, a low voltage driver is connected to the output of a high voltage driver (Q9, Q10), which may comprise a partial level shifter (Q1 B Q6). The output of this low voltage driver (Q9, Q10), which forms the output terminal of the entire stage, has a pull up/pull down transistor (Q11), depending on whether the partial level shifter (Q1 B Q6) is a positive or negative level shifting high voltage driver.

Abstract: The present invention describes a method for operating an array of nonvolatile charge trapping memory devices. The method comprises before a block erase step (52) of substantially all of the non-volatile memory devices of the array, block programming (51) of substantially all of the non-volatile memory devices of the array. It is an advantage of the present invention that, by doing this, a further charge trapping nonvolatile memory device may be used as a reference cell, which is programmed and erased with the block-programming and block-erasing of the memory cells in the array, so that the reference cell shows the same cycling history as the memory cells in the array. This feature can be used for adapting read parameters to ageing of the memory cells. Corresponding devices are also provided.

Abstract: Method and apparatus for generating data packets for transmission in an orthogonal frequency division modulated communication system, in which preamble sequence for each packet is generated in the frequency domain or the time domain depending on at least two conditions to save power consumption and enable implementation in a single CMOS chip.

Abstract: A telecommunication terminal contains a two direction light beam scanner (140, 142, 144) for emitting a deflected light beam from the telecommunication terminal. A control circuit (16) activates the light beam scanner (140, 142, 144) to successively deflect the light beam in directions according to a two-dimensional direction pattern of deflections defining an image dependent on programmable control information, in response to detection 5 of a telecommunication signal by the reception circuit (12). In an embodiment at least part of the direction pattern is selected dependent on a content of a ring-tone signal.

Abstract: The present invention relates to an apparatus and method for providing synchronization of an output signal to a synchronization information. The synchronization is accomplished by providing coupling of a correction control information that controls a signal generating means, e.g. a phase locked loop arrangement (30) or a direct digital synthesis arrangement, to its exact frequency to a frequency conversion unit (90) that converts an uncorrected reference frequency to a correct or exact reference frequency. Thereby, the uncorrected reference frequency for the signal generating means (30) can be provided by a simple crystal oscillator (2) without any means for frequency control. The setting of the signal generating means (30) and the frequency conversion unit (90) can be done in a predetermined sequence which enables a user equipment to synchronize its reference frequency to the synchronization information emitted by a communication network.

Abstract: A radio frequency identification, RHD, device (116) for use at an article (114) is described that communicates information with a washing machine (100). The RFID device (116) comprises RFID circuitry (118), an antenna (120) connected to the RFID circuitry (118), as well as switching means (122) connected to any of the RFID circuitry (118) and the antenna (120) and configured to react to contact with a fluid (108) in the washing machine (100) by switching the RFID circuitry (118) from a first mode of operation to a second mode of operation. The two modes of operation comprise at least a respective first and second ability to communicate with the washing machine (100).

Abstract: A diaphragm (6) for an electroacoustic transducer is preferably designed to be essentially rectangular and has a diaphragm inner region (20) for sound conversion and a diaphragm outer region (21) for attaching the diaphragm (6) and a diaphragm intermediate region (22) which lies between the diaphragm inner region (20) and the diaphragm outer region (21), wherein the diaphragm inner region (20) is delimited toward the outside by preferably rectilinear sides (23, 24, 25, 26) and the diaphragm outer region (21) is delimited toward the inside again by preferably rectilinear sides (31, 32, 33, 34), and wherein the aforementioned sides (23, 24, 25, 26) of the diaphragm inner region (20) are joined to rounded outer corner regions (27, 28, 29, 30) with a mean outer radius value R and the aforementioned sides (31, 32, 33, 34) of the diaphragm outer region (21) are joined to rounded inner corner regions (35, 36, 37, 38) with a mean inner radius value r, wherein the mean inner radius value r of each inner corner region

Abstract: The invention relates to a MEMS resonator having at least one mode shape comprising: a substrate (2) having a surface (12), and a resonator structure (1), wherein the resonator structure (1) is part of the substrate (2), characterized in that the resonator structure (1) is defined by a first closed trench (3) and a second closed trench (3), the first trench (3) being located inside the second trench (3) so as to form a tube structure (1) inside the substrate (2), and the resonator structure (1) being released from the substrate (2) only in directions parallel to the surface (12). The invention further relates to a method of manufacturing such a MEMS resonator.

Abstract: An authentication method (100) for a secure data transmission is provided, the method comprising performing a first authentication protocol (101) by using a first cipher and performing a second authentication protocol (102) by using a second cipher. Possible inputs for the first authentication protocol (101) may be one shared key or several keys, and one or two random numbers.

Abstract: The invention relates to a filter device particularly for receiving television signals, which receives input signals and generates output signals, wherein the filter device forms a Nyquist slope by means of a passive polyphase filter (10).

Abstract: A method for generating a signal with a random low peak to average power ratio waveform for an orthogonal frequency division multiplexing system involves processing a complex vector to generate a processed complex vector and performing an inverse fast Fourier transform on the processed complex vector to generate a signal with a random low peak to average power ratio waveform for an orthogonal frequency division multiplexing system.

Abstract: The invention relates to a method of manufacturing conductive inter-layer connections in a microsystem built by a patterned stack of flexible foils (10). Conductive inter-layer connections (210, 300, 400) made of solder material, sputtered or evaporated material or by means of carbonization of plastic material building the isolating layer (30) of the flexible foils (10) are formed to connect patterned conductive layers (40, 50) separated by means of at least one isolating layer (30) in a conductive way in order to interconnect different parts of the microsystem in an easy way.

Abstract: A pressure/vacuum sensor and method, comprising: driving a MEMS piezoresistive resonator (8) into resonant vibration, applying Joule heating to the resonator (8); and sensing a variable parameter that varies in response to the tendency of the resonant frequency (fo) to depend upon the temperature of the resonator (8), the temperature thereof depending upon the pressure. The variable parameter may be the resonant frequency of the resonator (8), or a change therein, or may be derived from a feedback loop, being for example a time integrated feedback signal (82) or a reading (94) of the sense current (22), the loop keeping the resonant frequency constant in opposition to the above mentioned tendency. A reference MEMS capacitive resonator (62) may be located in the vicinity of the resonator (8) for compensating purposes.

Abstract: The present invention relates to an electronic device for power efficient linear amplification. The electronic device includes an amplifier (RF-PA) for amplifying a phase modulated signal (PM). The amplifier (RF-PA) is adapted to be controlled by a first modulating signal (AM high) for modulating the amplitude of the phase modulated signal (PM) above a predetermined amplitude value. The electronic device is further adapted to attenuate an output signal of the amplifier (RF-PA) for providing amplitude modulation below the predetermined amplitude value.

Abstract: Integrated circuits (Ia, Ib) on a wafer (2) comprise first and second integrated circuits (Ia, Ib) which each include an electric circuit (3). Only the first integrated circuits (Ia) comprise each at least one bump (8) not contacting their relevant electric circuits (3).