Patents Assigned to RENESAS
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Publication number: 20130082765Abstract: A semiconductor device includes a logic circuit and an active element circuit. The logic circuit is provided with semiconductor elements formed in a semiconductor substrate. The active element circuit is provided with transistors formed using semiconductor layers formed over a diffusion insulating film formed above a semiconductor substrate. The active element circuit is controlled by the logic circuit.Type: ApplicationFiled: September 11, 2012Publication date: April 4, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Kishou KANEKO, Naoya INOUE, Yoshihiro HAYASHI
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Publication number: 20130082393Abstract: An upper surface of a plug (PL1) is formed so as to be higher than an upper surface of an interlayer insulating film (PIL) by forming the interlayer insulating film (PIL) on a semiconductor substrate (1S), completing a CMP method for forming the plug (PL1) inside the interlayer insulating film (PIL), and then, making the upper surface of the interlayer insulating film (PIL) to recede. In this manner, reliability of connection between the plug (PL1) and a wiring (W1) in a vertical direction can be ensured. Also, the wiring (W1) can be formed so as not to be embedded inside the interlayer insulating film (PIL), or a formed amount by the embedding can be reduced.Type: ApplicationFiled: June 14, 2010Publication date: April 4, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Takeshi Kawamura
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Publication number: 20130077707Abstract: A method, apparatus and computer program product are provided for reporting low rank feedback information for each transmission point up to a maximum rank per transmission point. In this regard, a method includes determining a transmission rank and a precoding matrix for each of at least two transmission points of a plurality of transmission points. A method also includes determining a joint transmission rank based on at least two of the plurality of transmission points. A method also includes selecting a joint transmission precoding matrix based on the determined precoding matrix for each of the at least two transmission points and the determined joint transmission rank. The method further includes causing channel state information “CSI” to be transmitted to an access point, wherein the CSI describes the selected joint transmission precoding matrix.Type: ApplicationFiled: September 27, 2011Publication date: March 28, 2013Applicant: RENESAS MOBILE CORPORATIONInventors: Tommi Koivisto, Mihai Enescu, Timo Roman, Karol Schober
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Publication number: 20130076911Abstract: A solid-state imaging apparatus 10 includes a solid-state imaging device 40, and a color filter 16 constituted of a first color filter 16a (first filter) and a second color filter 16b (second filter). The solid-state imaging device 40 photoelectrically converts light incident to a face S1 (first face) thereof to thereby capture an image of an object to be imaged. Arranged on the face S1 of the solid-state imaging device 40 is the first color filter 16a and second color filter 16b. The first color filter 16a is a filter that allows first wavelength band light to be selectively transmitted therethrough; the second color filter 16b is a filter that allows second wavelength band light in the longer wavelength side relative to the first wavelength band to be selectively transmitted therethrough.Type: ApplicationFiled: November 15, 2012Publication date: March 28, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Renesas Electronics Corporation
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Publication number: 20130076806Abstract: A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.Type: ApplicationFiled: November 26, 2012Publication date: March 28, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Yoshiki Kurokawa, Yasuyuki Kudo, Hiroyuki Nitta, Kazuki Homma, Junya Takeda
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Publication number: 20130077275Abstract: Even in an electronic device where electrodes are coupled electrically using a solder, sections to which electrodes of an electronic component are coupled are switched by a method other than changing circuits of the electronic component or changing circuits of a wiring substrate. The electronic device includes: a wiring substrate having two or more first electrodes over one surface thereof; and an electronic component having, over one surface thereof, two or more second electrodes arranged corresponding to the two or more first electrodes, respectively. At least one of the first electrodes is a specific electrode divided into two or more divided portions, and the divided portions are coupled to different wirings, respectively. Further, at least one of the divided portions is coupled to a corresponding second electrode through a solder.Type: ApplicationFiled: August 21, 2012Publication date: March 28, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Shuuichi KARIYAZAKI
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Publication number: 20130076322Abstract: Disclosed is a power conversion circuit that suppresses the flow of a through current to a switching element based on a normally-on transistor. The power conversion circuit includes a high-side transistor and a low-side transistor, which are series-coupled to each other to form a half-bridge circuit, and two drive circuits, which complementarily drive the gate of the high-side transistor and of the low-side transistor. The high-side transistor is a normally-off transistor. The low-side transistor is a normally-on transistor.Type: ApplicationFiled: July 31, 2012Publication date: March 28, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Koji TATENO, Takahiro NOMIYAMA, Yoshinao MIURA, Hideo ISHII
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Publication number: 20130076430Abstract: An arrangement for detecting local light irradiation in an illegal attack attempt to intentionally induce a malfunction or faulty condition is formed on a small chip occupancy area so as to provide high detection sensitivity. In a region containing a logic circuit, a plurality of series-coupled detection inverters are distributively disposed as photodetector elements having a constant logical value of primary-stage input. When at least one of the series-coupled detection inverters is irradiated with light, an output thereof is inverted, thereby producing a final output through the series-coupled detection inverters. Based on the final output thus produced, local light irradiation can be detected.Type: ApplicationFiled: November 19, 2012Publication date: March 28, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Renesas Electronics Corporation
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Publication number: 20130079040Abstract: A method, apparatus and computer program product are therefore provided according to an example embodiment to provide a cellular based ITS environment. The cellular based ITS environment may be configured based on LTE based interfaces. In this regard, a method includes receiving configuration information from a first access point, wherein the configuration information defines an ITS target area comprising at least the first access point and a first RSU. A method also includes receiving an ITS paging message from the first access point. A method also includes causing a reselection of the first RSU while in the communications range of the first access point in the ITS target area and in response to the received ITS paging message.Type: ApplicationFiled: September 27, 2011Publication date: March 28, 2013Applicant: RENESAS MOBILE CORPORATIONInventors: Gilles Charbit, Matti Kullervo Jokimies
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Publication number: 20130075897Abstract: A semiconductor integrated circuit device for driving an LCD, COG chip packaging is performed. To achieve this, an elongate and relatively thick gold bump electrode is formed over an aluminum-based pad having a relatively small area. In a wafer probe test performed after formation of the gold bump electrode, a cantilever type probe needle having gold as a main component and having an almost perpendicularly bent tip portion is used. The diameter of this probe needle in the vicinity of its tip is usually almost the same as the width of the gold bump electrode. This makes it difficult to perform the wafer probe test stably. To counteract this, a plurality of bump electrode rows for outputting a display device drive signal are formed such that the width of inner bump electrodes is made greater than the width of outer bump electrodes.Type: ApplicationFiled: November 19, 2012Publication date: March 28, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Renesas Electronics Corporation
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Publication number: 20130071970Abstract: The present invention makes it possible to inhibit cutting burrs from forming in package dicing. It is possible, in a package dicing step, to: inhibit cutting burrs from forming by cutting a part of a sealing body including leads with a soft resin blade as first step cutting; successively decrease the generation of a remaining uncut part because the progression of the abrasion of a blade main body is slow by cutting only a resin part that is a remaining uncut part with a hard electroformed blade as second step cutting; and resultantly improve the reliability of a semiconductor device.Type: ApplicationFiled: July 31, 2012Publication date: March 21, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Yuji FUJIMOTO
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Publication number: 20130069214Abstract: A lead frame or semiconductor device and a method of manufacturing the same in which where the unit lead frame of each semiconductor device after dicing was located in a lead frame before dicing can be known without an additional manufacturing step. The lead frame includes a plurality of unit lead frames each having a die pad, suspension leads coupled to the die pad, and leads formed around the die pad. An identification mark including at least one of a penetrating groove, recess, and convex is formed in at least one of the die pad, suspension leads, and leads. The identification mark of a first unit lead frame and the identification mark of a second unit lead frame are different from each other at least either in location in the unit lead frame or in shape.Type: ApplicationFiled: August 15, 2012Publication date: March 21, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Muneharu MORIOKA
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Publication number: 20130071971Abstract: In a structure of a semiconductor device, a Si chip and a metal leadframe are jointed by metallic bond via a porous joint layer made of high conductive metal, having a three-dimensional network structure and using Ag as a bonding material, and a film containing Zn oxide or Al oxide is formed on a surface of a semiconductor assembly contacting to a polymer resin. In this manner, by the joint with the joint layer having the porous structure mainly made of Ag, thermal stress load of the Si chip can be reduced, and fatigue life of the joint layer itself can be improved. Besides, since adhesion of the polymer resin to the film can be enhanced by the anchor effect, occurrence of cracks in a bonding portion can be prevented, so that a highly-reliable Pb-free semiconductor device can be provided.Type: ApplicationFiled: November 15, 2012Publication date: March 21, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Renesas Electronics Corporation
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Publication number: 20130069613Abstract: In a DC/DC converter, a control circuit determines an upper limit value of an inductor current based on a load current and an input dc voltage, and changes at least one of an on time and an off time of a switching element in such a manner that the detected inductor current does not exceed the upper limit value.Type: ApplicationFiled: September 13, 2012Publication date: March 21, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Yasunobu NAKASE, Toru GODA
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Publication number: 20130073753Abstract: A semiconductor storage device includes: a plurality of memory cell arrays; a plurality of bidirectional data buses provided in correspondence with respective ones of the plurality of memory cell arrays; a plurality of bidirectional buffer circuits, which are provided in correspondence with respective ones of the memory cell arrays, capable of connecting adjacent bidirectional data buses serially so as to relay data in the bidirectional data buses; and a control circuit for controlling activation of the bidirectional buffer circuits. The bidirectional buffer circuit is arranged so as to invert logic and the bidirectional buffer circuit is arranged so as not to invert logic.Type: ApplicationFiled: November 13, 2012Publication date: March 21, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Renesas Electronics Corporation
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Publication number: 20130071958Abstract: In wafer probe inspection for a flip-chip semiconductor device having a solder bump, electric test may be performed at a high temperature by causing a probe needle to directly contact a solder bump over a wafer. The inventors have examined such high temperature probe tests in various ways and revealed the following problems. When a high temperature probe test is performed at 90° C. or higher using a palladium alloy probe needle, tin diffusion due to a solder bump occurs at the needle point to raise resistance, resulting in causing open failure. According to the invention of the present application, at least the tip of a palladium-based probe needle has mainly a granular grain structure in a high temperature probe test performed with the palladium-based probe needle contacting a solder bump electrode over a semiconductor wafer.Type: ApplicationFiled: July 18, 2012Publication date: March 21, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Hideo KAWANO, Haruko TAMEGAI, Tooru YASHIMA
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Publication number: 20130070818Abstract: A method, apparatus and computer program product for a method of operating an analog-to-digital converter of a transceiver which includes a transmitter and a receiver, the receiver including the analog-to-digital converter. The method includes determining a maximum conversion rate of the analog-to-digital converter, wherein the determining step includes determining a temperature of the analog-to-digital converter, and selecting a conversion rate of the analog-to-digital converter, based on the determined maximum conversion rate and a frequency of an unwanted signal component of the receiver, such that the selected conversion rate places an alias response of the unwanted signal component to a frequency range which is substantially non-overlapping with a wanted signal component of the receiver.Type: ApplicationFiled: September 24, 2012Publication date: March 21, 2013Applicant: RENESAS MOBILE CORPORATIONInventor: RENESAS MOBILE CORPORATION
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Publication number: 20130069725Abstract: A reduction is achieved in the primary-side input impedance of a transformer (voltage transformer) as an output matching circuit without involving a reduction in Q-factor. An RF power amplifier includes transistors, and a transformer as the output matching circuit. The transformer has a primary coil and a secondary coil which are magnetically coupled to each other. To the input terminals of the transistors, respective input signals are supplied. The primary coil is coupled to each of the output terminals of the transistors. From the secondary coil, an output signal is generated. The primary coil includes a first coil and a second coil which are coupled in parallel between the respective output terminals of the transistors, and each magnetically coupled to the secondary coil. By the parallel coupling of the first and second coils of the primary coil, the input impedance of the primary coil is reduced.Type: ApplicationFiled: November 15, 2012Publication date: March 21, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Masao Kondo, Yoshikuni Matsunaga, Kenta Seki, Satoshi Sakurai
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Publication number: 20130069249Abstract: A memory card has a wiring board, four memory chips stacked on a main surface of the wiring board, and a controller chip and an interposer mounted on a surface of the memory chip of the uppermost layer. The memory chips are stacked on the surface of the wiring board so that their long sides are directed in the same direction as that of the long side of the wiring board. The memory chip of the lowermost layer is mounted on the wiring board in a dislocated manner by a predetermined distance in a direction toward a front end of the memory card so as not to overlap the pads of the wiring board. The three memory chips stacked on the memory chip of the lowermost layer are disposed so that their short sides on which pads are formed are located at the front end of the memory card.Type: ApplicationFiled: November 9, 2012Publication date: March 21, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Renesas Electronics Corporation
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Publication number: 20130069723Abstract: In order to realize a wider bandwidth of a frequency characteristic of a power amplification circuit, outputs of differential push-pull amplifiers which are matched at respectively different frequencies are combined together by secondary inductors, and the combined signal is outputted.Type: ApplicationFiled: November 13, 2012Publication date: March 21, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventor: RENESAS ELECTRONICS CORPORATION
