Abstract: In a thin film transistor, each of an upper electrode and a lower electrode is formed of at least one material selected from the group consisting of a metal and a metal nitride, represented by TiN, Ti, W, WN, Pt, Ir, Ru. A capacitor dielectric film is formed of at least one material selected from the group consisting of ZrO.sub.2, HfO.sub.2, (Zr.sub.x, Hf.sub.1?x)O.sub.2 (0<x<1), (Zr.sub.y, Ti.sub.1?y)O.sub.2 (0<y<1), (Hf.sub.z, Ti.sub.1?z)O.sub.2 (0<z<1), (Zr.sub.k, Ti.sub.l, Hf.sub.m)O.sub.2 (0<k, l, m<1, k+l+m=1), by an atomic layer deposition process. The thin film transistor thus formed has a minimized leakage current and an increased capacitance.

Abstract: The present invention proposes methods, devices and computer program products in relation to a communication module configured for communication in a carrier aggregation mode aggregating a primary and at least one secondary carrier. Scheduling information is carried in a control channel of one of the carriers, the scheduling information being associated to a respective one of said aggregated carriers and designating search spaces for payload in a payload channel of said respective aggregated carrier. Sensing is performed responsive to a sensing command added to the scheduling information associated to said at least one secondary carrier, which sensing command commands sensing to be performed on said at least one secondary carrier.

Abstract: The present invention provides a technique for improving the reliability of a semiconductor device where spreading of cracking that occurs at the time of dicing to a seal ring can be restricted even in a semiconductor device with a low-k film used as an interlayer insulating film. Dummy vias are formed in each layer on a dicing region side. The dummy vias are formed at the same intervals in a matrix as viewed in a top view. Even in the case where cracking occurs at the time of dicing, the cracking can be prevented from spreading to a seal ring by the dummy vias. As a result, resistance to moisture absorbed in a circuit formation region can be improved, and deterioration in reliability can be prevented.

Abstract: There is provided a sensor network information collection mechanism in which, after a UE has decided to become part of an information collecting operation for collecting information from a local sensor network, a signaling transmitted from a managing node of a local sensor network is received and processed. A communication network control element is informed about the willingness to become an information collector by sending a report message comprising measurement results derived from the signaling received from the managing node of the local sensor network. When receiving a gateway allocation message indicating that the UE is determined to be a gateway element to the local sensor network, the information collecting operation is started wherein sensor nodes of the local sensor network are woke up, and a traffic flow direction in the local sensor network is set in accordance with the managing node identity to which the UE is accessed.

Abstract: In order to implement a memory having a large storage capacity and a reduced data retention current, a non-volatile memory, an SRAM, a DRAM, and a control circuit are modularized into one package. The control circuit conducts assignment of addresses to the SRAM and DRAM, and stores data that must be retained over a long period of time in the SRAM. In the DRAM, a plurality of banks are divided into two sets, and mapped to the same address space, and sets are refreshed alternately. A plurality of chips of them are stacked and disposed, and wired by using the BGA and chip-to-chip bonding.

Abstract: A semiconductor device includes a signal output unit, and a decision unit. The signal output unit includes m (?2) pieces of fuses, a NAND gate, resistance elements, and an output terminal. The decision unit decides whether n or more pieces (m?n?2) of fuses are disconnected out of the m pieces of fuses included in the signal output unit, and outputs the result of a decision. When m=n=2, the decision unit is constituted of a NOR gate having two input terminals connected to a respective end of the fuses. Thus, a H-level potential signal is output at an output terminal of the NOR gate when the decision result is affirmative. On the other hand, when the decision result is negative, a L-level potential signal is output at the output terminal.

Abstract: A semiconductor device includes an interposer, a semiconductor chip mounted on the interposer, a first wiring pattern formed on the interposer, the first wiring pattern including a first contact coupled to a bonding wire from the semiconductor chip and a second contact coupled to an external terminal of the interposer, and a second wiring pattern formed adjacent to the first wiring pattern on the interposer, the second wiring pattern including a third contact coupled to another bonding wire from the semiconductor chip and a fourth contact coupled to another external terminal of the interposer. The first contact is closer to the semiconductor chip than the third contact.

Abstract: For example, one memory cell is configured using two memory cell transistors and one phase change element by disposing a plurality of diffusion layers in parallel to a bit-line, disposing gates between the diffusion layers so as to cross the bit-line, disposing bit-line contacts and source contacts alternately to the plurality of diffusion layers arranged in a bit-line direction for each diffusion layer, and providing a phase change element on the source contact. Also, the phase change element can be provided on the bit-line contact instead of the source contact. By this means, for example, increase in drivability of the memory cell transistors and reduction in area can be realized.

Abstract: Provided is a semiconductor laser, wherein (?a??w) >15 (nm) and Lt<25 (?m), where ?w is the wavelength of light corresponding to the band gap of the active layer disposed at a position within a distance of 2 ?m from one end surface in a resonator direction, ?a is the wavelength of light corresponding to the band gap of the active layer disposed at a position that is spaced a distance of equal to or more than ( 3/10)L and ?( 7/10)L from the one end surface in a resonator direction, “L” is the resonator length, and “Lt” is the length of a transition region provided between the position of the active layer with a band gap corresponding to a light wavelength of ?w+2 (nm) and the position of the active layer with a band gap corresponding to a light wavelength of ?a?2 (nm) in the resonator direction.

Abstract: In conventional liquid crystal display controllers, the display is reduced in the stand-by state but the liquid crystal display duty is not changed, i.e., even the common electrodes of the rows that are not producing display are scanned, and the consumption of electric power is not decreased to a sufficient degree in the stand-by state. A liquid crystal display controller includes a drive duty selection register capable of being rewritten by a microprocessor, and a drive bias selection register. When the display is changed from the whole display on a liquid crystal display panel to a partial display on part of the rows only, the preset values of the drive duty selection register and of the drive bias selection register are changed, so that the display is selectively produced on a portion of the liquid crystal display panel at a low voltage with a low-duty drive.

Abstract: A state transition management device includes a first terminal receiving a first signal based on a current state-number, a memory which stores a state transition rule and from which a plurality of subsequent state-number candidates are read out in accordance with the first signal, a plurality of first nodes revealing the plurality of subsequent state-number candidates, a second terminal receiving a second signal based on the current state-number, a selection method specifying unit which outputs a selection method specifying signal in accordance with the second signal, a second node revealing the selection method specifying signal, a event terminal receiving a event-signal based on an event, a third terminal receiving a third signal based on the current state-number, a selection circuit which selects a subsequent state-number from the plurality of subsequent number candidates in accordance with the event-signal and the third signal.

Abstract: A data processing apparatus that controls an inverter circuit for a motor. The data processing apparatus including a control unit that monitors a potential of a power supply terminal to supply power to the inverter circuit, and obtains an information indicative of an amount of a driving current flowing in a motor winding of the motor in response to an amount of a current flowing in a resistive element included in the inverter circuit, to control a driving of the motor. The control unit makes the motor winding and the resistive element form a loop circuit, when the potential of the power supply terminal exceeds a predetermined value.

Abstract: A comparator circuit, includes a first power source terminal having a first potential, a second power source terminal having a second potential different from the first potential, a detection voltage terminal, a reference voltage generator coupled between the first power source terminal and the second power source terminal, the reference voltage generator generating a middle potential which is a potential between the first potential and the second potential and outputting the middle potential at a middle potential node, the reference voltage generator further generating a reference voltage, a bias unit coupled between the first power source terminal and the middle potential node, the bias unit receiving the reference voltage and generating a corresponding reference voltage by using the first potential and the middle potential as energy sources thereof, and a comparator unit coupled between the first and second power source terminals and the detection voltage terminal.

Abstract: Various methods for triggering the reporting of neighbor relation information are provided. One example method may include causing neighbor cell relation information to be stored in association with a transition from a first radio access technology to a second radio access technology, and determining that a user equipment has idle mode signaling reduction enabled. The example method may also include in response to at least performing the transition and determining that the user equipment has idle mode signaling reduction enabled, causing a connection to be established to send a neighbor cell relation information indicator, which indicates that the neighbor cell relation information is available to be reported from a user equipment to a network entity. Similar and related example methods, example apparatuses, and example computer program products are also provided.

Abstract: A method, apparatus and computer program product are provided for maintaining synchronization with respect to the security configurations of the network and a mobile terminal, even during a cell update procedure. A method may include causing a cell update message to be provided during performance of a cell update procedure and including, with the cell update message, a security configuration information element indicating that a mobile terminal has applied an updated security configuration in an instance in which the mobile terminal has applied the updated security configuration. The method may also include, with the cell update message, the information element indicating that the mobile terminal has reverted to a prior security configuration in an instance in which the mobile terminal has reverted to a prior security configuration. Corresponding apparatuses and computer program products are also provided.

Abstract: In this semiconductor device, the through-hole is formed in the substrate, and is located under the conductive pattern. The insulating layer is located at the bottom surface of the through-hole. The conductive pattern is located on one surface side of the substrate. The opening pattern is formed in the insulating layer which is located between the through-hole and the conductive pattern, where the distance r3 from the circumference of the opening pattern to the central axis of the through-hole is smaller than the distance r1 in the through-hole. By providing the opening pattern, the conductive pattern is exposed at the bottom surface of the through-hole. The bump is located on the back surface side of the substrate, and is formed integrally with the through-electrode.

Abstract: A constant current generation circuit of the invention includes: a temperature variable voltage generation unit that generates a first variation voltage whose voltage value fluctuates with temperature; a variation gradient adjustment unit that generates a second variation voltage based on a reference voltage smaller in the amount of variation with temperature than the first variation voltage and the first variation voltage; and a current generation unit that includes a current setting resistor whose resistance value fluctuates with temperature and generates an output current based on the second variation voltage and the current setting resistor. The variation gradient adjustment unit sets the coefficient of variation with temperature of the second variation voltage so that the difference between it and the coefficient of variation with temperature of the resistance value of the current setting resistor is within a preset first stipulated range.

Abstract: The semiconductor device 100 comprises a first semiconductor element 113 provided on a face on one side of a flat plate shaped interconnect component 101, an insulating resin 119 covering a face of a side where the first semiconductor element 113 of the interconnect component 101 is provided and a side face of the first semiconductor element 113, and a second semiconductor element 111 provided on a face on the other side of the interconnect component 101. The interconnect component 101 has a constitution where an interconnect layer 103, a silicon layer 105 and an insulating film 107 are sequentially formed. The interconnect layer 103 has a constitution where the interconnect layer 103 has a flat plate shaped insulating component and a conductive component extending through the insulating component. The first semiconductor element 113 is electrically connected with the second semiconductor element 111 through the conductive component.

Abstract: A hybrid integrated circuit device having high mount reliability comprises a module substrate which is a ceramic wiring substrate, a plurality of electronic component parts laid out on the main surface of the module substrate, a plurality of electrode terminals laid out on the rear surface of the module substrate, and a cap which is fixed to the module substrate to cover the main surface of the module substrate. The electrode terminals include ones which are aligned along the edges of the module substrate and power voltage supply terminals which are located inner than these electrode terminals. The electrode terminals aligned along the substrate edges are coated, at least in their portions close to the substrate edge, with a protection film having a thickness of several tens micrometers or less. Connection reinforcing terminals consist of a plurality of divided terminals which are independent of each other, and are ground terminals.

Abstract: A distance “a” from a first gate electrode of a first transistor of a high-frequency circuit to a first contact is greater than a distance “b” from a second electrode of a second transistor of a digital circuit to a second contact. The first contact is connected to a drain or source of the first transistor, and the second contact is connected to a drain or source of the second transistor.