Patents Assigned to RENESAS
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Patent number: 10354722Abstract: An assist driver is coupled to an end of a word line to which a word line driver is not coupled, and couples the other end of the word line to a first power source, in accordance with a voltage of the other end of the word line.Type: GrantFiled: September 28, 2018Date of Patent: July 16, 2019Assignee: Renesas Electronics CorporationInventor: Yuichiro Ishii
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Patent number: 10355122Abstract: Properties of a semiconductor device are improved. A semiconductor device having a superjunction structure, in which p-type column regions and n-type column regions are periodically arranged, is configured as follows. Each n-type column region has a vertical section including an n-type epitaxial layer located between trenches and a tapered embedded n-type epitaxial film disposed on a side face of the trench. Each p-type column region includes an embedded p-type epitaxial film disposed within the trench. The tapered embedded n-type epitaxial film is thus provided on the sidewall of the trench in which the p-type column region is to be disposed, thereby the p-type column region is allowed to have an inverted trapezoidal shape, leading to an increase in margin for a variation in concentration of a p-type impurity in the p-type column region. On resistance can be reduced by lateral diffusion of an n-type impurity (for example, As).Type: GrantFiled: June 30, 2017Date of Patent: July 16, 2019Assignee: Renesas Electronics CorporationInventors: Yuya Abiko, Satoshi Eguchi, Shigeaki Saito, Daisuke Taniguchi, Natsuo Yamaguchi
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Patent number: 10354996Abstract: A first transistor required for decreasing leak current and a second transistor required for compatibility of high speed operation and low power consumption can be formed over an identical substrate and sufficient performance can be provided to the two types of the transistors respectively. Decrease in the leak current is required for the first transistor. Less power consumption and high speed operation are required for the second transistor. The upper surface of a portion of a substrate in which the second diffusion layer is formed is lower than the upper surface of a portion of the substrate where the first diffusion layer is formed.Type: GrantFiled: January 30, 2018Date of Patent: July 16, 2019Assignee: Renesas Electronics CorporationInventors: Satoshi Kura, Mitsuo Nissa, Keiji Sakamoto, Taichi Iwasaki
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Patent number: 10354735Abstract: A semiconductor device includes a plurality of nonvolatile memory cells (1). Each of the nonvolatile memory cells comprises a MOS type first transistor section (3) used for information storage, and a MOS type second transistor section (4) which selects the first transistor section. The second transistor section has a bit line electrode (16) connected to a bit line, and a control gate electrode (18) connected to a control gate control line. The first transistor section has a source line electrode (10) connected to a source line, a memory gate electrode (14) connected to a memory gate control line, and a charge storage region (11) disposed directly below the memory gate electrode. A gate withstand voltage of the second transistor section is lower than that of the first transistor section.Type: GrantFiled: August 29, 2018Date of Patent: July 16, 2019Assignee: Renesas Electronics CorporationInventors: Toshihiro Tanaka, Yukiko Umemoto, Mitsuru Hiraki, Yutaka Shinagawa, Masamichi Fujito, Kazufumi Suzukawa, Hiroyuki Tanikawa, Takashi Yamaki, Yoshiaki Kamigaki, Shinichi Minami, Kozo Katayama, Nozomu Matsuzaki
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Patent number: 10356437Abstract: A moving image encoding apparatus executes moving image encoding of a syntax element relating to a moving image signal VS to form an encoded bitstream CVBS. Padding processing of adding padding processing data PD to the moving image signal VS is executed prior to the moving image encoding. Then it is determined whether the encoded block of the syntax element belongs to the moving image signal VS or the padding processing data PD. In the case that the encoded block belongs to the former, an encoded bitstream having a large code amount is formed. In the case where the encoded block belongs to the latter, an encoded bitstream having a small code amount is formed.Type: GrantFiled: July 22, 2013Date of Patent: July 16, 2019Assignee: Renesas Electronics CorporationInventors: Ryoji Hashimoto, Kenichi Iwata, Kazushi Akie
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Patent number: 10353451Abstract: In a system using a device not adapted to a single wire bus, a semiconductor device includes an external terminal to be coupled to a power source terminal of an external device, a port that supplies a power source voltage for the external device to the external terminal, a power manager that controls an output of the port, and a CPU that controls an operation of the power manager.Type: GrantFiled: August 11, 2016Date of Patent: July 16, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Tatsuya Ishikawa, Yoshiaki Daimon, Norihiko Ishizaki, Yuichi Iwaya
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Patent number: 10355161Abstract: To achieve a high-reliability germanium photoreceiver. A photoreceiver portion of a germanium photoreceiver comprised of a p type silicon core layer, an i type germanium layer, and an n type silicon layer is covered with a second insulating film and from a coupling hole formed in the second insulating film, a portion of the upper surface of the photoreceiver portion is exposed. The coupling hole has, on the inner wall thereof, a barrier metal film and the barrier metal film has thereon a first-layer wiring made of a tungsten film. Tungsten hardly diffuses from the tungsten film into the i type germanium layer even when a thermal stress is applied, making it possible to prevent the resulting germanium photoreceiver from having diode characteristics deteriorated by the thermal stress.Type: GrantFiled: September 13, 2017Date of Patent: July 16, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Teruhiro Kuwajima, Shinichi Watanuki, Futoshi Komatsu, Tomoo Nakayama
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Patent number: 10346231Abstract: A watchdog timer circuit for use in microcomputer monitor systems is disclosed. This circuit includes a timer circuit responsive to receipt of a count clock signal for counting it up, and a timer control circuit which loads an externally inputted data signal (stn) in sync with a timer refresh instruction (prun) and holds therein a sequentially loaded latest multi-bit data signal as reference data. When the reference data agrees with a predefined pattern and simultaneously another prespecified condition is met, the timer control circuit interrupts the clock signal counting operation of the timer circuit. During interruption of the counting operation, when the reference data does not agree with the predefined pattern or when the above-stated another prespecified condition becomes unsatisfied, the control circuit allows the timer circuit to restart the clock signal counting operation.Type: GrantFiled: September 21, 2017Date of Patent: July 9, 2019Assignee: Renesas Electronics CorporationInventors: Toshiaki Furuya, Osamu Watanabe, Satoshi Kondo
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Patent number: 10347567Abstract: In a resin sealing type semiconductor device, a semiconductor chip CP2 is mounted over a die pad DP having conductivity via a bonding member BD2 having insulation property, and a semiconductor chip CP1 is mounted over the die pad DP via a bonding member BD1 having conductivity. A first length of a portion, in a first side formed by an intersection of a first side surface and a second side surface of the semiconductor chip CP2, covered with the bonding member BD2 is larger than a second length of a portion, in a second side formed by an intersection of a third side surface and a fourth side surface of the semiconductor chip CP1, covered with the bonding member BD1.Type: GrantFiled: June 27, 2018Date of Patent: July 9, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Atsushi Nishikizawa, Yuichi Yato, Hiroi Oka, Tadatoshi Danno, Hiroyuki Nakamura
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Patent number: 10347604Abstract: To provide a semiconductor device having improved reliability. A method of manufacturing the semiconductor device includes connecting a wire comprised of copper with a conductive layer formed on the pad electrode of a semiconductor chip, heat treating the semiconductor chip, and then sealing the semiconductor chip and the wire with a resin.Type: GrantFiled: February 21, 2018Date of Patent: July 9, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yuki Yagyu, Seiya Isozaki
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Patent number: 10348969Abstract: A camera module detects a camera shake in an optical axis in an optical system based on a detection result by a vibration detecting sensor. To correct a part amount of a camera shake, the module controls an actuator in a manner that a correction lens shifts in a plane vertical to the optical axis based on an amount of optical image stabilization. To correct a left amount of the camera shake, the module transmits data representing the correction left amount of the camera shake to an image processing module. The image processing module receives the data representing the correction left amount of the camera shake, and changes an effective region of picked-up image data included in frame data, based on an amount of electronic image stabilization in accordance with the correction left amount.Type: GrantFiled: July 29, 2017Date of Patent: July 9, 2019Assignee: Renesas Electronics CorporationInventors: Hiroshi Murakami, Hirohide Okuno, Toshiya Suzuki
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Patent number: 10348220Abstract: A PWM modulation circuit controls low-side transistors of three phases to all be in an ON state when a brake current flows; controls, in a period in which a brake current flows in a first direction in one phase, a transistor for sensing in that one phase to be in an ON state; and controls, in a period in which a brake current flows in the first direction in two phases, transistors for three phases to be in an OFF state. When the brake current is to flow, sense-phase control circuits for the three phases control a transistor for sensing, in a phase in which the brake current flows in a sink direction, to be into an ON state, and controls the transistor for sensing in a phase in which the brake current flows in an opposite direction, to be into an OFF state.Type: GrantFiled: June 11, 2018Date of Patent: July 9, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Minoru Kurosawa, Seigi Ishiji
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Patent number: 10348183Abstract: A semiconductor device includes a plurality of H-bridge circuits and a logic circuit which is commonly used for the plurality of H-bridge circuits. The logic circuit controls driving of each of the plurality of H-bridge circuits on the basis of signals which are input thereinto in such a manner that a combination of respective driving states of the plurality of H-bridge circuits meets a predetermined condition.Type: GrantFiled: February 21, 2018Date of Patent: July 9, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Shinpei Watanabe
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Patent number: 10347552Abstract: A semiconductor device includes first and second semiconductor components mounted on an interposer mounted on a wiring substrate, and electrically connected to each other via the interposer. Also, a plurality of wiring layers of the interposer include first, second and third wiring layers which are stacked in order from a main surface side to be a reference. In addition, in a first region of the interposer sandwiched between the first semiconductor component and the second semiconductor component, a ratio of a reference potential wiring in the third wiring layer is higher than a ratio of a reference potential wiring in the first wiring layer. Further, in the first region, a ratio of a signal wiring in the first wiring layer is higher than a ratio of a signal wiring in the third wiring layer.Type: GrantFiled: January 25, 2018Date of Patent: July 9, 2019Assignee: Renesas Electronics CorporationInventors: Ryuichi Oikawa, Toshihiko Ochiai, Shuuichi Kariyazaki, Yuji Kayashima, Tsuyoshi Kida
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Patent number: 10346336Abstract: The disclosed invention is to provide a semiconductor device enabling it to access an internal device within a USB cable in a simple way. Disclosed is a semiconductor device which is able to be coupled to at least one USB cable and which includes a decision unit that decides whether or not an opposite-end device is detected through the USB cable; and a control unit that, if the decision unit has judged that the opposite-end device is not detected through the USB cable, supplies one of two signal lines which are coupled to an internal device within the USB cable with a power supply voltage and implements control of communication with the internal device within the USB cable through the other one of the signal lines.Type: GrantFiled: October 10, 2017Date of Patent: July 9, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Masashi Tominaga
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Patent number: 10349072Abstract: An in-vehicle system includes a camera having an encoder encoding video obtained by the camera, an image processing apparatus which receives the encoded video from the camera, and an image recognition processing circuit performing image recognition on decoded video data from the image processing apparatus. The image processing apparatus includes a codec processing circuit which decodes the encoded video, a plurality of image processing circuits which execute tasks in parallel, an estimating circuit which estimates estimation time in which a process of the task is completed in each of the image processing circuit on the basis of the number of access times to a bus which is obtained on the basis of a parameter of decoding used in the codec processing circuit, and a scheduling circuit which schedules tasks to be executed by the plurality of image processing circuit on the basis of the estimation time.Type: GrantFiled: May 24, 2017Date of Patent: July 9, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Katsushige Matsubara, Takayuki Matsumi, Seiji Mochizuki, Kenichi Iwata, Toshiyuki Kaya
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Patent number: 10340291Abstract: Reliability of a semiconductor device is improved. A p-type MISFET of a thin film SOI type is formed in an SOI substrate including a semiconductor substrate, an insulating layer on the semiconductor substrate, and a semiconductor layer on the insulating layer, and n+-type semiconductor regions which are source and drain region of the p-type MISFET are formed in the semiconductor layer and an epitaxial layer on the semiconductor layer. A semiconductor layer is formed via the insulating layer below the p-type MISFET formed in the n-type well region of the semiconductor substrate. In an n-type tap region which is a power supply region of the n-type well region, a silicide layer is formed on a main surface of the n-type well region without interposing the epitaxial layer therebetween.Type: GrantFiled: September 30, 2017Date of Patent: July 2, 2019Assignee: Renesas Electronics CorporationInventors: Nobuo Tsuboi, Yoshiki Yamamoto
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Patent number: 10340955Abstract: A data processing circuit includes an error processing circuit and a memory. Word data is configured by main body data to be divided into a plurality of partial words and redundant data. The redundant data is configured by error correction additional bits generated from the main body data on the basis of a predetermined error correction algorithm and the error correction additional bits include a plurality of parity bits corresponding to the partial words. The error processing circuit includes error correction circuit and parity check circuit into which the word data is input in parallel. The error correction circuit decides an error type by using the redundant data and corrects a correctable error. The parity check circuit performs a parity check on the basis of access-requested partial word and the corresponding parity bit.Type: GrantFiled: January 14, 2016Date of Patent: July 2, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Tomoichi Hayashi
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Patent number: 10340338Abstract: A semiconductor device according to one embodiment includes a semiconductor substrate having a first surface, an insulating isolation structure having a first depth, and a gate electrode. The semiconductor substrate has source and drain regions, a reverse conductivity region having a second depth, a body region, and a drift region. The source region, the drift region, and the drain region are of a first conductivity type, and the body region and the reverse conductivity region are of a second conductivity type which is opposite to the first conductivity type. The insulating isolation structure is disposed between the drain region and the reverse conductivity region. The first depth is larger than the second depth.Type: GrantFiled: November 11, 2017Date of Patent: July 2, 2019Assignee: Renesas Electronics CorporationInventor: Takahiro Mori
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Patent number: 10341213Abstract: An object of the present invention is to generate a clock also before reception of a packet in a reception device. A reception device has: a storage unit storing a true time-stamp included in a received packet including audio data and the true time-stamp expressing reproduction time of the audio data; a timer counting time; a dummy time-stamp generation unit generating a dummy time-stamp as a false time-stamp; a comparator comparing time based on the true time-stamp stored in the storage unit or the dummy time-stamp and time indicated by the timer; and a clock generation unit generating a clock in accordance with a comparison result of the comparator. The comparator performs comparison using the dummy time-stamp until a predetermined condition is satisfied and, after the predetermined condition is satisfied, performs comparison using the true time-stamp.Type: GrantFiled: December 14, 2017Date of Patent: July 2, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Hirofumi Shigehisa, Teruhisa Takeda, Akihito Sakai, Hirohisa Furukawa