Patents Assigned to Sensor Electronics Technology, Inc.
  • Superlattice Structure
    Publication number: 20160343902
    Abstract: A superlattice layer including a plurality of periods, each of which is formed from a plurality of sub-layers is provided. Each sub-layer comprises a different composition than the adjacent sub-layer(s) and comprises a polarization that is opposite a polarization of the adjacent sub-layer(s). In this manner, the polarizations of the respective adjacent sub-layers compensate for one another. Furthermore, the superlattice layer can be configured to be at least partially transparent to radiation, such as ultraviolet radiation.
    Type: Application
    Filed: August 8, 2016
    Publication date: November 24, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Alexander Dobrinsky
  • Semiconductor Structure with Stress-Reducing Buffer Structure
    Publication number: 20160343904
    Abstract: A semiconductor structure comprising a buffer structure and a set of semiconductor layers formed adjacent to a first side of the buffer structure is provided. The buffer structure can have an effective lattice constant and a thickness such that an overall stress in the set of semiconductor layers at room temperature is compressive and is in a range between approximately 0.1 GPa and 2.0 GPa. The buffer structure can be grown using a set of growth parameters selected to achieve the target effective lattice constant a, control stresses present during growth of the buffer structure, and/or control stresses present after the semiconductor structure has cooled.
    Type: Application
    Filed: August 8, 2016
    Publication date: November 24, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Jinwei Yang, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Stress relieving semiconductor layer
    Patent number: 9502509
    Abstract: A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: November 22, 2016
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Jinwei Yang, Wenhong Sun, Rakesh Jain, Michael Shur, Remigijus Gaska
  • Semiconductor Structure with Inhomogeneous Regions
    Publication number: 20160336483
    Abstract: A semiconductor layer including a plurality of inhomogeneous regions is provided. Each inhomogeneous region has one or more attributes that differ from a material forming the semiconductor layer. The inhomogeneous regions can include one or more regions configured based on radiation having a target wavelength. These regions can include transparent and/or reflective regions. The inhomogeneous regions also can include one or more regions having a higher conductivity than a conductivity of the radiation-based regions, e.g., at least ten percent higher. In one embodiment, the semiconductor layer is used to form an optoelectronic device.
    Type: Application
    Filed: August 1, 2016
    Publication date: November 17, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Alexander Dobrinsky, Rakesh Jain, Michael Shur
  • Medical Device Treatment
    Publication number: 20160324996
    Abstract: An ultraviolet illuminator for providing a cleaning treatment to a medical device is disclosed. The ultraviolet illuminator can include an ultraviolet cleaning treatment system that operates in conjunction with at least one ultraviolet radiation source and sensor to clean surfaces of a medical device for purposes of disinfection, sterilization, and/or sanitization. The ultraviolet illuminator is suitable for a wide variety of medical devices, instruments and equipment. Stethoscopes and medical instrument probes are illustrative examples of some devices that can be used with the ultraviolet illuminator.
    Type: Application
    Filed: April 26, 2016
    Publication date: November 10, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Yuri Bilenko, Timothy James Bettles, Alexander Dobrinsky, Michael Shur
  • Patterned Layer Design for Group III Nitride Layer Growth
    Publication number: 20160322535
    Abstract: A device having a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions.
    Type: Application
    Filed: July 18, 2016
    Publication date: November 3, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Rakesh Jain, Wenhong Sun, Jinwei Yang, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Lateral/Vertical Semiconductor Device
    Publication number: 20160322466
    Abstract: A lateral semiconductor device and/or design including a space-charge generating layer and an electrode or a set of electrodes located on an opposite side of a device channel as contacts to the device channel is provided. The space-charge generating layer is configured to form a space-charge region to at least partially deplete the device channel in response to an operating voltage being applied to the contacts to the device channel.
    Type: Application
    Filed: July 12, 2016
    Publication date: November 3, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Grigory Simin, Mikhail Gaevski, Michael Shur, Remigijus Gaska
  • Device with Transparent and Higher Conductive Regions in Lateral Cross Section of Semiconductor Layer
    Publication number: 20160315219
    Abstract: A device including one or more layers with lateral regions configured to facilitate the transmission of radiation through the layer and lateral regions configured to facilitate current flow through the layer is provided. The layer can comprise a short period superlattice, which includes barriers alternating with wells. In this case, the barriers can include both transparent regions, which are configured to reduce an amount of radiation that is absorbed in the layer, and higher conductive regions, which are configured to keep the voltage drop across the layer within a desired range.
    Type: Application
    Filed: July 1, 2016
    Publication date: October 27, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Maxim S. Shatalov, Alexander Dobrinsky, Remigijus Gaska, Jinwei Yang
  • Electron Beam Pumping for Light Emission
    Publication number: 20160315449
    Abstract: A device is provided in which a light emitting semiconductor structure is excited by an electron beam that impacts a region of a lateral surface of the light emitting semiconductor structure at an angle to the normal of the lateral surface that is non-zero. The non-zero angle can be configured to cause excitation in a desired region of the light emitting semiconductor structure. The device can include wave guiding layer(s) and/or other features to improve the light generation and/or operation of the device.
    Type: Application
    Filed: April 27, 2016
    Publication date: October 27, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Michael Shur, Alexander Dobrinsky
  • Perforated channel field effect transistor
    Patent number: 9467105
    Abstract: A device including a plurality of perforations to a semiconductor channel is provided. The device includes a semiconductor structure forming the semiconductor channel. Additionally, the device includes a source contact, a drain contact, and a gate contact to the semiconductor channel. The plurality of perforations can be located in the semiconductor structure below the gate contact. Furthermore, a perforation in the plurality of perforations can extend into the semiconductor structure beyond a location of the semiconductor channel.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: October 11, 2016
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Grigory Simin, Mikhail Gaevski, Michael Shur, Remigijus Gaska
  • Semiconductor Material Doping
    Publication number: 20160260867
    Abstract: A solution for designing and/or fabricating a structure including a quantum well and an adjacent barrier is provided. A target band discontinuity between the quantum well and the adjacent barrier is selected to coincide with an activation energy of a dopant for the quantum well and/or barrier. For example, a target valence band discontinuity can be selected such that a dopant energy level of a dopant in the adjacent barrier coincides with a valence energy band edge for the quantum well and/or a ground state energy for free carriers in a valence energy band for the quantum well. Additionally, a target doping level for the quantum well and/or adjacent barrier can be selected to facilitate a real space transfer of holes across the barrier. The quantum well and the adjacent barrier can be formed such that the actual band discontinuity and/or actual doping level(s) correspond to the relevant target(s).
    Type: Application
    Filed: March 14, 2016
    Publication date: September 8, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Remigijus Gaska, Jinwei Yang, Michael Shur, Alexander Dobrinsky
  • Deep ultraviolet light emitting diode
    Patent number: 9437774
    Abstract: A method of fabricating a light emitting diode, which includes an n-type contact layer and a light generating structure adjacent to the n-type contact layer, is provided. The light generating structure includes a set of quantum wells. The contact layer and light generating structure can be configured so that a difference between an energy of the n-type contact layer and an electron ground state energy of a quantum well is greater than an energy of a polar optical phonon in a material of the light generating structure. Additionally, the light generating structure can be configured so that its width is comparable to a mean free path for emission of a polar optical phonon by an electron injected into the light generating structure.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: September 6, 2016
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Remigijus Gaska, Maxim S. Shatalov, Michael Shur, Alexander Dobrinsky
  • Stress Relieving Semiconductor Layer
    Publication number: 20160247885
    Abstract: A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.
    Type: Application
    Filed: May 2, 2016
    Publication date: August 25, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Jinwei Yang, Wenhong Sun, Rakesh Jain, Michael Shur, Remigijus Gaska
  • Heterostructure including anodic aluminum oxide layer
    Patent number: 9425353
    Abstract: A semiconductor structure including an anodic aluminum oxide layer is described. The anodic aluminum oxide layer can be located between a semiconductor layer and another layer of material. The anodic aluminum oxide layer can include a plurality of pores extending to an adjacent surface of the semiconductor layer. The layer of material can penetrate at least some of the plurality of pores and directly contact the semiconductor layer. In an illustrative embodiment, the layer of material is a conductive material and the anodic aluminum oxide is located at a p-type contact.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: August 23, 2016
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Maxim S. Shatalov, Alexander Dobrinsky, Remigijus Gaska
  • Patterned Substrate Design for Layer Growth
    Publication number: 20160240739
    Abstract: A patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers, is provided. The patterned surface can include a set of substantially flat top surfaces and a plurality of openings. Each substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the openings can have a characteristic size between approximately 0.1 micron and five microns. One or more of the substantially flat top surfaces can be patterned based on target radiation.
    Type: Application
    Filed: April 26, 2016
    Publication date: August 18, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Rakesh Jain, Jinwei Yang, Michael Shur, Remigijus Gaska
  • Reflective transparent optical chamber
    Patent number: 9415126
    Abstract: A chamber configured to increase an intensity of target radiation emitted therein is provided. The chamber includes an enclosure at least partially formed by a set of transparent walls. Each transparent wall can comprise a first material transparent to the target radiation and having a refractive index greater than 1.1 for the target radiation. The outer surface of the set of transparent walls can include a set of cavities, each cavity comprising an approximately prismatic void. Additionally, a medium located adjacent to an outer surface of the set of transparent walls can have a refractive index within approximately one percent of a refractive index of a vacuum for the target radiation.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: August 16, 2016
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Semiconductor structure with stress-reducing buffer structure
    Patent number: 9412902
    Abstract: A semiconductor structure comprising a buffer structure and a set of semiconductor layers formed adjacent to a first side of the buffer structure is provided. The buffer structure can have an effective lattice constant and a thickness such that an overall stress in the set of semiconductor layers at room temperature is compressive and is in a range between approximately 0.1 GPa and 2.0 GPa. The buffer structure can be grown using a set of growth parameters selected to achieve the target effective lattice constant a, control stresses present during growth of the buffer structure, and/or control stresses present after the semiconductor structure has cooled.
    Type: Grant
    Filed: February 22, 2015
    Date of Patent: August 9, 2016
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Jinwei Yang, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Superlattice structure
    Patent number: 9412901
    Abstract: A superlattice layer including a plurality of periods, each of which is formed from a plurality of sub-layers is provided. Each sub-layer comprises a different composition than the adjacent sub-layer(s) and comprises a polarization that is opposite a polarization of the adjacent sub-layer(s). In this manner, the polarizations of the respective adjacent sub-layers compensate for one another. Furthermore, the superlattice layer can be configured to be at least partially transparent to radiation, such as ultraviolet radiation.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: August 9, 2016
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Remigijus Gaska, Jinwei Yang, Alexander Dobrinsky
  • Light Emitting Heterostructure with Partially Relaxed Semiconductor Layer
    Publication number: 20160225941
    Abstract: A light emitting heterostructure including a partially relaxed semiconductor layer is provided. The partially relaxed semiconductor layer can be included as a sublayer of a contact semiconductor layer of the light emitting heterostructure. A dislocation blocking structure also can be included adjacent to the partially relaxed semiconductor layer.
    Type: Application
    Filed: April 12, 2016
    Publication date: August 4, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Semiconductor Device with Multiple Space-Charge Control Electrodes
    Publication number: 20160225863
    Abstract: A circuit including a semiconductor device having a set of space-charge control electrodes is provided. The set of space-charge control electrodes is located between a first terminal, such as a gate or a cathode, and a second terminal, such as a drain or an anode, of the device. The circuit includes a biasing network, which supplies an individual bias voltage to each of the set of space-charge control electrodes. The bias voltage for each space-charge control electrode can be: selected based on the bias voltages of each of the terminals and a location of the space-charge control electrode relative to the terminals and/or configured to deplete a region of the channel under the corresponding space-charge control electrode at an operating voltage applied to the second terminal.
    Type: Application
    Filed: April 12, 2016
    Publication date: August 4, 2016
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Grigory Simin, Michael Shur, Remigijus Gaska