Patents Assigned to Sensor Electronics Technology, Inc.
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Publication number: 20170047495Abstract: An optoelectronic semiconductor device with one or more ferromagnetic domains and method for processing an optoelectronic semiconductor device and/or devices with the ferromagnetic domain(s) is described. In one embodiment, the optoelectronic semiconductor device can include a semiconductor structure having a substrate, an n-type contact layer formed over the substrate, an active layer formed over the n-type contact layer, and a p-type contact layer formed over the active layer; and at least one ferromagnetic domain located on the semiconductor structure. The method for processing can include moving and/or assembling the optoelectronic semiconductor device(s) into a system.Type: ApplicationFiled: August 4, 2016Publication date: February 16, 2017Applicant: Sensor Electronic Technology, Inc.Inventors: Michael Shur, Alexander Dobrinsky
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Patent number: 9562171Abstract: A composite material, which can be used as an encapsulant for an ultraviolet device, is provided. The composite material includes a matrix material and at least one filler material incorporated in the matrix material that are both at least partially transparent to ultraviolet radiation of a target wavelength. The filler material includes microparticles and/or nanoparticles and can have a thermal coefficient of expansion significantly smaller than a thermal coefficient of expansion of the matrix material for relevant atmospheric conditions. The relevant atmospheric conditions can include a temperature and a pressure present during each of: a curing and a cool down process for fabrication of a device package including the composite material and normal operation of the ultraviolet device within the device package.Type: GrantFiled: September 21, 2012Date of Patent: February 7, 2017Assignee: Sensor Electronic Technology, Inc.Inventors: Remigijus Gaska, Maxim S. Shatalov, Alexander Dobrinsky, Jinwei Yang, Michael Shur
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Patent number: 9550004Abstract: A solution for generating ultraviolet diffusive radiation is provided. A diffusive ultraviolet radiation illuminator includes at least one ultraviolet radiation source located within a reflective cavity that includes a plurality of surfaces. At least one of the plurality of surfaces can be configured to diffusively reflect at least 70% of the ultraviolet radiation and at least one of the plurality of surfaces can be configured to transmit at least 30% of the ultraviolet radiation and reflect at least 10% of the ultraviolet radiation.Type: GrantFiled: September 5, 2014Date of Patent: January 24, 2017Assignee: Sensor Electronic Technology, Inc.Inventors: Saulius Smetona, Alexander Dobrinsky, Yuri Bilenko, Michael Shur
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Publication number: 20170018680Abstract: A contact to a semiconductor heterostructure is described. In one embodiment, there is an n-type semiconductor contact layer. A light generating structure formed over the n-type semiconductor contact layer has a set of quantum wells and barriers configured to emit or absorb target radiation. An ultraviolet transparent semiconductor layer having a non-uniform thickness is formed over the light generating structure. A p-type contact semiconductor layer having a non-uniform thickness is formed over the ultraviolet transparent semiconductor layer.Type: ApplicationFiled: July 12, 2016Publication date: January 19, 2017Applicant: Sensor Electronic Technology, Inc.Inventors: Michael Shur, Alexander Dobrinsky
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Patent number: 9548429Abstract: A solution for packaging an optoelectronic device using an ultraviolet transparent polymer is provided. The ultraviolet transparent polymer material can be placed adjacent to the optoelectronic device and/or a device package on which the optoelectronic device is mounted. Subsequently, the ultraviolet transparent polymer material can be processed to cause the ultraviolet transparent polymer material to adhere to the optoelectronic device and/or the device package. The ultraviolet transparent polymer can be adhered in a manner that protects the optoelectronic device from the ambient environment.Type: GrantFiled: May 11, 2015Date of Patent: January 17, 2017Assignee: Sensor Electronic Technology, Inc.Inventors: Maxim S. Shatalov, Saulius Smetona, Alexander Dobrinsky, Michael Shur
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Patent number: 9543400Abstract: A solution for forming an ohmic contact to a semiconductor layer is provided. A masking material is applied to a set of contact regions on the surface of the semiconductor layer. Subsequently, one or more layers of a device heterostructure are formed on the non-masked region(s) of the semiconductor layer. The ohmic contact can be formed after the one or more layers of the device heterostructure are formed. The ohmic contact formation can be performed at a processing temperature lower than a temperature range within which a quality of a material forming any semiconductor layer in the device heterostructure is damaged.Type: GrantFiled: December 17, 2015Date of Patent: January 10, 2017Assignee: Sensor Electronics Technology, Inc.Inventors: Remigijus Gaska, Michael Shur, Jinwei Yang, Alexander Dobrinsky, Maxim S. Shatalov
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Publication number: 20170005224Abstract: Fabrication of a heterostructure, such as a group III nitride heterostructure, for use in an optoelectronic device is described. The heterostructure can be epitaxially grown on a sacrificial layer, which is located on a substrate structure. The sacrificial layer can be at least partially decomposed using a laser. The substrate structure can be completely removed from the heterostructure or remain attached thereto. One or more additional solutions for detaching the substrate structure from the heterostructure can be utilized. The heterostructure can undergo additional processing to form the optoelectronic device.Type: ApplicationFiled: July 1, 2016Publication date: January 5, 2017Applicant: Sensor Electronic Technology, Inc.Inventors: Michael Shur, Alexander Dobrinsky, Maxim S. Shatalov
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Publication number: 20170005228Abstract: A heterostructure for use in fabricating an optoelectronic device is provided. The heterostructure includes a layer, such as an n-type contact or cladding layer, that includes thin sub-layers inserted therein. The thin sub-layers can be spaced throughout the layer and separated by intervening sub-layers fabricated of the material for the layer. The thin sub-layers can have a distinct composition from the intervening sub-layers, which alters stresses present during growth of the heterostructure.Type: ApplicationFiled: September 15, 2016Publication date: January 5, 2017Applicant: Sensor Electronic Technology, Inc.Inventors: Daniel Billingsley, Robert M. Kennedy, Wenhong Sun, Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
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Publication number: 20170005246Abstract: A multi-layered contact to a semiconductor structure and a method of making is described. In one embodiment, the contact includes a discontinuous Chromium layer formed over the semiconductor structure. A discontinuous Titanium layer is formed directly on the Chromium layer, wherein portions of the Titanium layer extend into at least some of the discontinuous sections of the Chromium layer. A discontinuous Aluminum layer is formed directly on the Chromium layer, wherein portions of the Aluminum layer extend into at least some of the discontinuous sections of the Titanium layer and the Chromium layer.Type: ApplicationFiled: June 30, 2016Publication date: January 5, 2017Applicant: Sensor Electronic Technology, Inc.Inventors: Michael Shur, Alexander Dobrinsky
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Patent number: 9537054Abstract: A heterostructure for use in fabricating an optoelectronic device is provided. The heterostructure includes a layer, such as an n-type contact or cladding layer, that includes thin sub-layers inserted therein. The thin sub-layers can be spaced throughout the layer and separated by intervening sub-layers fabricated of the material for the layer. The thin sub-layers can have a distinct composition from the intervening sub-layers, which alters stresses present during growth of the heterostructure.Type: GrantFiled: April 15, 2015Date of Patent: January 3, 2017Assignee: Sensor Electronic Technology, Inc.Inventors: Daniel D. Billingsley, Robert M. Kennedy, Wenhong Sun, Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
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Publication number: 20160380150Abstract: A method of fabricating a light emitting diode, which includes an n-type contact layer and a light generating structure adjacent to the n-type contact layer, is provided. The light generating structure includes a set of quantum wells. The contact layer and light generating structure can be configured so that a difference between an energy of the n-type contact layer and an electron ground state energy of a quantum well is greater than an energy of a polar optical phonon in a material of the light generating structure. Additionally, the light generating structure can be configured so that its width is comparable to a mean free path for emission of a polar optical phonon by an electron injected into the light generating structure.Type: ApplicationFiled: September 6, 2016Publication date: December 29, 2016Applicant: Sensor Electronic Technology, Inc.Inventors: Remigijus Gaska, Maxim S. Shatalov, Michael Shur, Alexander Dobrinsky
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Publication number: 20160359031Abstract: A switch includes an input contact and an output contact to a conducting channel. At least one of the input and output contacts is capacitively coupled to the conducting channel. A control contact is located outside of a region between the input and output contacts, and can be used to adjust the switch between on and off operating states. The switch can be implemented as a radio frequency switch in a circuit.Type: ApplicationFiled: April 25, 2016Publication date: December 8, 2016Applicant: Sensor Electronic Technology, Inc.Inventors: Grigory Simin, Michael Shur, Remigijus Gaska
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Publication number: 20160359081Abstract: A solution for fabricating a device is described. The solution can include fabricating a heterostructure for the device, which includes at least one stress controlling layer. The stress controlling layer can include one or more attributes varies as a function of a lateral position based on a target variation of stresses in a semiconductor layer located directly under the stress controlling layer. Embodiments are further directed to a heterostructure including at least one stress controlling layer and a device including the heterostructure.Type: ApplicationFiled: June 5, 2016Publication date: December 8, 2016Applicant: Sensor Electronic Technology, Inc.Inventors: Michael Shur, Alexander Dobrinsky
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Publication number: 20160355947Abstract: An approach for heating a susceptor during an epitaxial growth process of semiconductor layers in an epitaxial growth chamber is described. A main heating unit heats a region of the susceptor supporting a wafer. An auxiliary heating unit supports the main heating unit in heating the susceptor when the temperature distribution over the surface of the wafer fails to satisfy a target temperature distribution. The control unit monitors the temperature distribution over the surface of the wafer while the susceptor is heated by both the main heating unit and the auxiliary heating unit and adjusts at least one of a multitude of operating parameters for the auxiliary heating unit in response to determining that the temperature distribution over the surface of the wafer while the susceptor is heated by the main heating unit and the auxiliary heating unit is failing to satisfy the target temperature distribution.Type: ApplicationFiled: June 5, 2016Publication date: December 8, 2016Applicant: Sensor Electronic Technology, Inc.Inventors: Alexander Dobrinsky, Michael Shur
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Patent number: 9514947Abstract: A contact to a semiconductor including sequential layers of Cr, Ti, and Al is provided, which can result in a contact with one or more advantages over Ti/Al-based and Cr/Al-based contacts. For example, the contact can: reduce a contact resistance; provide an improved surface morphology; provide a better contact linearity; and/or require a lower annealing temperature, as compared to the prior art Ti/Al-based contacts.Type: GrantFiled: June 23, 2015Date of Patent: December 6, 2016Assignee: Sensor Electronic Technology, Inc.Inventors: Remigijus Gaska, Xuhong Hu, Michael Shur, Mikhail Gaevski
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Publication number: 20160343904Abstract: A semiconductor structure comprising a buffer structure and a set of semiconductor layers formed adjacent to a first side of the buffer structure is provided. The buffer structure can have an effective lattice constant and a thickness such that an overall stress in the set of semiconductor layers at room temperature is compressive and is in a range between approximately 0.1 GPa and 2.0 GPa. The buffer structure can be grown using a set of growth parameters selected to achieve the target effective lattice constant a, control stresses present during growth of the buffer structure, and/or control stresses present after the semiconductor structure has cooled.Type: ApplicationFiled: August 8, 2016Publication date: November 24, 2016Applicant: Sensor Electronic Technology, Inc.Inventors: Maxim S. Shatalov, Jinwei Yang, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
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Publication number: 20160343901Abstract: A device comprising a semiconductor layer including a plurality of compositional inhomogeneous regions is provided. The difference between an average band gap for the plurality of compositional inhomogeneous regions and an average band gap for a remaining portion of the semiconductor layer can be at least thermal energy. Additionally, a characteristic size of the plurality of compositional inhomogeneous regions can be smaller than an inverse of a dislocation density for the semiconductor layer.Type: ApplicationFiled: August 1, 2016Publication date: November 24, 2016Applicant: Sensor Electronic Technology, Inc.Inventors: Michael Shur, Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Jinwei Yang, Remigijus Gaska, Mikhail Gaevski
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Publication number: 20160343902Abstract: A superlattice layer including a plurality of periods, each of which is formed from a plurality of sub-layers is provided. Each sub-layer comprises a different composition than the adjacent sub-layer(s) and comprises a polarization that is opposite a polarization of the adjacent sub-layer(s). In this manner, the polarizations of the respective adjacent sub-layers compensate for one another. Furthermore, the superlattice layer can be configured to be at least partially transparent to radiation, such as ultraviolet radiation.Type: ApplicationFiled: August 8, 2016Publication date: November 24, 2016Applicant: Sensor Electronic Technology, Inc.Inventors: Michael Shur, Alexander Dobrinsky
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Patent number: 9502509Abstract: A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.Type: GrantFiled: March 29, 2016Date of Patent: November 22, 2016Assignee: Sensor Electronic Technology, Inc.Inventors: Maxim S. Shatalov, Jinwei Yang, Wenhong Sun, Rakesh Jain, Michael Shur, Remigijus Gaska
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Publication number: 20160336483Abstract: A semiconductor layer including a plurality of inhomogeneous regions is provided. Each inhomogeneous region has one or more attributes that differ from a material forming the semiconductor layer. The inhomogeneous regions can include one or more regions configured based on radiation having a target wavelength. These regions can include transparent and/or reflective regions. The inhomogeneous regions also can include one or more regions having a higher conductivity than a conductivity of the radiation-based regions, e.g., at least ten percent higher. In one embodiment, the semiconductor layer is used to form an optoelectronic device.Type: ApplicationFiled: August 1, 2016Publication date: November 17, 2016Applicant: Sensor Electronic Technology, Inc.Inventors: Maxim S. Shatalov, Alexander Dobrinsky, Rakesh Jain, Michael Shur
