Patents Assigned to Silicon Laboratories
  • Low-ringing output driver
    Patent number: 10469075
    Abstract: A driver circuit has pre-driver and transistor pairs coupled in parallel paths with different delays in different paths allowing the driver to automatically adjust to load conditions, providing a moderate driver with low output ringing for low capacitive loads, while the added delay in the different paths is negligible when driving heavy capacitive loads. The driver circuit automatically scales drive strength of the output driver during switching transients to the load capacitance, providing a good trade-off between fast transient and low output ringing for a variety of different capacitive loads.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: November 5, 2019
    Assignee: Silicon Laboratories Inc.
    Inventor: András V. Horváth
  • Slew-rate controlled supply voltage switching
    Patent number: 10468983
    Abstract: An apparatus includes a slew rate regulation circuit, a plurality of switches and a controller circuit. The controller circuit controls the plurality of switches to decouple a first source supply voltage from a supply rail; control the plurality of switches to couple a second source supply voltage to the supply rail to replace the first source supply voltage with the second source supply voltage; and control the slew rate regulation circuit to regulate a slew rate of a voltage of the supply rail during a time interval in which the first source supply voltage is being replaced with the second source supply voltage.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: November 5, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Mohamed Mostafa Elsayed, Kenneth W. Fernald, Matthew Powell
  • High output swing high voltage tolerant bus driver
    Patent number: 10461964
    Abstract: A driver circuit includes two pull-up portions coupled respectively between VDD and first and second driver output nodes and two pull-down sections coupled respectively between ground and third and fourth driver output nodes. The driver circuit is configurable as an RS485 driver or a CAN driver. The active diodes in the pull-up sections are turned off when necessary to prevent unwanted reverse currents between the first and second output nodes and VDD. The active diodes in the pull-down sections are turned off when necessary to prevent unwanted reverse current between ground and the third and fourth output nodes.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: October 29, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Alexander Cherkassky, Bruce P. Del Signore
  • Spur mitigation for pulse output drivers in radio frequency (RF) devices
    Patent number: 10461787
    Abstract: Systems and methods are disclosed for spur mitigation for pulse signal drivers in radio frequency (RF) devices. An RF integrated circuit includes RF circuitry and analog-to-digital (ADC) circuitry. The RF circuitry operates using a local oscillator (LO) clock to receive and/or transmit RF signals, and the ADC circuitry samples one or more analog input signals and has internal timing based upon a raw digital clock. A retime circuit receives the raw digital clock and the LO clock and has a retimed clock as an output. The retimed clock represents the raw digital clock retimed with the LO clock. While other digital circuitry is timed using the raw digital clock, one or more drivers are timed by the retimed clock and provide pulse output signals to output pads. Having the drivers timed with the retimed clock and other digital circuitry timed with the raw digital clock improves overall performance.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: October 29, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Phillip Matthews, Paul I. Zavalney, John M. Khoury, Karma S. Bhutia
  • Two-dimensional filtering of pilots and carriers for OFDM channel estimation
    Patent number: 10461963
    Abstract: A method includes generating a two-dimensionally filtered pilot tone based on a plurality of received pilot tones received using a first subcarrier of each of a plurality of received OFDM symbols and a plurality of data symbols received using a second subcarrier of each of the plurality of received OFDM symbols. The plurality of OFDM symbols is received sequentially over a plurality of OFDM symbol times. The method may include generating inverse channel coefficients based on the two-dimensionally filtered pilot tone. The method may include applying the inverse channel coefficients to a subsequently received OFDM symbol to recover data encoded in the subsequently received OFDM symbol. Generating the two-dimensionally filtered pilot tone may use at least one least-mean-squares filter.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: October 29, 2019
    Assignee: Silicon Laboratories Inc.
    Inventor: Carl H. Alelyunas
  • System and method of high speed, high voltage swing electrostatic discharge protection
    Patent number: 10454268
    Abstract: An ESD protection circuit for an IC having multiple diodes coupled in series between a signal pad and a reference pad including a first diode coupled to the signal pad, a last diode coupled to the reference pad, and at least one intermediate diode. The protection circuit includes a bias network which may include one or more resistors, each coupled in parallel with a corresponding intermediate diode. One or more capacitors may be included, each coupled in parallel with a corresponding intermediate diode. For diode strings with four or more diodes, the resistances of the resistors may increase in the direction from the signal pad to the reference pad. The capacitances of the capacitors, if included, may decrease in the direction from the signal pad to the reference pad. The reference pad may be a voltage supply pad, such as a ground pad or a positive supply voltage pad.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: October 22, 2019
    Assignee: Silicon Laboratories Inc.
    Inventor: Henry W Singor
  • Crystal driver circuit configurable for daisy chaining
    Patent number: 10454420
    Abstract: A crystal driver integrated circuit configurable for daisy chaining including an amplifier core, an input pin and an output pin, and a controller that operates the amplifier core in any one of multiple operating modes. The operating modes include an oscillator mode for driving an external crystal coupled between the input and output pins to generate an oscillation signal at a target frequency, and an amplifier mode that amplifies an external oscillating signal provided to the input pin to provide an amplified oscillation signal on the output pin. The amplifier core includes a controllable current source that provides a core bias current to an amplifier having a level that is adjusted depending upon the operating mode and desired amplitude. The operating modes may include a bypass mode in which the amplifier core is disabled. The amplifier may be implemented as either an PMOS amplifier or an NMOS amplifier.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: October 22, 2019
    Assignee: Silicon Laboratories Inc.
    Inventor: Tiago Marques
  • DotDot gateway
    Patent number: 10447822
    Abstract: A system and method for allowing legacy devices to operate on a DotDot network is disclosed. The system includes a gateway device to interfaces between DotDot devices and legacy devices. In some embodiments, the gateway has a plurality of network interfaces to communicate with these devices. The gateway discovers the legacy devices that it can communicate with. The gateway device than enumerates these legacy devices in a manner that allows them to be accessed by the DotDot device. In certain embodiments, the gateway enumerates each legacy device as a DotDot endpoint.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: October 15, 2019
    Assignee: Silicon Laboratories, Inc.
    Inventor: DeWitt Clinton Seward
  • Systems and methods for initial authentication of wireless communication
    Patent number: 10440570
    Abstract: Systems and methods are provided that may be implemented to use angle of arrival (AoA) of a signal transmitted between two Bluetooth Low Energy (BLE) wireless devices to initially authenticate a connection between the two BLE devices. In one example, bonding or pairing with a first BLE device may be restricted to only those other BLE devices having an antenna currently positioned to transmit a signal to the first BLE device from an allowed direction and within a predefined permitted range of AoA relative to the first BLE device.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: October 8, 2019
    Assignee: Silicon Laboratories Inc.
    Inventor: Jani K. Knaappila
  • Built-in context error variables
    Patent number: 10437659
    Abstract: A novel method of reporting pertinent information in the event of an error during the execution of a software application is disclosed. The software application includes one or more error reporting structures, which are used to store the pertinent information for each error that is encountered. The pertinent information may include, for example, the file name, the function name, the line number within the function, and others. In some embodiments, a macro is used to populate one or more fields of the error reporting structure. Various methods of identifying the location of the error reporting structure are also disclosed.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: October 8, 2019
    Assignee: Silicon Laboratories, Inc.
    Inventors: Olivier Deschambault, Alexandre Autotte, Jean-Francois Deschenes, Cedric Migliorini, Marylise Monchalin
  • PFM power management system with autonomous mode switching
    Patent number: 10423174
    Abstract: A pulse frequency modulated (PFM) voltage converter autonomously switches between buck, buck-boost, and boost modes as a function of the input and output voltages. The voltage converter may also switch autonomously between buck mode and a low drop out (LDO) mode when configured in a system in which the battery voltage is known to always be higher than the output voltage.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: September 24, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Jeffrey L. Sonntag, Dazhi Wei, Michael D. Mulligan, Zachary A. Kaufman, Joselyn Torres-Torres
  • Performing noise cancellation in radio signals using spectral duplication
    Patent number: 10419047
    Abstract: In one embodiment, a noise cancellation circuit includes: a window generator to generate a window having a first set of samples; a band splitter to split the window into pairs of symmetric frequency components; a processing circuit, for each of the pairs, to: compare a first magnitude of a first symmetric frequency component to a second magnitude of a second symmetric frequency component and modify one of the components based at least in part on the comparison; an integrator to integrate the pairs output from the processing circuit; and a second window generator to generate a second window having a second set of samples.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: September 17, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Carl Harry Alelyunas, Russell Croman, Thomas Glen Ragan, Tarang Shah
  • Compensating for thermal lag in temperature compensated crystal oscillators
    Patent number: 10404209
    Abstract: A temperature compensated crystal oscillator (TCXO) includes a crystal oscillator and a temperature sensor to provide a sensed temperature. A delay circuit has a selectable delay to delay the frequency compensation based on the sensed temperature. The delay compensates for a difference between when the temperature sensor reflects a change in temperature and when a frequency of a signal supplied by the crystal oscillator is affected by the change in temperature. The delay may be static or dynamic with respect to the current temperature sensed by the temperature sensor.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: September 3, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Joseph D. Cali, Rajesh Thirugnanam, Rahul Shukla, Srisai R. Seethamraju
  • Controlling a reference voltage for a clock and data recovery circuit
    Patent number: 10404446
    Abstract: In one aspect, a method includes: determining a power mode of a device; setting a first reference voltage level and a second reference voltage level based at least in part on the power mode; and using at least one of the first reference voltage level and the second reference voltage level for comparison against incoming data.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: September 3, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
  • Over the air commands for RF testing
    Patent number: 10396910
    Abstract: A system and method of allowing a network device to enter RF test mode without changing the software image or attaching cables to it is disclosed. In one embodiment, the software image loaded into the network device has the capability to execute in both normal operating mode and RF test mode. A command is issued by a RF test tool which instructs the network device to enter one of one or more different RF modes. In certain embodiments, the network device remains in this RF test mode for a predetermined period of time. In other embodiments, the network device remains in this RF test mode until the power is cycled.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: August 27, 2019
    Assignee: Silicon Laboratories, Inc.
    Inventors: DeWitt Clinton Seward, IV, Clayton Hollis Daigle
  • Receiver architecture for digital isolators employing notch filters common mode transient immunity
    Patent number: 10397025
    Abstract: A technique for attenuating common mode transient events uses a differential receiver circuit including a band-stop filter having a stopband fSB around a notch frequency fn of a received signal. The differential receiver circuit includes a first high-pass filter coupled in series with the band-stop filter. The notch frequency fn is less than a carrier frequency fc of a signal received by the differential receiver circuit. The band-stop filter may include a buffer circuit and a notch filter coupled in series with the buffer circuit. The notch filter may have a second stopband around the notch frequency fn. The differential receiver circuit may have a propagation delay that is independent of a pulse width of common mode transient energy attenuated by the differential receiver circuit.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: August 27, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Mohammad Al-Shyoukh, Stefan Mastovich
  • Radio-frequency apparatus with improved power consumption and associated methods
    Patent number: 10389482
    Abstract: An apparatus includes a radio frequency (RF) receiver, which includes a differentiator to differentiate a phase signal to generate a differentiated signal. The RF receiver further includes a correlator coupled to receive and correlate the differentiated signal, and a memory to receive and store the differentiated signal. Samples of the differentiated signal are provided to the correlator and to the memory synchronously.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: August 20, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Hendricus de Ruijter, Ping Xiong, Wentao Li
  • Apparatus with partitioned radio frequency antenna structure and associated methods
    Patent number: 10374300
    Abstract: An apparatus includes a radio frequency (RF) circuit to transmit or receive RF signals, and a partitioned antenna structure. The partitioned antenna structure includes a first portion of a resonator and a first portion of a radiator. The first portion of the resonator comprises less than an entire resonator. The first portion of the radiator comprises less than an entire radiator.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: August 6, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Pasi Rahikkala, Attila Zolomy
  • Crystal amplifier with additional high gain amplifier core to optimize startup operation
    Patent number: 10367462
    Abstract: A crystal amplifier for driving a crystal to oscillate at a resonant frequency including a controlled current source, a primary amplifier core, a high gain amplifier core, and a controller. Both amplifier cores are coupled in parallel, and each has an input coupled to an amplifier input node and an output coupled to an amplifier output node coupled across the crystal. The current source provides a core bias current to the source node. The controller enables the high gain amplifier core and sets the core bias current to a high current level to achieve a high negative resistance at a startup time, and then disables the high gain amplifier core and sets the core bias current to a lower steady state current level after oscillation is achieved. A level detector may be used for detecting oscillation and for determining when to adjust the core bias current.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: July 30, 2019
    Assignee: Silicon Laboratories Inc.
    Inventor: Tiago Marques
  • SYSTEM AND METHOD FOR REDUCING OUTPUT HARMONICS
    Publication number: 20190229608
    Abstract: In one form, a power amplifier system includes first and second amplification path, and a combination element. The first amplification path has an input for receiving a drive signal, and an output. The second amplification path has an input coupled to the input of the first amplification path, and an output. The second amplification path has a delay element that inserts a signal path delay with respect to the first amplification path, wherein the delay element has a delay corresponding to a harmonic that is desired to be reduced. The combination element is coupled to the output of the first amplification path and an output of the second amplification path, and provides an output signal as a sum of outputs of the first amplification path and the second amplification path.
    Type: Application
    Filed: January 19, 2018
    Publication date: July 25, 2019
    Applicant: Silicon Laboratories Inc.
    Inventors: Sriharsha Vasadi, Mustafa H. Koroglu, Sherry X. Wu