Abstract: An integrated circuit (IC) having a scan compression architecture includes decompression logic coupled between test access input and a block of IC elements (e.g. flip-flops) coupled together to define a plurality of scan paths. The block of IC elements includes an initial data selector at an initial position of each of the scan paths, and an additional data selector downstream within at least one of the scan paths and configured to reconfigure an order of the IC elements within the at least one scan path. Compression logic is coupled between the block of IC elements and a test access output.

Abstract: A semiconductor region includes an isolating region which delimits a working area of the semiconductor region. A trench is located in the working area and further extends into the isolating region. The trench is filled by an electrically conductive central portion that is insulated from the working area by an isolating enclosure. A cover region is positioned to cover at least a first part of the filled trench, wherein the first part is located in the working area. A dielectric layer is in contact with the filled trench. A metal silicide layer is located at least on the electrically conductive central portion of a second part of the filled trench, wherein the second part is not covered by the cover region.

Abstract: A cavity is etched in a stack of layers which includes a first layer made of a first material and a second layer made of a second material. To etch the cavity, a first etch mask having a first opening is formed over the stack of layer. The stack of layers is then etched through the first opening to a depth located in the second layer. A second mask having a second opening, the dimensions of which are smaller, in top view, than the first opening, is formed over the stack of layer. The second opening is located, in top view, opposite the area etched through the first opening. The second layer is then etched through the second opening to reach the first layer. The etch method used is configured to etch the second material selectively over the first material.

Abstract: A circuit for controlling an anode-gate thyristor includes a first transistor that couples a thyristor gate to a first terminal to receive a potential lower than a potential of a second terminal connected to the thyristor anode. A control terminal of the first transistor is driven by a control signal which is positive with respect to the potential of the first terminal.

Abstract: An insulating spacer provides electrical connection between first contacts of a package for an electronic chip and second contacts of a connector board. The insulating spacer includes conductive vias having rectilinear axes parallel to one another which extend between the first and second contacts. The package for an electronic chip is mounted to one side of the insulating spacer and the connector board is mounted to an opposite side of the insulating spacer.

Abstract: An integrated electronic device including an electronic component and a temperature transducer formed in a first die. The temperature transducer including a first diode and a second diode which are connected in antiparallel.

Abstract: A phase or frequency locked-loop circuit includes an oscillator configured to generate an output clock signal having a frequency set by an oscillator control signal. A modulator circuit receives a first signal and a second signal and is configured to generate a control signal having a value modulated in response to the first and second signals. A filter circuit generates the oscillator control signal by filtering the control signal. A delta-sigma modulator circuit operates to modulate the second signal in response to a modulation profile. As a result, the output clock signal is a spread spectrum clock signal.

Abstract: A laser detection device can be used to protect an integrated circuit. The device includes a detection cell having a buried channel of a first conductivity type extending in a substrate of the integrated circuit. The substrate is of a second conductivity type. The detection cell also has a first electrical connection coupling a first point in the buried channel to a supply voltage rail, and a second electrical connection coupled to a second point in the buried channel. A detection circuit is coupled to the second point in the buried channel via the second electrical connection and adapted to detect a fall in the voltage at the second point.

Abstract: An electronic system implements a software application described in the form of a graph of the Kahn network type, and includes actors. At least one of the actors includes a processor, and at least another one of the actors includes a hardware accelerator. Buffer memories are coupled between the actors. A central processor is configured to enable communications between the actors according to a communications and synchronization protocol. The processor and the hardware accelerator are configured to use different individual communications protocols.

Abstract: A load-sensing device is arranged in a package forming a chamber. The package has a deformable substrate configured, in use, to be deformed by an external force. A sensor unit is positioned in direct contact with the deformable substrate and is configured to detect deformations of the deformable substrate. An elastic element within of the chamber is arranged to act between the package and the sensor unit to generate, on the sensor unit, a force keeping the sensor unit in contact with the deformable substrate. The deformable substrate may be a base of the package, and the elastic element may be a metal lamina arranged between the lid of the package and the sensor unit. The sensor unit may be a semiconductor die integrating piezoresistors.

Abstract: An active discharge circuit discharges an X capacitor and includes a sensor circuit that generates a sensor signal indicative of an AC voltage at the X capacitor. A processing unit generates a reset signal as a function of a comparison signal. A comparator circuit generates the comparison signal by comparing the sensor signal with a threshold. A timer circuit sets a discharge enable signal to a first logic level when the timer circuit is reset via a reset signal. The timer circuit determines the time elapsed since the last reset and tests whether the time elapsed exceeds a given timeout value. If the time elapsed exceeds the given timeout value, the timer circuit sets the discharge enable signal to a second logic level. A dynamic threshold generator circuit varies the threshold of the comparator circuit as a function of the sensor signal.

Abstract: One or more embodiments are directed to system in package (SiP) for optical devices, including proximity sensor packaging. One embodiment is directed to optical sensor that includes a substrate, an image sensor die and a light-emitting device. A first surface of the image sensor die is coupled to the substrate, and a recess is formed extending into the image sensor die from the first surface toward a second surface of the image sensor die. A light transmissive layer is formed in the image sensor die between the recess and the first surface. The optical sensor further includes a light-emitting device that is coupled to the substrate and positioned within the recess formed in the image sensor die.

Abstract: Embodiments of the present disclosure are directed to leadframes having the cantilevered extension that includes an integral support on the end of the lead nearest the die pad. A support integral to the leadframe allows the support to be built to the proper height to support the cantilevered lead in each package and reduces or eliminates the upward, downward, and side to side deflections caused or allowed by supports built-in to the tooling of the manufacturing equipment. Also, by building the support into the leadframe, the leadframes may be pretaped prior to the die attach and wire bonding steps of the manufacturing process.

Abstract: A device described herein includes a movable MEMS mirror, with a driver configured to drive the movable MEMS mirror with a periodic signal such that the MEMS mirror oscillates at its resonance frequency. A feedback measuring circuit is configured to measure a signal flowing through the movable MEMS mirror. A processor is configured to sample the signal at first and second instants, generate an error signal as a function of a difference between the signal at the first instant in time and the signal at the second instant in time, and determine the opening angle of the movable MEMS mirror as a function of the error signal.

Abstract: A single-stage differential operational amplifier including an input stage formed by a pair of input transistors having control terminals connected to a respective first and second input, first conduction terminals coupled to a respective first and second output and second conduction terminals coupled to receive a polarization current. An output stage is formed by a pair of output transistors in diode configuration and having control terminals coupled to a relative first conduction terminal and connected to a respective first and second output, and second conduction terminals connected to a reference line. A coupling stage is interposed between the first conduction terminals of the output transistors and the first and second outputs to define the diode configuration of the output transistors and a gain value of the operational amplifier.

Abstract: A method can be used to measure a load driven by a switching amplifier having a differential input, an LC output demodulator filter and a feedback network between the amplifier output and the differential input. The amplifier is AC driven in a differential and in a common mode by applying a common. The feedback network provides feedback towards the differential input from downstream the LC demodulator filter by computing the impedance of the load as a function of the differential mode output current and the common mode output current. The feedback network provides feedback towards the differential input from upstream the LC demodulator filter by measuring the impedance value of the inductor of the LC demodulator filter, and computing the impedance of the load as a function of the differential mode output current, the common mode output current and the impedance value of the inductor of the LC demodulator filter.

Abstract: An integrated image sensor with backside illumination includes a pixel. The pixel is formed by a photodiode within an active semiconductor region having a first face and a second face. A converging lens, lying in front of the first face of the active region, directs received light rays towards a central zone of the active region. At least one diffracting element, having a refractive index different from a refractive index of the active region, is provided at least partly aligned with the central zone at one of the first and second faces.

Abstract: A frequency demodulated signal includes a frequency modulation in time that is shifted by a DC level corresponding to a carrier frequency offset. A number of different frequency offsets are applied to the frequency demodulated signal to generate a corresponding number of offset frequency demodulated signals. Each offset frequency demodulated signal is correlated against a reference signal and a determination is made as to which correlation produces a highest correlation value. One offset frequency demodulated signal of the number of offset frequency demodulated signals is then selected for output as an offset corrected frequency demodulated signal. The selected signal is the one having the highest correlation value.

Abstract: A device includes a first chip having a front side and a back side. A second chip is stacked with the first chip and located on the back side of the first chip. A first loop includes first and second through vias located in the first chip. Each through via has a first end on the front side of the first chip and a second end on the back side of the first chip. The first loop also includes a first track that connects the first ends of the first and second through vias is located in the first chip on the front side thereof and a second track that connects the second ends of the first and second through vias is located in the second chip. A detection circuit can detect an electrical characteristic of the first loop.

Abstract: A charge storage cell includes a semiconductor region having charge carriers of a first conductivity type, a first deep trench isolation structure, and a charge storage region located adjacent to the first deep trench isolation structure. The charge storage region has charge carriers of a second conductivity type different to the first conductivity type and extends along substantially all of the first deep trench isolation structure. A second deep trench isolation structure is located adjacent to the charge storage region and opposite the first deep trench isolation structure.