Abstract: Disclosed herein is an electronic device having a substrate, and an integrated circuit disposed within the substrate and having a top surface. The integrated circuit may be a laser emitting integrated circuit or a reflected light detector. A first interconnect layer is formed on the top surface of the substrate. A first optically transparent layer is formed on the top surface of the substrate and covering the top surface of the integrated circuit. A second interconnect layer is formed on a top surface of the first optically transparent layer. The second interconnect layer is patterned so as to not obstruct light traveling to or from the top surface of the integrated circuit through the first optically transparent layer.

Abstract: A switching regulator includes circuitry for reducing conductive emissions caused when the regulators switch from one transistor switch to the other. The switching regulator includes at least one switch with a diode connected from the source to the drain of at least one of the transistor switches. When the regulator switches from one transistor switch to the other, the circuitry initiates turning on the switch with a relatively small, current-limited signal, waits for the diode across the recently turned off switch to complete reverse recovery, and then quickly turns the new switch fully on.

Abstract: A rotary element is equipped with a pattern representing a reflected binary code on at least three bits. A detection circuit is configured to sense the pattern and deliver an incident signal encoded in reflected binary code on at least three bits. The incident signal is converted by a transcoding circuit into an intermediate signal encoded in reflected binary code on two bits. A decoding stage decodes the intermediate signal and outputs at least one clock signal representing the amount of rotation of the rotary element and a direction signal representing the direction of rotation. A processing circuit determines the movement of the rotary element, and has at least one general purpose timer designed to receive the at least one clock signal and direction signal.

Abstract: Each pixel of a global shutter back-side illuminated image sensor includes a photosensitive area. On a front surface, a first transistor includes a vertical ring-shaped electrode penetrating into the photosensitive area and laterally delimiting a memory area. The memory area penetrates into the photosensitive area less deeply than the insulated vertical ring-shaped electrode. A read area is formed in an intermediate area which is formed in the memory area. The memory area, the intermediate area and read area define a second transistor having an insulated horizontal electrode forming a gate of the second transistor. The memory area may be formed by a first and second memory areas and an output signal is generated indicative of a difference between charge stored in the first memory area and charge stored in the second memory area after a charge transfer to the first memory area.

Abstract: An electronic chip including: a plurality of first semiconductor bars of a first conductivity type and of second semiconductor bars of a second conductivity type arranged alternately and contiguously on a region of the first conductivity type; two detection contacts arranged at the ends of each second bar; a circuit for detecting the resistance between the detection contacts of each second bar; insulating trenches extending in the second bars down to a first depth between circuit elements; and insulating walls extending across the entire width of each second bar down to a second depth greater than the first depth.

Abstract: A substrate contact land for a first MOS transistor is produced in and on an active zone of a substrate of silicon on insulator type using a second MOS transistor without any PN junction that is also provided in the active zone. A contact land on at least one of a source or drain region of the second MOS transistor forms the substrate contact land.

Abstract: A display arrangement comprises a display, a conductive shield arranged at the display, a ferrite layer and a conducting line of an antenna. The ferrite layer is arranged between the conducting line and the conductive shield.

Abstract: A method is for processing a channel analog signal coming from a transmission channel. The method may include converting the channel analog signal into a channel digital signal, and detecting a state of the transmission channel based on the channel digital signal to detect whether the transmission channel is, over an interval of time, one or more of linear and time invariant and linear and cyclostationary.

Abstract: First and second transistors with different electrical characteristics are supported by a substrate having a first-type dopant. The first transistor includes a well region within the substrate having the first-type dopant, a first body region within the well region having a second-type dopant and a first source region within the first body region and laterally offset from the well region by a first channel. The second transistor includes a second body region within the semiconductor substrate layer having the second-type dopant and a second source region within the second body region and laterally offset from material of the substrate by a second channel having a length greater than the length of the first channel. A gate region extends over portions of the first and second body regions for the first and second channels, respectively.

Abstract: A gas measurement device measures gas using a gas sensor including a sense resistance exposed to the gas and a reference resistance not exposed to the gas. The gas measurement device applies a first current value and a second current value to the sensor. A detector functions to detect a first resistance variation and a second resistance variation of the sense resistance exposed to the gas with respect to the reference resistance as a function of the first current value and the second current value, respectively. The resistance variation dependent on relative humidity is then determined as a function of the first and second resistance variations and a first constant. The resistance variation dependent on gas content is then determined as a function of the first and second resistance variations and a second (different) constant.

Abstract: A mirror micromechanical structure has a mobile mass carrying a mirror element. The mass is drivable in rotation for reflecting an incident light beam with a desired angular range. The mobile mass is suspended above a cavity obtained in a supporting body. The cavity is shaped so that the supporting body does not hinder the reflected light beam within the desired angular range. In particular, the cavity extends as far as a first side edge wall of the supporting body of the mirror micromechanical structure. The cavity is open towards, and in communication with, the outside of the mirror micromechanical structure at the first side edge wall.

Abstract: A pixel array includes pixels arranged in columns. A pair of column lines is provided for each column of pixels. A current source circuit is coupled to each pair of column lines. The current source circuit provides current to the pair of column lines in a first mode of operation such that when one column line in a pair of column lines is being provided with a first current the other column line in the pair of column lines is being provided with a second current which is less than the first current.

Abstract: A system for performing depth-based scaling of 3D content. The system comprises: 1) a content source configured to provide an input image comprising a plurality of input image objects; and 2) a processor configured to receive the input image and to receive a depth map comprising depth data associated with each of the plurality of input image objects. The processor generates an output image comprising a plurality of output image objects, wherein each of the plurality of output image objects corresponding to one of the plurality of input image objects. The processor scales a size of a first output image object relative to the size of a second output image object based on depth data associated with the first output image object and the second output image object.

Abstract: Self-aligned three dimensional vertically stacked chip stacks and processes for forming the same generally include two or more vertically stacked chips supported by a scaffolding structure, the scaffolding structure defined by a first scaffolding trench and at least one additional scaffolding trench, the first scaffolding trench comprising a bottom surface having a width and a sidewall having a height extending from the bottom surface to define a lowermost trench in a scaffolding layer, the at least one additional scaffolding trench overlaying the first scaffolding trench having a sidewall having a height and a width, wherein the width of the at least one scaffolding trench is greater than the first scaffolding trench width to define a first stair between the first scaffolding trench and the at least one additional trench; a first chip secured to the first scaffolding trench having a height less than the first scaffolding trench sidewall height; and at least one additional chip secured to and supported by the

Abstract: A voltage detector operates to detect a system power supply voltage and generate a trigger signal. A control signal generator responds to the trigger signal and generates a control signal. A DC bias generator responds to the control signal by generating a DC bias. The control signal controls the DC bias to have a first value when the power supply voltage is a first voltage and have a second value when the power supply voltage is a second voltage different from the first voltage, wherein the first value is different from the second value. A dynamic DC bias is generated which can not only support a larger voltage scope, but also significantly improves signal to noise ratio. The system power supply detection may concern stop/start operation of an automobile engine.

Abstract: The method includes for each current pair of first and second successive video images determining movement between the two images. The determining includes a phase of testing homography model hypotheses on the movement by a RANSAC type algorithm operating on a set of points in the first image and first assumed corresponding points in the second image so as to deliver one of the homography model hypothesis that defines the movement. The test phase includes a test of first homography model hypotheses of the movement obtained from a set of second points in the first image and second assumed corresponding points in the second image. At least one second homography model hypothesis is obtained from auxiliary information supplied by an inertial sensor and representative of a movement of the image sensor between the captures of the two successive images of the pair.

Abstract: A method of controlling a switching voltage regulator includes detecting current-limit events indicating a maximum inductor current threshold has been exceeded. A compensation voltage that determines a duty cycle and thereby an inductor current is controlled to reduce the inductor current and eliminate the occurrence of current-limit events. The method detects whether a time for which no current-limit events have been detected exceeds a time step threshold. The compensation voltage is controlled to increase the duty cycle and thereby the inductor current in response to the time exceeding the time step threshold. The time step threshold may be an integer number of switching cycles of the voltage regulator.

Abstract: A IEEE 802.11 Wireless Local Area Network (WLAN) system of an access point (AP) and one or more stations (STAs) reduces power consumption and increases battery life of power efficient low power STAs by decreasing the amount of time that a power efficient low power STA remains in an awake state. After indicating power efficient low power operation during association with an AP supporting such operation, the power efficient low power STA may enter the doze state from the time that the power efficient low power STA sends a PS-Poll until the power efficient low power STA receives the buffered DATA frame from the AP. While implementing the power efficient PS-Poll method, the AP can send the buffered DATA frame to the STA SIFS after the AP sends an ACK to the received PS-Poll from the STA.

Abstract: The regulator with a low dropout voltage comprises an error amplifier comprising a differential pair of input transistors and a circuit with folded cascode structure connected to the output of the said differential pair, an output stage connected to the output node of the error amplifier, and a Miller compensation capacitor connected between the output stage and the cascode node on the output side (XP) of the cascode circuit; the error amplifier furthermore comprises at least one inverting amplifier module in a feedback loop between the said cascode node and the gate of the cascode transistor of the cascode circuit connected between the said cascode node and the said output node.

Abstract: A method is for processing an analog channel signal from a transmission channel. The analog channel signal conveys frames, the transmission channel being linear and cyclostationary for a duration of a frame. The method may include converting of the analog channel signal into a digital channel signal, and performing channel estimations for the frame based upon the digital channel signal to generate a sequence of N transfer functions of the transmission channel. Each of the sequence of N transfer functions may be respectively associated with N successive time slices. The method may include decoding at least some symbols of the frame using, for each of the symbols, a transfer function associated with a successive time slice including a respective symbol.