Abstract: A device includes a chip assembled on an interposer. An electrically-insulating layer coats an upper surface of the interposer around the chip. First metal lines run on the upper surface of the interposer and are arranged between conductive elements of connection to the chip. An end of each first metal line is arranged to extend beyond a projection of the chip on the interposer. A thermally-conductive via connects the end of the first metal line to a heat sink supported at an upper surface of the device.
Type:
Grant
Filed:
July 7, 2016
Date of Patent:
October 3, 2017
Assignees:
STMicroelectronics SA, STMicroelectronics (Crolles 2) SAS
Inventors:
Pierre Bar, Alisee Taluy, Olga Kokshagina
Abstract: The integrated electronic device detects the pressure related to a force applied in a predetermined direction within a solid structure. The device includes an integrated element that is substantially orthogonal to the direction of application of the force. First and second conductive elements are configured to face an operating surface. A measure module includes first and second measurement terminals which are electrically connected to the first and second conductive elements, respectively. A detecting element is arranged in the predetermined direction such that the operating surface is sandwiched between the first and second conductive elements and this detecting element. An insulating layer galvanically insulates the first and second conductive elements.
Abstract: A method for forming a rough silicon wafer including the successive steps of: performing a plasma etching of a surface of the wafer in conditions suitable to obtain a rough structure, and performing two successive ion milling steps, one at an incidence in the range of 0 to 10°, the other at an incidence in the range of 40 to 60° relative to the normal to the wafer.
Abstract: One or more embodiments are directed to laser circuits, methods and devices that include a current sensing circuit for sensing a lasing current provided to a laser diode or device. One embodiment is directed to a circuit that includes a laser device, a switching device, a current sensing circuit and a current comparator. The switching device has a first conduction terminal coupled to the laser device and a second conduction terminal coupled to a supply voltage. The switching device is configured to operatively supply a lasing current to the laser device. The current sensing circuit is coupled to the switching device and is configured to generate a sense current representative of the lasing current. The current comparator is configured to receive the sense current from the current sensing circuit, to receive a reference current, and to compare the sense current with the reference current.
Abstract: A microfluidic device (1000-1005), comprising: a semiconductor body (2) having a first side (2a) and a second side (2b) opposite to one another, and housing, at the first side, a plurality of wells (4), having a first depth; an inlet region (30) forming an entrance point for a fluid to be supplied to the wells; a main channel (6a) fluidically connected to the inlet region, and having a second depth; and a plurality of secondary channels (6b) fluidically connecting the main channel to a respective well, and having a third depth. The first depth is higher than the second depth, which in turn is higher than the third depth.
Abstract: A PWM controlled multi-phase resonant voltage converter may include a plurality of primary windings powered through respective half-bridges, and as many secondary windings connected to an output terminal of the converter and magnetically coupled to the respective primary windings. The primary or secondary windings may be connected such that a real or virtual neutral point is floating.
Type:
Grant
Filed:
June 22, 2010
Date of Patent:
October 3, 2017
Assignee:
STMicroelectronics S.r.l.
Inventors:
Claudio Adragna, Giuseppe Gattavari, Paolo Mattavelli, Enrico Orietti, Giorgio Spiazzi
Abstract: A built-in self-test (BIST) circuit is provided for testing an analog-to-digital converter (ADC). A multi-order sigma-delta (??) modulator has an input that receives an input signal, a first output generating analog test signal derived from the input signal and applied to an input of the ADC and a second output generating a binary data stream. A digital recombination and filtering circuit has a first input that receives the binary data stream and a second input that receives a digital test signal output from the ADC in response to the analog test signal. The digital recombination and filtering circuit combines and filters the binary data stream and digital test signal to generate a digital result signal including a signal component derived from an error introduced by operation of the ADC. A correlation circuit is used to isolate that error signal component.
Abstract: A method for making an optical proximity sensor includes forming a package top plate having an optical transmit opening and an optical receive opening extending therethrough, attaching an optical transmit element to the package top plate adjacent the optical transmit opening, and attaching an optical receive element to the package top plate adjacent the optical receive opening. A package body is formed onto the package top plate to define an optical transmit cavity receiving the optical transmit element and an optical receive cavity receiving the optical receive element.
Abstract: An integrated circuit includes a substrate with several functional blocks formed thereon. At least two identical functional blocks are respectively disposed at two or more different locations on the integrated circuit. Electrically inactive dummy modules in the neighborhoods and/or inside of the functional blocks are provided, wherein at least two different electrically inactive dummy modules are includes in the respective neighborhoods and/or inside of the at least two identical functional blocks.
Type:
Grant
Filed:
March 22, 2017
Date of Patent:
October 3, 2017
Assignee:
STMicroelectronics (Rousset) SAS
Inventors:
Pascal Fornara, Christian Rivero, Guilhem Bouton
Abstract: A control device for controlling a switching power supply adapted to convert an input voltage into an output voltage according to a switching rate of a switching element. The control device includes first control means for switching the switching element in a first working mode at a constant frequency and second control means for switching the switching element in a second working mode at a variable frequency, under a maximum frequency, in response to the detection of a predefined operative condition of the switching power supply. The control device further includes means for selecting the first working mode or the second working mode.
Type:
Grant
Filed:
January 16, 2014
Date of Patent:
October 3, 2017
Assignee:
STMicroelectronics S.r.l.
Inventors:
Giovanni Lombardo, Claudio Adragna, Salvatore Tumminaro
Abstract: An integrated structure includes a first MOS transistor with a first controllable gate region overlying a first gate dielectric and a second MOS transistor neighboring the first MOS transistor and having a second controllable gate region overlying the first gate dielectric. A common conductive region overlies the first and second gate regions and is separated therefrom by a second gate dielectric. The common conductive region includes a continuous element located over a portion of the first and second gate regions and a branch extending downward from the continuous element toward the substrate as far as the first gate dielectric. The branch located between the first and second gate regions.
Abstract: A power supply may include power generation circuits, each configured to drive a respective winding of a multiphase motor; converter circuits, each configured to generate a digital driving signal for a respective power generation circuit, and a memory configured to store a plurality of fast recirculation compensation values corresponding to combinations of the digital driving signals that would otherwise result in a fast recirculation condition. The power supply may also include a controller coupled to the memory and configured to determine when a given combination of the digital driving signals would otherwise result in a fast recirculation condition, and based upon the determination, substitute at least one corresponding fast recirculation compensation value for the given combination of the digital driving signals.
Abstract: A pixel includes a semiconductor layer with a charge accumulation layer extending in the semiconductor layer. A transistor has a read region penetrating into said semiconductor layer down to a first depth. An insulating wall penetrates into the semiconductor layer from an upper surface and containing an insulated conductor connected to a node of application of a potential. The insulating wall includes at least a portion provided with a deep insulating plug penetrating into the insulated conductor down to a second depth greater than the first depth. A continuous portion of the insulating wall laterally delimits, at least partially, a charge accumulation area and includes a wall portion with the deep insulating plug at least partially laterally delimiting the read region of the transistor.
Abstract: A semiconductor device that includes a first fin structure in a first portion of a substrate, and a second fin structure in a second portion of the substrate, wherein the first portion of the substrate is separated from the second portion of the substrate by at least one isolation region. A gate structure present extending from the first fin structure across the isolation region to the second fin structure. The gate structure including a first portion on the first fin structure including a first work function metal having at least one void, an isolation portion that is voidless present overlying the isolation region, and a second portion on the second fin structure including a second work function metal.
Type:
Grant
Filed:
March 28, 2017
Date of Patent:
September 26, 2017
Assignees:
INTERNATIONAL BUSINESS MACHINES CORPORATION, GLOBALFOUNDRIES INC., STMICROELECTRONICS, INC.
Inventors:
Andrew M. Greene, Qing Liu, Ruilong Xie, Chun-Chen Yeh
Abstract: A transmission channel transmits high-voltage pulses and receives echos of the high-voltage pulses. The transmission channel includes a current generator circuit, which generates current-integrator drive currents. The control circuitry generates one or more control signals to control generation of current-integrator drive currents by the current generator circuit during transducer-driving periods. A current integrator integrates current-integrator drive currents generated by current generator circuit to generate transducer drive signals.
Abstract: A counter circuit includes a first Johnson counter circuit and a second Johnson counter circuit coupled in cascade. Each Johnson counter circuit includes a clock input, a data input, a first clock data output, a second clock data output and a feedback from the second clock data input to first data input. The clock input of the first Johnson counter circuit is configured to receive an input clock signal. The clock input of the second Johnson counter circuit is connected to the second clock data output of the first Johnson counter circuit. A ripple counter circuit has a clock input and additional clock data outputs. The clock input of the ripple counter circuit is connected to the second clock data output of the preceding Johnson counter circuit.
Abstract: A low dropout amplifier may include an error amplifier having first and second inputs coupled to a reference signal and a feedback signal, respectively. The error amplifier may be configured to generate first and second error signals at first and second outputs, respectively, with the first and second error signals based upon a difference between the reference signal and the feedback signal. A sink stage may be coupled to the first output and configured to generate a sink current based upon the first error signal. A source stage may be coupled to the second output and configured to generate a source current based upon the second error signal. An output node may be coupled to receive the sink and source currents.
Abstract: An IC may include a substrate and a layer, and an array of GMAPDs in the layer. The layer may have trenches extending between adjacent GMAPDs. The IC may include an optically reflective material within the trenches. The optically reflective material may also be electrically conductive. For example, the optically reflective material may comprise a metal. Also, the trenches may be arranged in a honeycomb pattern.
Type:
Grant
Filed:
August 18, 2016
Date of Patent:
September 26, 2017
Assignee:
STMICROELECTRONICS S.R.L.
Inventors:
Lorenzo Motta, Claudio Alfonso Giacomo Savoia
Abstract: A system and method for compensating for detected phase errors during communications between synchronized devices. In an embodiment, the two devices may be a touch screen device and a synchronized stylus device. To this end, the touch screen device includes a controller configured to receive data signals from the stylus at specific time intervals. The touch screen device generates an internal control signal for receiving the incoming data signals at an expected frequency. The touch screen device further includes circuitry for measuring differences in the time a data signal is actually received against when the data signal was expected to be received and determines a time difference (e.g., a phase error). Then, the internal control signal may be adjusted to compensate for the accumulated phase error. Such a measurement and compensation helps ensure that communications remain in synchronization without having to reestablish synchronization through a cumbersome synchronization process.
Abstract: A circuit includes a current source series-connected with a load between first and second terminals and an element coupled in parallel with the load between the first and second terminals. A value of a current in the current source is controlled based on a current flowing in the element between the first and second terminals. The value of the current in the current source is controlled proportional to power consumption in the load based on the current flowing in the element between the first and second terminals. The element is used to limit a voltage across the load while the value of the current is being controlled.