Abstract: An emulator for a smart card device and associated method have at least two virtual components as functional blocks for a smart card device and operative in different clock domains. A functional buffering block is operative for communicating with the functional blocks and buffering between the functional blocks and allowing emulation.

Abstract: A method and system for routing network-based data arranged in frames is disclosed. A host processor analyzes transferred bursts of data and initiates an address and look up algorithm for dispatching the frame to a desired destination. A shared system memory existing between a network device, e.g., an HDLC controller, working in conjunction with the host processor, receives data, including any preselected address fields. The network device includes a plurality of ports. Each port includes a FIFO receive memory for receiving at least a first portion of a frame. The first portion of the frame includes data having the preselected address fields. A direct memory access unit transfers a burst of data from the FIFO receive memory to the shared system memory. A communications processor selects the amount of data to be transferred from the FIFO receive memory based on the desired address fields to be analyzed by the host processor.

Abstract: A write driver driving a write current through a head connected to the write head by an interconnect. The write driver includes a circuit matching output resistance to the odd characteristic impedance of the interconnect and a voltage boosting circuit. The voltage boosting circuit in connected between a high voltage reference or supply voltage and a low voltage reference, and includes a current source, such as a MOS transistor, connected to the input node of a capacitor. During the overshoot duration, the current source operates at saturation to generate a pulsed current with an amplitude of half the load current. The circuit includes another transistor in series with the current generator between the capacitor and the driver output. A forward bias diode is connected between the capacitor output node and high voltage reference and enters reverse bias during overshoot duration swinging the driver output voltage above supply voltage.

Abstract: A microfuel cell includes a substrate and a plurality of spaced-apart PEM dividers extending outwardly to define anodic and cathodic microfluidic channels. An anodic catalyst/electrode lines at least a portion of the anodic microfluidic channels, and a cathodic catalyst/electrode lines at least a portion of the cathodic microfluidic channels. Each anodic and cathodic catalyst/electrode may extend beneath an adjacent portion of a PEM divider in some embodiments. Alternately, the microfuel cell may include a plurality of stacked substrates, in which a first substrate has first microfluidic fuel cell reactant channels. A PEM layer may be adjacent the first surface of the first substrate, an anodic catalyst/electrode layer may be adjacent one side of the PEM layer, and a cathodic catalyst/electrode layer may be adjacent an opposite side of the PEM layer. An adhesive layer may secure the first substrate to an adjacent substrate defining at least a second microfluidic fuel cell reactant channel.

Abstract: An image processing system and method for smoothing irregularities from 3D image information that was reconstructed from a plurality of 2D views of a scene, and particularly from homogeneous surfaces of objects in a scene. The method defines a window that overlaps a plurality of pixels of one of a plurality of 2D image views of a scene. Each pixel is associated with predefined 3D depth information, and further is associated with a matching curve. A subject pixel is located within the plurality of pixels overlapped by the window. The method calculates an average 3D depth information associated with the plurality of pixels overlapped by the window, and assigns the calculated average 3D depth information to the 3D depth information of the subject pixel, if the calculated average 3D depth information is within an error region of a matching curve associated with the subject pixel.

Abstract: There is disclosed a data processor containing an instruction issue unit that efficiently transfers instruction bundles from a cache to an instruction pipeline. The data processor comprises 1) an instruction pipeline comprising N processing stages; and 2) an instruction issue unit for fetching into the instruction pipeline instructions fetched from the instruction cache, each of the fetched instructions comprising from one to S syllables.

Abstract: A new synchronous Partial Response Maximum Likelihood (PRML) servo is provided for a high track-per-inch disk-drive system. To increase the data capacity in hard disk drives (HDD), one can shorten the servo format and/or increase the track density. The new servo system has circuits that allow a high-performance and accurate system for positioning the read-write heads. The major circuits include burst demodulation, Viterbi detection, timing synchronization, and spin-up search. A highly linear discrete-fourier-transform (DFT) burst-demodulation circuit can demodulate high-density and low-signal-to-noise-ratio (SNR) position bursts. The Viterbi detection circuit includes a sync-mark detector and a Viterbi detector that are matched to at least two sets of Gray code ( e.g., ¼ rate and 4/12 rate) and pruned accordingly. The timing synchronization circuit includes phase restart and interpolating timing recovery (ITR) circuits to implement a fully digital timing recovery.

Abstract: An apparatus and method for fabricating-a microprocessor comprising a first chip (12) having an active face (30) including a central processing unit and a second chip (14) having an active face (32) electrically connected to the active face of the first chip (12), wherein the second chip (14) provides added functionality to the central processing unit of the first chip (12) and wherein the electrical connections (16, 18) are through bonding layers (28) that are in contact with the metalization 26 on the first and second chips (12, 14), is disclosed.

Abstract: A fuel cell device includes a housing containing a fuel processor that generates fuel gas and a fuel cell having electrodes forming an anode and cathode, and an ion exchange electrolyte positioned between the electrodes. The housing can be formed as first and second cylindrically configured outer shell sections that form a battery cell that is configured similar to a commercially available battery cell. A thermal-capillary pump can be operative with the electrodes and an ion exchange electrolyte, and operatively connected to the fuel processor. The electrodes are configured such that heat generated between the electrodes forces water to any cooler edges of the electrodes and is pumped by capillary action back to the fuel processor to supply water for producing hydrogen gas. The electrodes can be formed on a silicon substrate that includes a flow divider with at least one fuel gas input channel that can be controlled by a MEMS valve.

Abstract: A semiconductor device includes a semiconductor material substrate, an opto-electric component formed on the substrate, and a first transparent layer formed on an upper surface of the substrate over the component, the layer having a planar upper surface with a cavity formed therein. The first transparent layer has a selected thickness and a first index of refraction. The semiconductor device further includes a lens having a second index of refraction, the lens being formed in the cavity and having a planar upper surface. An upper surface of the lens and the upper surface of the transparent layer may be coplanar, or alternatively, they may lie in separate planes. The semiconductor device may also include a second transparent layer formed over the first layer and lens, as a passivation layer. The first transparent layer may be silicon dioxide, while the lens may be a flowable dielectric.

Abstract: A stacked die integrated circuit assembly comprising: 1) a substrate; 2) a first integrated circuit die mounted on the substrate; 3) a copper interposer mounted on the first integrated circuit die; and 4) a second integrated circuit die mounted on the copper interposer. The copper interposer significantly reduces the warping of the stacked die IC assembly caused by the warping of the substrate due to thermal changes in the substrate. The copper interposer has a significantly higher coefficient of thermal expansion than a conventional silicon (Si) interposer. The higher CTE enables the copper interposer to counteract the substrate warping.

Abstract: A USB device includes first and second communications ports and a processor operable for configuring the first communications port for connecting to a USB host and configuring the second communications port as a USB master connecting to a USB slave device. The processor can be formed as a USB device controller operatively connected to the first communications port and USB On-The-Go device controller operatively connected to a second communications port for creating a point-to-point connection to the USB slave device.

Abstract: Connection between optical fibers and optical components within a semiconductor substrate. A lens is created at the front of a semiconductor substrate. A tapered hole is created in the back of the substrate exposing part or all of the surface of the lens. An optical component is formed or affixed at the front surface of the substrate. A volume of transparent adhesive is placed in the hole, followed by an optical fiber, which is thus coupled to the surface of the lens. A light guide is created on the front of the substrate overlying the lens to direct optical signals between the optical fiber inserted in the tapered hole and the optical component on the surface of the substrate.

Abstract: An integrated lid for micro-electro-mechanical system (MEMS) devices is formed from a nitride layer deposited over a cavity containing movable parts for the device. Pillars are formed through openings within large area movable parts to support the lid over those parts. Slides are formed and moved under large etchant openings through the lid to allow the openings to be sealed by sputtering.

Abstract: A data value is stored in a random access memory cell by driving the bit lines of the cell to complementary values representative of the value. The word line for the cell is driven to make a cell selection and cause the data value to be loaded into the cell from the bit lines. Thereafter, the word line is deselected. Following deselection, both bit lines are discharged to a logic low level. During discharging, however, a leakage current is allowed to flow through at least one of the bit lines so that the memory cell maintains the stored data value.

Abstract: A circuit includes a current generator, a start-up circuit coupled to provide a start-up current to the current generator during a start-up phase of the current generator, and a cut-off circuit coupled to both the current generator and to the start-up circuit to provide a control signal that reduces the start-up current when an output current from the current generator exceeds a threshold value.

Abstract: An electronic device incorporates a primary function circuit and a voltage regulator that provides a regulated voltage signal to the primary function circuit. The voltage regulator is responsive to a stress-enable signal indicative of whether or not an external voltage supplied to the voltage detector is within a predetermined range. The output voltage signal is controlled to be at a first voltage level when the external voltage is within the predetermined voltage range and at a second voltage level when the external voltage is outside of the predetermined range. The second voltage level may be an elevated voltage level to facilitate stress testing or burin-in of the electronic device.

Abstract: A USB device, integrated circuit, smart card and method are disclosed. A USB transceiver is connected to a data interface and operable at a respective low speed and full speed configuration. A processor as a USB device controller is operatively connected to the low speed USB transceiver and full speed USB transceiver and operable for transmitting a different device descriptor to a USB host for performing an enumeration depending on whether a low speed or high speed operation is chosen.

Abstract: In lieu of branch prediction, a merged fetch-branch unit operates in parallel with the decode unit within a processor. Upon detection of a branch instruction within a group of one or more fetched instructions, any instructions preceding the branch are marked regular instructions, the branch instruction is marked as such, and any instructions following branch are marked sequential instructions. Within two cycles, sequential instructions following the last fetched instruction are retrieved and marked, target instructions beginning at the branch target address are retrieved and marked, and the branch is resolved. Either the sequential or target instructions are then dropped depending on the branch resolution, incurring a fixed, 1 cycle branch penalty.

Abstract: Light from a laser diode is directed by mirrors on angled surfaces of an optical unit through a first lens at an optical disc. Light returns from the disc on a parallel path through a second lens and is directed at a photodetector. A semiconductor device controls the operation of the laser diode and receives signals form the photodetector for processing. The optical unit is formed from one or two glass elements cut from a larger glass wafer or wafers using photolithographic techniques. The mirrors are formed by thin films deposited on angled glass surfaces formed by selective plasma etching of the wafers. At least one mirror is partially reflective and is formed by depositing a thin film of titanium nitride.