Patents Assigned to STMicroelectronics, Inc.
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Publication number: 20090250523Abstract: A system of detecting biometric and non-biometric, standard smart card devices includes a smart card host and smart card device reader, which is operable for receiving an Answer to Reset signal and determining whether the smart card device comprises a biometric or non-biometric, standard smart card device. If a biometric smart card device is detected, the smart card reader is operable for applying power used for standard smart card device operation to a first contact and applying power used by a biometric circuit to a second contact, and if a non-biometric, standard smart card device is detected, applying power only to the first contact.Type: ApplicationFiled: June 18, 2009Publication date: October 8, 2009Applicant: STMicroelectronics, Inc.Inventor: John N. TRAN
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Publication number: 20090253373Abstract: An enhanced sensitivity radio frequency (RF) front end circuit includes a transformer configured to convert a balanced transmit signal to an unbalanced transmit signal and to convert a second filtered receive signal to a balanced receive signal. A switch in a first state receives the unbalanced transmit signal from the transformer and transfers the unbalanced transmit signal to an amplifier circuit and receives an amplified transmit signal from the amplifier circuit and transfers the amplified transmit signal to a filter. In a second state, the switch receives a first filtered receive signal from the filter and transfers the first filtered receive signal to the amplifier circuit and receives a second filtered receive signal from the amplifier circuit and transfers the second filtered receive signal to the transformer.Type: ApplicationFiled: April 4, 2008Publication date: October 8, 2009Applicant: STMicroelectronics, Inc.Inventor: Oleksandr Gorbachov
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Patent number: 7600096Abstract: A processor architecture supports an electrical interface for coupling the processor core to one or more coprocessor extension units executing computational instructions, with a split-instruction transaction employed to provide operands and instructions to an extension unit and retrieve results from the extension unit. The generic instructions for sending an operation and data to the extension unit and/or retrieving data from the extension unit allow new computational instructions to be introduced without regeneration of the processor architecture. Support for multiple extension units and/or multiple execution pipes within each extension unit, multi-cycle execution latencies and different execution latencies between or within extension units, extension unit instruction predicates, and for handling processor core stalls and result save/restore on interrupt is included.Type: GrantFiled: November 19, 2002Date of Patent: October 6, 2009Assignee: STMicroelectronics, Inc.Inventors: Sivagnanam Parthasarathy, Alexander Driker
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Patent number: 7598146Abstract: A semiconductor structure comprises a silicon substrate of a first conductivity type including wells of a second conductivity type formed on a surface thereof. The wells may be laterally isolated by shallow trench isolation. Transistors are formed in the wells by first forming several chemically distinct layers. Anisotropic etching then forms openings in a top one of the layers. A blanket dielectric layer is formed in the openings and on the layers. Anisotropic etching removes portions of the blanket dielectric layer from planar surfaces of the substrate but not from sidewalls of the openings to form dielectric spacers separated by gaps within the openings. Gate oxides are formed by oxidation of exposed areas of the substrate. Ion implantation forms channels beneath the gate oxides. Polysilicon deposition followed by chemical-mechanical polishing defines gates in the gaps. The chemically distinct layers are then stripped without removing the dielectric spacers.Type: GrantFiled: August 31, 2006Date of Patent: October 6, 2009Assignee: STMicroelectronics, Inc.Inventor: Robert Louis Hodges
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Patent number: 7598876Abstract: A method for manufacturing an electronic tag to be affixed onto a product includes providing, in an electrically conductive film of a foil for packaging, packing or transporting the product, areas devoid of any electrically conductive material for delimiting in the electrically conductive film at least one antenna pattern for forming an antenna for an RFID tag. A semiconductor chip is connected to the antenna for forming an electronic tag.Type: GrantFiled: March 21, 2006Date of Patent: October 6, 2009Assignees: STMicroelectronics SA, STMicroelectronics Inc.Inventors: Sylvain Fidelis, Pierre Rizzo
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Patent number: 7595017Abstract: A system and method is disclosed for using a pre-formed film in a transfer molding process of the type that uses a transfer mold to encapsulate portions of an integrated circuit with a molding compound. A film of compliant material is pre-formed to conform the shape of the film to a mold cavity surface of the transfer mold. The pre-formed film is then placed adjacent to the surfaces of the mold cavity of the transfer mold. The mold cavity is filled with molding compound and the integrated circuit is encapsulated. The pre-formation of the film allows materials to be used that are not suitable for use with prior art methods.Type: GrantFiled: January 31, 2002Date of Patent: September 29, 2009Assignee: STMicroelectronics, Inc.Inventors: Harry Michael Siegel, Anthony M. Chiu
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Patent number: 7594603Abstract: A system of detecting biometric and non-biometric, standard smart card devices includes a smart card host and smart card device reader, which is operable for receiving an Answer to Reset signal and determining whether the smart card device comprises a biometric or non-biometric, standard smart card device. If a biometric smart card device is detected, the smart card reader is operable for applying power used for standard smart card device operation to a first contact and applying power used by a biometric circuit to a second contact, and if a non-biometric, standard smart card device is detected, applying power only to the first contact.Type: GrantFiled: March 29, 2006Date of Patent: September 29, 2009Assignee: STMicroelectronics, Inc.Inventor: John N. Tran
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Patent number: 7594102Abstract: A processor that can execute instructions in either scalar mode or vector mode. In scalar mode, instructions are executed once per fetch. In vector mode, instructions are executed multiple times per fetch. In vector mode, the processor recognizes scalar variables and vector variables. Scalar variables may be assigned a fixed memory location. Vector variables use different physical locations at different iterations of the same instruction. The processor includes circuitry to automatically index addresses of vector variables for each iteration of the same instruction. This circuitry partitions a register into a vector region and a scalar region. Accesses to the vector region are automatically indexed based on the number of iterations of the instruction that have been performed.Type: GrantFiled: December 15, 2004Date of Patent: September 22, 2009Assignee: STMicroelectronics, Inc.Inventors: Osvaldo Colavin, Davide Rizzo, Vineet Soni
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Publication number: 20090219932Abstract: A method of data transmission in a multimedia network. The network having a source coupled to a sink by a linking unit capable of supporting at least one virtual channel. The method receiving a plurality of source data streams in accordance with a native stream rate and packetizing each stream in accordance with its native rate into a stream of payloads, each associated with its respective source stream. Payloads from each source stream are inserted into a transfer unit such that each transfer unit contains one payload from each stream. A stream of transfer units are transmitted through a virtual channel of the linking unit, thereby transmitting more than one source stream in the same virtual channel.Type: ApplicationFiled: February 4, 2009Publication date: September 3, 2009Applicant: STMICROELECTRONICS, INC.Inventor: Osamu KOBAYASHI
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Publication number: 20090213776Abstract: A protocol for collision avoidance in inter and intra basic service set broadcast/multicast communication in a wireless network is disclosed. An access point reserves a broadcast transmission time and conveys that reservation to each of its associated stations. Using a beacon or an action frame, the transmission reservation time is sent to all stations and other neighboring access points within range of the primary access point. Upon receiving the broadcast transmission time reservation, each station associated with the reserving access point and any neighboring access points set their network allocation vector thus preventing frame transmission or reception during the now reserved transmission time.Type: ApplicationFiled: February 24, 2009Publication date: August 27, 2009Applicant: STMicroelectronics, Inc.Inventors: Liwen Chu, George A. Vlantis
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Publication number: 20090208802Abstract: A fuel cell device includes a housing containing a fuel processor that generates fuel gas and a fuel cell having electrodes forming an anode and cathode, and an ion exchange electrolyte positioned between the electrodes. The housing can be formed as first and second cylindrically configured outer shell sections that form a battery cell that is configured similar to a commercially available battery cell. A thermal-capillary pump can be operative with the electrodes and an ion exchange electrolyte, and operatively connected to the fuel processor. The electrodes are configured such that heat generated between the electrodes forces water to any cooler edges of the electrodes and is pumped by capillary action back to the fuel processor to supply water for producing hydrogen gas. The electrodes can be formed on a silicon substrate that includes a flow divider with at least one fuel gas input channel that can be controlled by a MEMS valve.Type: ApplicationFiled: March 31, 2009Publication date: August 20, 2009Applicant: STMicroelectronics, Inc.Inventor: Anthony M. Chiu
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Publication number: 20090208791Abstract: A fuel cell device includes a housing containing a fuel processor that generates fuel gas and a fuel cell having electrodes forming an anode and cathode, and an ion exchange electrolyte positioned between the electrodes. The housing can be formed as first and second cylindrically configured outer shell sections that form a battery cell that is configured similar to a commercially available battery cell. A thermal-capillary pump can be operative with the electrodes and an ion exchange electrolyte, and operatively connected to the fuel processor. The electrodes are configured such that heat generated between the electrodes forces water to any cooler edges of the electrodes and is pumped by capillary action back to the fuel processor to supply water for producing hydrogen gas. The electrodes can be formed on a silicon substrate that includes a flow divider with at least one fuel gas input channel that can be controlled by a MEMS valve.Type: ApplicationFiled: March 31, 2009Publication date: August 20, 2009Applicant: STMicroelectronics, Inc.Inventor: Anthony M. CHIU
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Publication number: 20090208792Abstract: A fuel cell device includes a housing containing a fuel processor that generates fuel gas and a fuel cell having electrodes forming an anode and cathode, and an ion exchange electrolyte positioned between the electrodes. The housing can be formed as first and second cylindrically configured outer shell sections that form a battery cell that is configured similar to a commercially available battery cell. A thermal-capillary pump can be operative with the electrodes and an ion exchange electrolyte, and operatively connected to the fuel processor. The electrodes are configured such that heat generated between the electrodes forces water to any cooler edges of the electrodes and is pumped by capillary action back to the fuel processor to supply water for producing hydrogen gas. The electrodes can be formed on a silicon substrate that includes a flow divider with at least one fuel gas input channel that can be controlled by a MEMS valve.Type: ApplicationFiled: March 31, 2009Publication date: August 20, 2009Applicant: STMicroelectronics, Inc.Inventor: Anthony M. CHIU
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Publication number: 20090208794Abstract: A fuel cell device includes a housing containing a fuel processor that generates fuel gas and a fuel cell having electrodes forming an anode and cathode, and an ion exchange electrolyte positioned between the electrodes. The housing can be formed as first and second cylindrically configured outer shell sections that form a battery cell that is configured similar to a commercially available battery cell. A thermal-capillary pump can be operative with the electrodes and an ion exchange electrolyte, and operatively connected to the fuel processor. The electrodes are configured such that heat generated between the electrodes forces water to any cooler edges of the electrodes and is pumped by capillary action back to the fuel processor to supply water for producing hydrogen gas. The electrodes can be formed on a silicon substrate that includes a flow divider with at least one fuel gas input channel that can be controlled by a MEMS valve.Type: ApplicationFiled: March 31, 2009Publication date: August 20, 2009Applicant: STMicroelectronics, Inc.Inventor: Anthony M. Chiu
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Publication number: 20090201305Abstract: An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.Type: ApplicationFiled: April 15, 2009Publication date: August 13, 2009Applicant: STMICROELECTRONICS, INC.Inventors: Jefferson Eugene Owen, Raul Zegers Diaz, Osvaldo Colavin
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Publication number: 20090196076Abstract: A power supply circuit includes: a switching flyback transformer having a primary winding and a secondary winding; a current transformer having a primary winding and a secondary winding; and a switching transistor have a conduction path and a control terminal. The primary winding of the switching flyback transformer, the primary winding of the current transformer and the conduction path of the switching transistor are coupled together in a series circuit. The switching flyback transformer and the current transformer share a common core. The windings of the switching flyback transformer may be wound around one leg of the common core, while the windings of the current transformer may be wound around a different leg of the common core.Type: ApplicationFiled: January 31, 2008Publication date: August 6, 2009Applicant: STMicroelectronics, Inc.Inventors: Eric Danstrom, John S. Lo Giudice
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Patent number: 7571402Abstract: A leakage power control vector is loaded into existing test scan chain elements for application to circuit elements of a circuit in which the leakage currents are to be controlled. The vector is designed to configure the circuit elements into states in which leakage currents are reduced. A multiplexer selects the power control vector for loading into the scan chain elements, and a clock generator clocks the configuration vector into the scan chain elements. A sleep mode detector may be provided to configure the multiplexer to select the power control vector and to operate the clock generator to clock the power control vector into the scan chain elements when a sleep mode of the circuit is detected.Type: GrantFiled: August 28, 2003Date of Patent: August 4, 2009Assignee: STMicroelectronics, Inc.Inventor: Razak Hossain
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Patent number: 7571204Abstract: There is disclosed an M-bit adder capable of receiving a first M-bit argument, a second M-bit argument, and a carry-in (CI) bit. The M-bit adder comprises M adder cells arranged in R rows, wherein a least significant adder cell in a first one of the rows of adder cells receives a first data bit, AX, from the first M-bit argument and a first data bit, BX, from the second M-bit argument, and generates a first conditional carry-out bit, CX(1), and a second conditional carry-out bit, CX(0), wherein the CX(1) bit is calculated assuming a row carry-out bit from a second row of adder cells preceding the first row is a 1 and the CX(0) bit is calculated assuming the row carry-out bit from the second row is a 0.Type: GrantFiled: September 21, 2000Date of Patent: August 4, 2009Assignee: STMicroelectronics, Inc.Inventor: William E. Ballachino
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Patent number: 7564638Abstract: An amplifying circuit and method are disclosed for amplifying electrical signals, such as electrical signals generated by the read head of a disk drive. The circuit includes a pair of cross-coupled differential amplifier circuits. Each differential amplifier circuit is asymmetric, including two input transistors of different transistor types. For instance, a first of the two input transistors of each differential amplifier circuit may be a bipolar transistor and a second of the two input transistors may be a field effect transistor. By utilizing asymmetric differential amplifier circuits, a relatively wider operating frequency range is obtained.Type: GrantFiled: May 23, 2006Date of Patent: July 21, 2009Assignee: STMicroelectronics, Inc.Inventors: Baris Posat, Kemal Ozanoglu, Alessandro Venca
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Publication number: 20090180453Abstract: A protocol for inter-cell communication in a cognitive radio wireless access network using beacon period framing is disclosed. By establishing scheduled use of beacon periods within each frame of a super-frame among a plurality of participating cells in a wireless access network, efficient and reliable communication can take place eliminating beacon packet collisions and bandwidth wastage. Within each super-frame exits 16 data frames of fixed size which can each include both a data transmission portion and a beacon period. A protocol is established by which announcement, reserved, and free-to-use beacon periods are established within the super-frames associated with a particular spectrum. By coordinating communication between cells on the beacon period, collision between cells by simultaneous attempts to transmit or bandwidth wastage of periods in which no transmission takes place can be avoided.Type: ApplicationFiled: January 15, 2009Publication date: July 16, 2009Applicant: STMicroelectronics, Inc.Inventor: Wendong Hu