Patents Assigned to STMicroelectronics, Inc.
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Publication number: 20090180492Abstract: A protocol for resolving shared spectrum contentions in cognitive radio wireless access networks is presented. Using medium access control level messaging a request for access to a shared spectrum is conveyed to the current occupier of the spectrum. Each request is associated with a unique and random spectrum access priority number. At the end of a request window the priority numbers associated with each request are compared and a winner is declared. The winning cell, informed of its newly gained access to the shared spectrum, sends a reply to the current occupier of the shared spectrum with a proposed time of acquisition/release of the shared spectrum. The proposed time is confirmed and announced, and upon arrival of the designated time the shared spectrum is released by the current occupier of the shared spectrum and acquired by the requesting cell.Type: ApplicationFiled: January 15, 2009Publication date: July 16, 2009Applicant: STMicroelectronics, Inc.Inventor: Wendong Hu
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Publication number: 20090169190Abstract: An integrated semiconductor heating assembly includes a semiconductor substrate, a chamber formed therein, and an exit port in fluid communication with the chamber, allowing fluid to exit the chamber in response to heating the chamber. The integrated heating assembly includes a first heating element adjacent the chamber, which can generate heat above a selected threshold and bias fluid in the chamber toward the exit port. A second heating element is positioned adjacent the exit port to generate heat above a selected threshold, facilitating movement of the fluid through the exit port away from the chamber. Addition of the second heating element reduces the amount of heat emitted per heating element and minimizes thickness of a heat absorption material toward an open end of the exit port. Since such material is expensive, this reduces the manufacturing cost and retail price of the assembly while improving efficiency and longevity thereof.Type: ApplicationFiled: December 27, 2007Publication date: July 2, 2009Applicant: STMicroelectronics, Inc.Inventors: Ming Fang, Fuchao Wang
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Publication number: 20090168077Abstract: A position sensing apparatus and method, motion control system, and integrated circuit are provided that include a plurality of sensors and a tracking processor. The plurality of sensors includes a linear array of sensors that sense a plurality of features of an object. A spacing between two of the plurality of sensors is substantially smaller than a spacing between two of the plurality of features. The tracking processor samples signals from the sensors, compares the samples to previous samples and calculates a position of the object. The plurality of sensors may include a second linear array of sensors. Centers of the sensors of the second linear array may be offset from centers of the sensors of the first linear array along a longitudinal axis of the plurality of sensors.Type: ApplicationFiled: October 14, 2008Publication date: July 2, 2009Applicant: STMicroelectronics, Inc.Inventor: John A. Widder
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Publication number: 20090168620Abstract: The invention relates to a data modulation method applicable to make data streams tend to have desired properties, useful for clock recovery, making signals more distinguishable, or enforcing run-length conditions. A stream of input data and a corresponding stream of output data are grouped into elements of a finite field. Input elements of said input data are modified by a transform generating output elements of the output data, such that a current output element is a linear combination of a current input element and at least one previous output element. A multiplier applied to at least one previous output element is a non-zero and non-unity element of the finite field. A set of initial conditions inherent to the transform, is selected such that the output elements resulting from the transform tend to have the desired property.Type: ApplicationFiled: December 29, 2008Publication date: July 2, 2009Applicant: STMICROELECTRONICS, INC.Inventors: William G. Bliss, Razmik Karabed
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Patent number: 7552314Abstract: The invention provides a method and apparatus for branch prediction in a processor. A fetch-block branch target buffer is used in an early stage of pipeline processing before the instruction is decoded, which stores information about a control transfer instruction for a “block” of instruction memory. The block of instruction memory is represented by a block entry in the fetch-block branch target buffer. The block entry represents one recorded control-transfer instruction (such as a branch instruction) and a set of sequentially preceding instructions, up to a fixed maximum length N. Indexing into the fetch-block branch target buffer yields an answer whether the block entry represents memory that contains a previously executed a control-transfer instruction, a length value representing the amount of memory that contains the instructions represented by the block, and an indicator for the type of control-transfer instruction that terminates the block, its target and outcome.Type: GrantFiled: October 17, 2005Date of Patent: June 23, 2009Assignee: STMicroelectronics, Inc.Inventors: Anatoly Gelman, Russell Schnapp
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Publication number: 20090153246Abstract: A method for varying gain exponentially with respect to a control signal is provided. The method includes receiving a primary control signal. A secondary control signal is generated based on the primary control signal. The secondary control signal is provided to a variable gain amplifier and is operable to exponentially vary a gain for the variable gain amplifier with respect to the primary control signal.Type: ApplicationFiled: February 17, 2009Publication date: June 18, 2009Applicant: STMicroelectronics, Inc.Inventor: Christopher Yong
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Patent number: 7547483Abstract: A fuel cell device includes a housing containing a fuel processor that generates fuel gas and a fuel cell having electrodes forming an anode and cathode, and an ion exchange electrolyte positioned between the electrodes. The housing can be formed as first and second cylindrically configured outer shell sections that form a battery cell that is configured similar to a commercially available battery cell. A thermal-capillary pump can be operative with the electrodes and an ion exchange electrolyte, and operatively connected to the fuel processor. The electrodes are configured such that heat generated between the electrodes forces water to any cooler edges of the electrodes and is pumped by capillary action back to the fuel processor to supply water for producing hydrogen gas. The electrodes can be formed on a silicon substrate that includes a flow divider with at least one fuel gas input channel that can be controlled by a MEMS valve.Type: GrantFiled: October 5, 2004Date of Patent: June 16, 2009Assignee: STMicroelectronics, Inc.Inventor: Anthony M. Chiu
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Publication number: 20090147741Abstract: Data service transmission interruption is minimized by initially setting up a cluster of channels to transmit data services. As the need arises to switch channels due to the detection of an incumbent signal, the data services can be switched with substantially no delay. A group of channels from those available in a wireless network are chosen to form a cluster of channels. Each channel within the cluster is set up to convey data services with channel parameters being stored. A first operating channel is chosen from among the cluster of channels to transmit the data services. While the data services are being transmitted on the first operating channel, out-of-band spectrum sensing occurs on the other channels. Upon predetermined criteria a channel switch occurs. As each channel has already been set up the necessary channel parameters are retrieved from storage and restored without data service interruption.Type: ApplicationFiled: November 7, 2008Publication date: June 11, 2009Applicant: STMicroelectronics, Inc.Inventor: Wendong Hu
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Publication number: 20090147346Abstract: An apparatus is provided that includes a light source, an array of light-reflecting devices, and a processor for positioning the light-reflecting devices so as to display an image on the display screen. Each of the light-reflecting devices selectively reflects the light from the light source onto a corresponding pixel of a display screen. The processor positions a first of the light-reflecting devices such that light from the light source is reflected by the first light-reflecting device onto a first pixel of the display screen, which is different than the pixel of the display screen that corresponds to the first light-reflecting device.Type: ApplicationFiled: February 6, 2009Publication date: June 11, 2009Applicant: STMicroelectronics, Inc.Inventor: FRANK BRYANT
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Publication number: 20090146720Abstract: A generator of synchronization pulses intended for at least two registers, including a first input intended to receive a clock signal and at least one output intended to deliver the pulses on the clock input of said registers, and at least one second input intended to receive a signal for forcing the output, independently from the clock signal, to make said registers transparent.Type: ApplicationFiled: October 14, 2008Publication date: June 11, 2009Applicants: STMicroelectronics Inc., STMicroelectronics S.A.Inventors: Benoit Lasbouygues, Sylvain Clerc, Alain Artieri, Thomas Zounes, Francoise Jacquet
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Patent number: 7542045Abstract: An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.Type: GrantFiled: December 13, 2007Date of Patent: June 2, 2009Assignee: STMicroelectronics, Inc.Inventors: Jefferson Eugene Owen, Raul Zegers Diaz, Osvaldo Colavin
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Patent number: 7541745Abstract: A fluorescent lamp assembly includes a fluorescent lamp ballast capable of detecting at least one of a plurality of input signals and generating an output signal. The output signal is associated with a power level that is based on the at least one detected input signal. The fluorescent lamp assembly also includes a fluorescent lamp capable of receiving the output signal and generating light. An intensity of the light is based on the power level associated with the output signal.Type: GrantFiled: November 21, 2007Date of Patent: June 2, 2009Assignee: STMicroelectronics, Inc.Inventor: Thomas L. Hopkins
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Patent number: 7539244Abstract: A receiver includes a filter capable of receiving an input signal and generating an output signal. The filter provides a transfer function. The filter includes a first stage capable of adjusting a pole and a first zero of the transfer function. The filter also includes a second stage capable of adjusting a second zero of the transfer function. In addition, the filter includes a third stage capable of adjusting a third zero of the transfer function.Type: GrantFiled: September 29, 2004Date of Patent: May 26, 2009Assignee: STMicroelectronics, Inc.Inventors: Krishna B. Thirunagari, Giorgio Mariani
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Patent number: 7535502Abstract: Disclosed is a fault tolerant CMOS image sensor that includes circuitry for identifying defective pixels and masking them during image generation. Masking may involve, in one example, replacing the output of a given pixel with an average of the output of surrounding non-faulty pixels. Thus, while image sensors may be fabricated with some number of faulty pixels, the images produced by such sensors will not have undesirable bright or dark spots. The disclosed sensor includes (a) one or more pixels (active or passive) capable of providing outputs indicative of a quantity of radiation to which each of the one or more pixels has been exposed; and (b) one or more circuit elements electrically coupled to the one or more pixels and configured to identify and correct faulty pixels in the CMOS imager. The one more pixels each include a photodiode diffusion formed in a well and a tap to power or ground also formed in the well.Type: GrantFiled: July 3, 2003Date of Patent: May 19, 2009Assignee: STMicroelectronics, Inc.Inventors: Roberto Rambaldi, Marco Tartagni, Alan H. Kramer
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Patent number: 7534719Abstract: A protective barrier layer, formed of a material such as titanium or titanium nitride for which removal by chemical mechanical polishing (CMP) is primarily mechanical rather than primarily chemical, formed on a conformal tungsten layer. During subsequent CMP to pattern the tungsten layer, upper topological regions of the protective barrier layer (such as those overlying interlevel dielectric regions) are removed first, exposing the tungsten under those regions to removal, while protective barrier layer regions over lower topological regions (such as openings within the interlevel dielectric) remain to prevent chemical attack of underlying tungsten. CMP patterned tungsten is thus substantially planar with the interlevel dielectric without dishing, even in large area tungsten structures such as MOS capacitor structures.Type: GrantFiled: April 9, 2008Date of Patent: May 19, 2009Assignee: STMicroelectronics, Inc.Inventors: Charles R. Spinner, III, Rebecca A. Nickell, Todd H. Gandy
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Patent number: 7534716Abstract: A system and method is disclosed for venting pressure from an integrated circuit package that is sealed with a lid. During a surface mount process for mounting a ball grid array integrated circuit package to a circuit board the application of heat (1) weakens the solder that seals a soldered lid, and (2) increases vapor pressure within the integrated circuit package. This may cause the soldered lid to move out of its soldered position. The present invention solves this problem by providing an integrated circuit with a solder mask that has a plurality of solder mask vents that form a plurality of vapor pressure vents through the solder. The vapor pressure vents prevent the occurrence of any increase in vapor pressure that would shift the soldered lid out of its soldered position. An alternate embodiment vents pressure through an epoxy layer that is used to attach a lid by epoxy.Type: GrantFiled: September 8, 2006Date of Patent: May 19, 2009Assignee: STMicroelectronics, Inc.Inventors: Anthony M. Chiu, Tom Q. Lao
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Publication number: 20090122580Abstract: A thyristor power control circuit reduces EMI and maintains a holding current in the thyristor to prevent flickering at a load. The power control circuit includes a thyristor configured to receive an input AC voltage, and responsive to a gate pulse generates a modified AC voltage. A rectifier receives the modified AC voltage and generates a rectified DC voltage. A power converter coupled to the rectifier receives the rectified DC voltage and generates a controlled output current. A damping circuit coupled to an output terminal of the rectifier includes a damping resistor for maintaining the holding current in the thyristor during an ON period of the thyristor. The damping circuit includes a first capacitor coupled in series to the damping resistor and a diode coupled in parallel to the damping resistor. The diode enables the first capacitor to discharge without causing power loss at the damping resistor.Type: ApplicationFiled: May 2, 2008Publication date: May 14, 2009Applicant: STMicroelectronics, Inc.Inventors: Thomas Stamm, Vipin Bothra, Vee Shing Wong
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Patent number: 7533382Abstract: A hyperprocessor includes a control processor controlling tasks executed by a plurality of processor cores, each of which may include multiple execution units, or special hardware units. The control processor schedules tasks according to control threads for the tasks created during compilation and comprising a hardware context including register files, a program counter and status bits for the respective task. The tasks are dispatched to the processor cores or special hardware units for parallel, sequential, out-of-order or speculative execution. A universal register file contains data to be operated on by the task, and an interconnect couples at least the processor cores or special hardware units to each other and to the universal register file, allowing each node to communicate with any other node.Type: GrantFiled: October 30, 2002Date of Patent: May 12, 2009Assignee: STMicroelectronics, Inc.Inventor: Faraydon O. Karim
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Patent number: 7525380Abstract: A method for varying gain exponentially with respect to a control signal is provided. The method includes receiving a primary control signal. A secondary control signal is generated based on the primary control signal. The secondary control signal is provided to a variable gain amplifier and is operable to exponentially vary a gain for the variable gain amplifier with respect to the primary control signal.Type: GrantFiled: June 20, 2006Date of Patent: April 28, 2009Assignee: STMicroelectronics, Inc.Inventor: Christopher Yong
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Publication number: 20090106537Abstract: An improved superscalar processor. The processor includes multiple lanes, allowing multiple instructions in a bundle to be executed in parallel. In vector mode, the parallel lanes may be used to execute multiple instances of a bundle, representing multiple iterations of the bundle in a vector run. Scheduling logic determines whether, for each bundle, multiple instances can be executed in parallel. If multiple instances can be executed in parallel, coupling circuitry couples an instance of the bundle from one lane into one or more other lanes. In each lane, register addresses are renamed to ensure proper execution of the bundles in the vector run. Additionally, the processor may include a register bank separate from the architectural register file. Renaming logic can generate addresses to this separate register bank that are longer than used to address architectural registers, allowing longer vectors and more efficient processor operation.Type: ApplicationFiled: December 22, 2008Publication date: April 23, 2009Applicant: STMicroelectronics Inc.Inventor: Osvaldo M. Colavin