Abstract: A system architecture for storing and retrieving data includes a storage device organized in a plurality of blocks. There is provided at least one classifying circuit for organizing the data to be stored in classes according to their content, associating to the data thus organized class-of-content identifiers. The input information can hence be stored, according to the class-of-content identifiers, in memory blocks having appropriately set addresses. The data, with associated thereto a given class-of-content identifier, are stored in at least one corresponding block.

Abstract: A voltage regulator connected to a memory cell is configured by identifying at least a first and a second operation regions of the cell and associating the first and second operation regions with respective first and second operation conditions of the memory cell. An operative condition of the memory cell involved in a programming operation is detected, and at least a configuration signal of the regulator according to said detected operative condition is generated, this configuration signal taking a first and a second value associated with the first and second operation conditions.

Abstract: A method and device for performing a quantum algorithm where the superposition, entanglement with interference operators determined for performing selection, crossover, and mutation operations based upon a genetic algorithm. Moreover, entanglement vectors generated by the entanglement operator of the quantum algorithm may be processed by a wise controller implementing a genetic algorithm before being input to the interference operator. This algorithm may be implemented with a hardware quantum gate or with a software computer program running on a computer. Further, the algorithm can be used in a method for controlling a process and a relative control device of a process which is more robust, requires very little initial information about dynamic behavior of control objects in the design process of an intelligent control system, or random noise insensitive (invariant) in a measurement system and in a control feedback loop.

Abstract: A micropump includes a body (10) of semiconductor material, accommodating fluid-tight chambers (32), having an internal preset pressure, lower than atmospheric pressure. The fluid-tight chambers (32), sealed by a diaphragm (35) that can be electrically opened, are selectively openable using a first electrode (37) and second electrodes (38), accommodating between them portions of the diaphragm (35).

Abstract: A method of programming cells in a nonvolatile memory is based upon a Global Verify operation and a Byte-by-byte Verify operation. The cells of a destination page of the nonvolatile memory are programmed, and logic values stored in the programmed cells of a source page of the same memory are verified that they have been correctly copied into corresponding cells of the destination page. The method carries out the fast but inadequate-at-times Global Verify operation, and if the Global Verify operation fails for a certain number of attempts, the Byte-by-byte Verify operation is carried out, which is slower but accurate.

Abstract: In a first step, slot synchronization may be obtained by setting in correlation the received signal with a primary sequence, which represents the primary channel, and storing the received signal. During a second step, the correlator may be re-used for correlating the received signal with a secondary sequence corresponding to the secondary synchronization codes. The correlator may include a first filter and a second filter connected in series, which receive a first secondary sequence and a second secondary sequence, which may include Golay sequences. Architectures of parallel and serial types, as well as architectures designed for reusing further circuit parts are also disclosed. The invention is particularly applicable in mobile communication systems based upon standards such as UMTS, CDMA2000, IS95, and WBCDMA.

Abstract: A voltage-down converter for providing an output voltage lower than a power supply voltage of the converter is proposed. The converter includes voltage regulation means for obtaining an intermediate voltage corresponding to the output voltage from the power supply voltage by controlling a variable-conductivity element with a control signal resulting from a comparison between the intermediate voltage and a reference voltage, and an output stage for obtaining the output voltage from the power supply voltage by controlling a further variable-conductivity element with the control signal, wherein the further variable-conductivity element has a modular structure with at least one set of multiple basic modules, the converter further including means for enabling and/or disabling the modules of each set in succession according to a comparison between the output voltage and the intermediate voltage.

Abstract: An electric circuit includes a supply terminal to receive an outer supply voltage and a voltage regulator coupled to the supply terminal and to provide supply and resting voltages. A lock-out circuit is switchable between active and inactive states and receives the supply voltage at a supply node to generate, in the active state, an output voltage on a output terminal thereof. A protection circuit protects against electrostatic discharge, having at least one first diode coupled between the supply node and the output terminal. A cut-off electronic lock couples, in the inactive state, the supply node to the supply terminal by reverse biasing the at least one first diode to make a voltage of the output terminal float.

Abstract: A method of controlling a process driven by a control signal for producing a corresponding output includes producing an error signal as a function of a state of the process and of a reference signal. A control signal is generated as a function of the error signal and of a parameter adjustment signal. The control signal is applied to the process. A derived signal representative of a quantity to be minimized is calculated by processing paired values of the state of the process and the control signal. A correction signal is calculated from a set of several different values of the control signal that minimizes the derived signal. The parameter adjustment signal is calculated by a neural network and fuzzy logic processor from the error signal and the correction signal. The correction signal is periodically calculated by a Quantum Genetic Search Algorithm that results from a merging of a genetic algorithm and a quantum search algorithm.

Abstract: Multi-level programming allows for writing a first and a second bit in selected cells by separately programming the first bit from the second bit. Programming of the first bit determines a shifting from a first threshold level to a second threshold level. Programming of the second bit requires a preliminary reading to detect whether the first bit has been modified, performing a first writing step to bring the cell to a third threshold voltage if the first bit has been modified and performing a second writing step to bring the selected cell to a fourth threshold voltage different from the third threshold level if the first bit has not been modified. For increasing reading and program reliability, during preliminary reading of the second portion a reading result is forced to correspond to the first threshold level.

Abstract: A method for texture compressing images having a plurality of color components (R, G, B) includes defining color representatives for use in encoding by defining groups of colors for each color component (R,G,B), and selecting a representative median color for the group. Each group ideally includes 3 to 15 increasing colors. The method includes computing, for each group, an error between each member of the group and the representative median color of the group. Typically, the error is computed as the sum of the absolute differences (SAD) between each member of the group and the representative median color of the group.

Abstract: A process in a plasma reactor for filling a trench formed in a wafer of semiconductor material, said trench having at least one lateral wall and a bottom wall, wherein the process includes depositing a layer of material in the trench, the layer of material having a non-uniform thickness with an overhang on the at least one lateral wall, at a distance from the bottom wall which is a function of a set of operative parameters of the plasma reactor, and repeatedly varying at least one of the operative parameters for varying the distance of the overhang from the bottom wall.

Abstract: A receiver in a data read channel has an input terminal for receiving an input signal provided by a transmitter of the data read channel, and produces an output signal at an output terminal. The receiver includes a finite impulse response (FIR) filter coupled to the input terminal and having filter coefficients capable of being adapted, an interpolated timing-recovery circuit coupled to an output of the FIR filter, the timing-recovery circuit having an output signal coupled to the output terminal of the receiver, and a timer circuit coupled to the output terminal and feedback connected to the timing-recovery circuit, wherein the coefficients of the timing-recovery circuit are dynamically adapted using a cost weighted function through a signal power spectrum of the data read channel.

Abstract: To carry out de-interlacing of digital images there is provided a spatial-type de-interlacing process to be applied to a digital image for obtaining a spatial reconstruction. Furthermore, to the digital image there are also applied one or more temporal-type de-interlacing processes for obtaining one or more temporal reconstructions, and the spatial reconstruction and the one or more temporal reconstructions are sent to a decision module. The decision module applies a cost function to the spatial reconstruction and the temporal reconstructions and chooses from among the spatial reconstruction and the temporal reconstructions the one that minimizes the cost function. Preferential application is to display systems, in particular displays of a cathode-ray type, liquid-crystal type, and plasma type which use a mechanism of progressive scan.

Abstract: An integrated device is provided that includes a non-volatile memory having an addressing parallelism and a data parallelism, and a communication interface for interfacing the memory with an external bus. The external bus has a transfer parallelism lower than the addressing parallelism and the data parallelism. The communication interface includes control means for executing multiple reading operations and/or multiple writing operations on the memory according to different modalities in response to corresponding command codes received from the external bus. Also provided is a method of operating such an integrated device.

Abstract: A variable-gain amplifier includes an amplifier stage; an attenuating network receiving an input signal; a plurality of transconductance stages, connected between respective nodes of the attenuating network and the amplifier stage, wherein each of the transconductance stages has a differential circuit, configured to supply differential currents to the amplifier stage; and a gain-control circuit for controlling the transconductance stages according to an electrical control quantity. Each of the transconductance stages further includes a current-divider circuit associated to the differential circuit and controlled by the gain-control circuit so as to divide the differential currents between the amplifier stage and a dispersion line proportionally to the control quantity.

Abstract: An electronic semiconductor device has a sublithographic contact area between a first conductive region and a second conductive region. The first conductive region is cup-shaped and has vertical walls which extend, in top plan view, along a closed line of elongated shape. One of the walls of the first conductive region forms a first thin portion and has a first dimension in a first direction. The second conductive region has a second thin portion having a second sublithographic dimension in a second direction transverse to the first dimension. The first and the second conductive regions are in direct electrical contact at their thin portions and form the sublithographic contact area. The elongated shape is chosen between rectangular and oval elongated in the first direction. Thereby, the dimensions of the contact area remain approximately constant even in presence of a small misalignment between the masks defining the conductive regions.

Abstract: A variable impedance circuit includes at least one fixed resistance and a plurality of transistors between a first and a second terminal. The transistors belonging to the plurality of transistors are arranged parallel to one another and parallel to the resistance and are controllable by a plurality of control signals different from one another and configured in such a way as to obtain a total impedance between said first and second terminals that is substantially variable in a continuous manner.

Abstract: A vertical conduction power electronic device package and corresponding assembly method comprising at least a metal frame suitable to house at least a plate or first semiconductor die having at least a first and a second conduction terminal on respective opposed sides of the first die. The first conduction terminal being in contact with said metal frame and comprising at least an intermediate frame arranged in contact with said second conduction terminal.

Abstract: Digital signals are transmitted on a bus at given instants selectively in a non-encoded format and an encoded format. The decision whether to transmit the signals in non-encoded format or in encoded format is taken in part, based on a comparison of the signal to be transmitted on the bus for an instant of the aforesaid given instants with the signal transmitter on the bus for the preceding instant, so as to minimize switching activity on the bus.