Abstract: A sigma-delta-type converter comprises: a sigma-delta modulator having a digital output having a first prefixed bit number; a randomizer including a circular memory; an analogical reconstruction filter comprising a branch number equal to said first default number including sampling capacitors and a low-pass filter; characterized in that said circular memory comprises a number of elements equal to said first default number of bits less one and receives in input said first default number of bits less one, and in that a bit of said first default number of bits is applied to one of said branches of said reconstruction filter.

Abstract: A nonvolatile memory device is described comprising a memory array, a row decoder and a column selector for addressing the memory cells of the memory array, and a biasing stage for biasing the array access device terminal of the addressed memory cell. The biasing stage is arranged between the column selector and the memory array and comprises a biasing transistor having a drain terminal connected to the column selector, a source terminal connected to the array access device terminal of the addressed memory cell, and a gate terminal receiving a logic driving signal, the logic levels of which are defined by precise and stable voltages and are generated by a logic block and an output buffer cascaded together. The output buffer may be supplied with either a read voltage or a program voltage supplied by a multiplexer.

Abstract: A method for detecting displacements of a micro-electromechanical sensor including a fixed body and a mobile mass, and forming a first sensing capacitor and a second sensing capacitor having a common capacitance at rest. The first and second sensing capacitors being connected to a first input terminal and, respectively, to a first output terminal and to a second output terminal of the sensing circuit. The method includes the steps of closing a first negative-feedback loop, which is formed by the first and second sensing capacitors and by a differential amplifier, feeding an input of the differential amplifier with a staircase sensing voltage through driving capacitors so as to produce variations of an electrical driving quantity which are inversely proportional to the common sensing capacitance, and driving the sensor with the electrical driving quantity.

Abstract: Described herein are a molecular memory obtained using DNA strand molecular switches and carbon nanotubes, and a manufacturing method thereof. In particular, the nonvolatile memory is manufactured according to an architecture that envisages the use of carbon nanotubes as electrical connectors and DNA strands as physical means on which to write the information. In other words, the nonvolatile memory is made by means of a set of molecular DNA strand switches, the addressing of which is controlled by molecular wires made up of carbon nanotubes.

Abstract: An electronic torque control and distribution system is provided for a hybrid propulsion vehicle. The drive thrust of the hybrid propulsion vehicle is distributed between an electric engine and an internal combustion engine through a transmission system. The transmission system delivers the torque of both engines to the vehicle wheels. The electronic torque control and distribution system is slaved to a control unit, and includes a controller for incorporating a fuzzy logic processor to predict through soft computing techniques the torque contributions of the electric engine and of the internal combustion engine. A sensor estimates the vehicle polluting emissions. The controller and the sensor are both connected to the control unit.

Abstract: The amplifier circuit includes at least one amplification branch having an input transistor, an output transistor, having a source terminal connected to the input terminal and a drain terminal connected to a first output terminal, and a gain raising stage, having an input and an output connected to the source terminal and, respectively, to a gate terminal of the output transistor. The amplifier circuit includes, moreover, a compensation capacitor connected between the gate terminal and the drain terminal of the output transistor.

Abstract: A process for fabricating non-volatile memory cells on a semiconductor substrate includes forming a stack structure comprised of a first polysilicon layer isolated from the substrate by an oxide layer. The first polysilicon layer, oxide layer, and semiconductor substrate are cascade etched to define a first portion of a floating gate region of the cell and at least one trench bordering an active area of the memory cell. The at least one trench is filled with an isolation layer. The process further includes depositing a second polysilicon layer onto the whole exposed surface of the semiconductor, and etching the second polysilicon layer to expose the floating gate region formed in the first polysilicon layer, thereby forming extensions adjacent the above portion of the first polysilicon layer.

Abstract: A MOS semiconductor device formed on a substrate of a first conductivity type is provided. The device includes active zones for elementary active elements, and at least one inactive zone suitable for electric signal input or output. The substrate is connected with the drain terminal of the device, and at least one of the elementary active elements includes a body region of a second conductivity type that is connected with the source terminal of the device. The at least one inactive zone includes a semiconductor region of the second conductivity type formed in the substrate and adjacent a surface of the substrate, a conductive layer located over the semiconductor region, and a silicon oxide layer located between the semiconductor region and the conductive layer. The silicon oxide layer has alternating first zones and second zones that are contiguous to each other, with the first zones having a greater thickness than the second zones.

Abstract: An integrated cellular network structure that is programmable to solve partial derivative differential equations in order to control a phenomenon of diffusion or a propagation of electric drive pulses for robot actuators. Such structure includes analog and digital portions interconnected with each other; the analog portion having a matrix array of analog cells arranged to receive data from an I/O interface, and the digital portion having first and second memory arrays for storing a desired configuration and the initial state of such analog matrix array, respectively.

Abstract: A memory device having an associative memory for the storage of data belonging to a plurality of classes. The associative memory has a plurality of memory locations aligned along rows and columns for the storage of data along the rows. Each memory row has a plurality of groups of memory locations, each storing a respective datum, wherein groups of memory locations adjacent along one and the same row store data belonging to different classes. Groups of memory locations adjacent in the direction of the columns and disposed on different rows store data belonging to one and the same class. Each class has data having a different maximum lengths. The device is particularly suitable for the storage of words belonging to a dictionary for automatic recognition of words in a written text.

Abstract: A digital AM demodulator, particularly for demodulating an input signal originating from a tuner, includes a first carrier generator for generating a first carrier signal which is not correlated with the input signal, and a multiplier for multiplying the first carrier signal by the input signal. Filters are arranged upstream and downstream of the multiplier for filtering undesired signals. The digital AM demodulator further includes a circuit for detecting a phase shift between a frequency of the input signal and a frequency of a local carrier signal. A correlation circuit correlates the first carrier signal with the input signal. The first carrier signal and the local carrier signal are mutually correlated, whereas the local carrier signal is not correlated with the input signal.

Abstract: A method of manufacturing an integrated semiconductor device having at least one non-volatile floating gate memory cell and at least one logic transistor. The method includes growing a first gate oxide layer over a silicon substrate, depositing a first polysilicon layer over the first gate oxide layer, selectively etching and removing the first polysilicon layer in order to define the floating gate of the memory cell, introducing dopant in order to obtain source and drain regions of the memory cell, depositing a dielectric layer, selectively etching and removing the dielectric layer and the first polysilicon layer in a region wherein the logic transistor will be formed, depositing a second polysilicon layer, selectively etching and removing the second polysilicon layer in order to define the gate of the logic transistor and the control gate of the memory cell.

Abstract: A built-in self-test circuit adapted to be embedded in an integrated circuit for testing the integrated circuit, including in particular a collection of addressable elements, for example a semiconductor memory. The BIST circuit comprises a general-purpose data processor programmable for executing a test program for testing the integrated circuit. The BIST circuit comprises an accelerator circuit cooperating with the general-purpose data processor for autonomously conducting operations on the integrated circuit according to the test program. The accelerator circuit comprises configuration means adapted to be loaded with configuration parameters for adapting the accelerator circuit to the specific type of integrated circuit and the specific type of test program.

Abstract: The process comprises the steps of forming, on top of a semiconductor material wafer, a holed mask having a lattice structure and comprising a plurality of openings each having a substantially square shape and a side with an inclination of 45° with respect to the flat of the wafer; carrying out an anisotropic etch in TMAH of the wafer, using said holed mask, thus forming a cavity, the cross section of which has the shape of an upside-down isosceles trapezium; and carrying out a chemical vapor deposition using TEOS, thus forming a TEOS layer which completely closes the openings of the holed mask and defines a diaphragm overlying the cavity and on which a suspended integrated structure can subsequently be manufactured.

Abstract: A transconductance amplifier for inductive loads and a relevant inductive load driving method, the amplifier having an input stage receiving a driving signal (set-point), a power stage connected downstream of the input stage and connected to the load and an output stage fedback on the input stage to transfer a signal associated to the load. Advantageously, the input stage comprises at least a comparator receiving on one input the driving signal and on another input the output of the output stage. A delay block is also provided between the comparator output and the power stage to delay the comparator switching. This can be obtained also by using a hysteretic comparator.

Abstract: A power amplifier comprising at least a load element and at least an active element inserted, in series to each other, between a first and a second voltage reference is described. Advantageously, according to an embodiment of the invention, the load element comprises a DMOS transistor.

Abstract: A method of making a monolithically integrated pressure sensor includes making a cavity in the semiconductor substrate. This may be formed by plasma etching the front side or the back side of the silicon wafer to cut a plurality of trenches or holes deep enough to extend for at least part of its thickness into a doped buried layer of opposite type of conductivity of the substrate and of the epitaxial layer grown over it. The method may also include electrochemically etching through such trenches, and the silicon of the buried layer with an electrolytic solution suitable for selectively etching the doped silicon of the opposite type of conductivity, thereby making the silicon of the buried layer porous. The method may also include oxidizing and leaching away the silicon so made porous.

Abstract: A device for the correction of the power factor in power supply units with forced switching operating in transition mode is described. The device comprises a converter and a control device coupled to said converter so as to obtain from an alternating network input voltage a regulated output voltage on the output terminal. The converter comprises a power transistor and the control device comprises a pilot circuit suitable for determining the period of switched-on time and the period of switched-off time of said power transistor and control means coupled to said pilot circuits and with said converter and which are capable of prolonging said period of switched-on time of the power transistor at the instants of time in which the alternating network voltage substantially assumes the value zero.

Abstract: A wave-shaper device having an output terminal for providing a first periodic analog signal with a first frequency, the wave-shaper device including an oscillator having an output terminal for providing a second periodic analog signal with a second frequency which is multiple with an even factor of the first frequency, and means for obtaining the first analog signal from the second analog signal.

Abstract: A device is described for the correction of the power factor in power supply units with forced switching operating in transition mode. Said device comprises a converter and a control device coupled with said converter so as to obtain a regulated voltage on the output terminal from an alternating network input voltage. The converter comprises a power transistor whilst the control device comprises a pilot circuit suitable for determining the switch-on time and the switch-off time of the power transistor. The control device furthermore comprises control means coupled with said pilot circuit and with said converter and capable of prolonging the switch-on time of the power transistor at the instants of time wherein the alternating network voltage substantially takes on the value zero.