Abstract: The MEMS gyroscope has a mobile mass carried by a supporting structure to move in a driving direction and in a first sensing direction, perpendicular to each other. A driving structure governs movement of the mobile mass in the driving direction at a driving frequency. A movement sensing structure is coupled to the mobile mass and detects the movement of the mobile mass in the sensing direction. A quadrature-injection structure is coupled to the mobile mass and causes a first and a second movement of the mobile mass in the sensing direction in a first calibration half-period and, respectively, a second calibration half-period. The movement-sensing structure supplies a sensing signal having an amplitude switching between a first and a second value that depend upon the movement of the mobile mass as a result of an external angular velocity and of the first and second quadrature movements.

Abstract: A MOSFET device comprising: a structural region, made of a semiconductor material having a first type of conductivity, which extends between a first side and a second side opposite to the first side along an axis; a body region, having a second type of conductivity opposite to the first type, which extends in the structural region starting from the first side; a source region, having the first type of conductivity, which extends in the body region starting from the first side; a gate region, which extends in the structural region starting from the first side, traversing entirely the body region; and a shielding region, having the second type of conductivity, which extends in the structural region between the gate region and the second side. The shielding region is an implanted region self-aligned, in top view, to the gate region.

Abstract: A control circuit for a voltage source generates a reference signal for a voltage source, wherein the reference signal indicates a requested output voltage to be generated by the voltage source. A digital feed-forward control circuit computes a digital feed-forward regulation value indicative of a requested output voltage by determining a maximum voltage drop at strings of solid-state light sources. A digital feed-back control circuit determines a minimum voltage drop for current regulators/limiters for the strings and determines a digital feed-back correction value as a function of the minimum voltage drop. The control circuit then sets the reference signal after a start-up as a function of the digital feed-forward regulation value and corrects the reference signal as a function of the digital feed-back correction value.

Abstract: An integrated MOSFET device is formed in a body of silicon carbide and with a first type of conductivity. The body accommodates a first body region, with a second type of conductivity; a JFET region adjacent to the first body region; a first source region, with the first type of conductivity, extending into the interior of the first body region; an implanted structure, with the second type of conductivity, extending into the interior of the JFET region. An isolated gate structure lies partially over the first body region, the first source region and the JFET region. A first metallization layer extends over the first surface and forms, in direct contact with the implanted structure and with the JFET region, a JBS diode.

Abstract: A half-bridge control circuit comprises an input terminal, an output terminal for providing a pulsed signal to a half-bridge driver circuit configured to drive two electronic switches connected between two supply terminals, and a feedback terminal for receiving a feedback signal indicative of the instantaneous voltage value at a switching node between the two electronic switches. A selector circuit provides a digital feedback signal. A subtractor generates an error signal by subtracting the digital feedback signal from the reference signal. An integrator generates an integration signal by integrating the value of the error signal. A down-scale circuit generates a reduced resolution integration signal by discarding one or more least significant bits of the integration signal. A sampling circuit generates a sampled integration signal by sampling the reduced resolution integration signal. A pulse generator circuit generates the pulsed signal as a function of the sampled integration signal.

Abstract: In an embodiment a method for recovering an error state of an integrated circuit card, wherein the integrated circuit card is coupled to a transmitter device via a serial communication interface including at least a serial clock signal line on which a serial clock signal is transmittable from the transmitter device to the integrated circuit card, wherein the method includes upon detecting the error state, embedding, by the transmitter device, a reset signal in the serial clock signal; sending, by the transmitter device, the serial clock signal as reference clock signal on the serial clock signal line to the integrated circuit card, the reset signal representing a variation of parameters of the serial clock signal; checking, by the integrated circuit card, a presence of the variation of parameters of the serial clock signal; and upon checking the presence of the variation of parameters, performing, by the integrated circuit card, a transition from the error state to a reset state.

Abstract: In accordance with embodiments, methods and systems for a trigger to the KWS are provided. The computing device converts an audio signal into a plurality of audio frames. The computing device generates a Mel Frequency Cepstral Coefficients (MFCC) matrix. The MFCC matrix includes N columns. Each column of the N columns comprises coefficients associated with audio features corresponding to a different audio frame of the plurality of audio frames. The computing device determines that a trigger condition is satisfied based on an MFCC_0 buffer. The MFCC_0 buffer comprises a first row of the MFCC matrix. The computing device then provides the MFCC matrix to a neural network for the neural network to use the MFCC matrix to make keyword inference based on the determining that the trigger condition is satisfied.

Abstract: The photodetector is formed in a silicon carbide body formed by a first epitaxial layer of an N type and a second epitaxial layer of a P type. The first and second epitaxial layers are arranged on each other and form a body surface including a projecting portion, a sloped lateral portion, and an edge portion. An insulating edge region extends over the sloped lateral portion and the edge portion. An anode region is formed by the second epitaxial layer and is delimited by the projecting portion and by the sloped lateral portion. The first epitaxial layer forms a cathode region underneath the anode region. A buried region of an N type, with a higher doping level than the first epitaxial layer, extends between the anode and cathode regions, underneath the projecting portion, at a distance from the sloped lateral portion as well as from the edge region.

Abstract: An artificial muscle fiber includes an external fiber and an internal fiber. The external fiber includes a first linear array of actuators having protrusions directed in a first direction. The internal fiber includes a second linear array of actuators having protrusions directed in a second direction opposite to the first direction. Protrusions of the first linear array of actuators and protrusions of the second linear array of actuators are separated by a non-zero gap, and each actuator of the first linear array of actuators and the second linear array of actuators includes a soft magnetic material.

Abstract: A control unit for a switching converter has an inductor element coupled to an input and a switch element coupled to the inductor element and generates a command signal having a switching period to switch the switch element and determine a first time period in which an inductor current is flowing in the inductor element for storing energy and a second time period in which energy is transferred to a load. An input current is distorted relative to a sinusoid by a distortion factor caused by current ripple on the inductor current. The duration of the first time period is determined based on a comparison between a peak value of the inductor current and a current reference that is a function of an output voltage of said voltage converter. A reference modification stage modifies one of the current reference and sensed value of the inductor current to compensate for distortion introduced by the distortion factor on the input current.

Abstract: An electro-acoustical transducer such as a Piezoelectric Micromachined Ultrasonic Transducers is coupled with an adjustable load circuit having a set of adjustable load parameters including resistance and inductance parameters. Starting from at least one resonance frequency or at least one ring-down parameter of the electro-acoustical transducer a set of model parameters is calculated for a Butterworth-Van Dyke (BVD) model of the electro-acoustical transducer. The BVD model includes an equivalent circuit network having a constant capacitance coupled to a RLC branch and the adjustable load circuit is coupled with the electro-acoustical transducer at an input port of the equivalent circuit network of the model of the electro-acoustical transducer. The adjustable load parameters are adjusted as a function of the set of model parameters calculated for the BVD model of the electro-acoustic transducer to increase the bandwidth or the sensitivity of the electro-acoustic transducer.

Abstract: Various embodiments provide a device for measuring the flow of fluid inside a tube moved by a peristaltic pump is provided with: a detection electrode arrangement coupled to the tube to detect an electrostatic charge variation originated by the mechanical action of the peristaltic pump on the tube; a signal processing stage, electrically coupled to the detection electrode arrangement to generate an electrical charge variation signal; and a processing unit, coupled to the signal processing stage to receive and process in the frequency domain the electrical charge variation signal to obtain information on the flow of a fluid that flows through the tube based on the analysis of frequency characteristics of the electrical charge variation signal.

Abstract: A PWM controlled multi-phase resonant voltage converter may include a plurality of primary windings powered through respective half-bridges, and as many secondary windings connected to an output terminal of the converter and magnetically coupled to the respective primary windings. The primary or secondary windings may be connected such that a real or virtual neutral point is floating.

Abstract: A MEMS device is formed in a die of semiconductor material having a cavity defined therein and having an anchorage portion. A tiltable structure is elastically suspended over the cavity and has a main extension in a horizontal plane. First and second supporting arms extend between the anchorage portion and opposite sides of the tiltable structure. First and second resonant piezoelectric actuation structures are intended to be biased to thereby cause rotation of the tiltable structure about a rotation axis. The first supporting arm is formed by first and second torsion springs, which are rigid to movements out of the horizontal plane and compliant to torsion about the rotation axis and are coupled together at a constraint region. The first and second resonant piezoelectric actuation structures extend between the anchorage portion and the constraint structure, on first and second sides of the first supporting arm.

Abstract: A method for method of setting up a processing system includes determining availability of user-provided platform information indicative of a first memory platform out of a plurality of memory platforms. In response to determining that the user-provided platform information is available at the first memory platform, a boot loader code is read from the first memory platform. In response to determining that the user-provided platform information is not available, test availability of the boot loader code in another memory platform of the plurality of memory platforms, and read the boot loader code from the another memory platform upon testing the availability of the boot loader code in the another memory platform.

Abstract: A method of operating a non-volatile memory including having a first set of non-volatile memory cells and a second set of non-volatile memory cells. The first set of non-volatile memory cells and second set of non-volatile memory cells are associated with host addresses. Voltage levels are determined to erase the first and second sets of non-volatile memory cells. The first and second sets of non-volatile memory cells are disassociated from the host addresses. And, the first set of non-volatile memory cells is associated to another address based on the voltage level effective to erase the non-volatile memory cells.

Abstract: In an embodiment, the column decoder of a PCM device is divided into two portions that can be governed independently of one another, and the driving signals of the two portions are configured so as to guarantee comparable capacitive loads at the two inputs of a sense amplifier in both of the operations of single-ended reading and double-ended reading. In particular, during single-ended reading, the sense amplifier has a first input that receives a capacitive load corresponding to the direct memory cell selected, and a second input that receives a capacitive load associated to a non-selected complementary memory cell.

Abstract: A MOSFET device includes a semiconductor body having a first and a second face. A source terminal of the MOSFET device includes a doped region which extends at the first face of the semiconductor body and a metal layer electrically coupled to the doped region. A drain terminal extends at the second face of the semiconductor body. The doped region includes a first sub-region having a first doping level and a first depth, and a second sub-region having a second doping level and a second depth. At least one among the second doping level and the second maximum depth has a value which is higher than a respective value of the first doping level and the first maximum depth. The metal layer is in electrical contact with the source terminal exclusively through the second sub-region.

Abstract: Cryptographic circuitry, in operation, generates N first pairs of elliptic curve cryptography (ECC) keys r(i), R(i), with i varying from 1 to N, using K second pairs of ECC keys p(k), P(k), with k varying from 1 to K, wherein K is smaller than N. Each pair r(i), R(i) of the first pairs of keys is a linear combination of pairs of the second pairs of ECC keys according to: ? ? i ? [ 1 ; N ] ? { r ? ( l ) = ? j = 1 K ? A ? ( i , j ) * p ? ( j ) R ? ( i ) = ? j = 1 K ? A ? ( i , j ) * P ? ( j ) , wherein A(i,j) designates a general term of a matrix A of size N*K, and all the sub-matrices of size K*K are invertible. The cryptographic circuitry, in operation, executes cryptographic operations using one or more pairs of the first pairs of ECC keys.

Abstract: A testing tool includes a clock generation circuit generating a test clock and outputting the test clock via a test clock output pad, data processing circuitry clocked by the test clock, and data output circuitry receiving data output from the data processing circuitry and outputting the data via an input/output (IO) pad, the data output circuitry being clocked by the test clock. The testing tool also includes a programmable delay circuit generating a delayed version of the test clock, and data input circuitry receiving data input via the IO pad, the data input circuitry clocked by the delayed version of the test clock. The delayed version of the test clock is delayed to compensate for delay between transmission of a pulse of the test clock via the test clock output pad to an external computer and receipt of the data input from the external computer via the IO pad.