Abstract: Various embodiments provide an apparatus and method for fabricating a wafer, such as a SiC wafer. The apparatus includes a support having a plurality of arms for supporting a substrate. The arms allows for physical contact between the support and the substrate to be minimized. As a result, when the substrate is melted, surface tension between the arms and molten material is reduced, and the molten material will be less likely to cling to the support.

Abstract: The present disclosure is directed to a semiconductor package including a substrate having a lower surface with a plurality of slot structures. The plurality of slot structures are multi-layer structures that encourage the formation of solder joints. The semiconductor package is desirable for high reliability applications in which each solder joint termination should be checked by visual systems to ensure a proper electrical connection has been made.

Abstract: An oscillatory electric signal having an oscillation frequency is processed by time-sampling to generate a sampled oscillatory electric signal. A nonlinear circuit driven by the sampled oscillatory electric signal outputs a hysteretic response signal as a function of the sampled oscillatory electric signal. The hysteretic response signal has a frequency in a first frequency range as a result of an increase in the oscillation frequency of the oscillatory electric signal, and a frequency in a second frequency range as a result of a decrease in the oscillation frequency of the oscillatory electric signal. A detection circuit processes the hysteretic response signal to compute an envelope signal of the hysteretic response signal, perform a comparison of the envelope signal with a threshold, and produce a signal indicative of an increase or a decrease in the oscillation frequency of the oscillatory electric signal as a result of the outcome of the comparison.

Abstract: An integrated transformer includes a primary winding and a secondary winding each having a spiral planar arrangement coils. A dielectric portion of dielectric material is interposed between the primary winding and the secondary winding. A field plate winding is electrically coupled with the primary winding. The field plate winding includes at least one field plate coil having a first lateral extension greater than a second lateral extension of a primary outer coil of the primary winding. The field plate coil is superimposed in plan view to the primary outer coil of the primary winding.

Abstract: A blocking element is provided for connecting an electronic, micro-mechanical and/or micro-electro-mechanical component, in particular for controlling the propulsion of an electric vehicle. The pin blocking element is formed by a holed body having a first end, a second end and an axial cavity configured for fittingly accommodating a connecting pin. A first flange projects transversely from the holed body at the first end and a second flange projects transversely from the holed body at the second end. The first flange has a greater area than the second flange and is configured to be ultrasonically soldered to a conductive bearing plate to form a power module.

Abstract: A synchronous rectifier driver circuit is configured to drive a synchronous rectifier FET and includes a first terminal configured to be connected to a source terminal of the synchronous rectifier FET. A second terminal is configured to be connected to a drain terminal of the synchronous rectifier FET, and a third terminal is configured to be connected to a gate terminal of the synchronous rectifier FET. The synchronous rectifier driver circuit is configured to measure the voltage between the second terminal and the first terminal, and detect a switch-on instant in which the measured voltage reaches a first threshold value and a switch-off instant in which the measured voltage reaches a second threshold value. The synchronous rectifier driver circuit generates a drive signal between the third terminal and the first terminal as a function of the measured voltage.

Abstract: A method of compensating electromagnetic emissions of a device for use in a communication bus, the method including: transmitting a test signal over the communication bus; receiving, at the device, the test signal after propagation over the communication bus; performing frequency analysis processing of the test signal received to detect a set of harmonic components of the test signal received having an amplitude exceeding a certain threshold; storing respective values of frequency of harmonic components in the set of harmonic components having an amplitude exceeding the certain threshold; and generating and transmitting over the communication bus a set of compensation signals, each compensation signal in the set of compensation signals being a sinusoidal signal having a respective frequency equal to one of the frequencies stored, and being in anti-phase with respect to the harmonic component of the test signal received having the respective frequency.

Abstract: A MEMS micromirror device includes a monolithic body of semiconductor material having a first main surface and a second main surface, with the monolithic body having an opening extending from the second main surface and including a suspended membrane of monocrystalline semiconductor material extending between the opening and the first main surface of the monolithic body. The suspended membrane includes a supporting frame and a mobile mass carried by the supporting frame and rotatable about an axis parallel to the first main surface, with the mobile mass having a width less than a width of the opening. A reflecting region extends over the mobile mass.

Abstract: A packaged semiconductor device includes a substrate having a first surface and a second surface opposite the first surface. At least one semiconductor die is mounted at the first surface of the substrate. Electrically-conductive leads are arranged around the substrate, and electrically-conductive formations couple the at least one semiconductor die to selected leads of the electrically-conductive leads. A package molding material is molded onto the at least one semiconductor die, onto the electrically-conductive leads and onto the electrically-conductive formations. The package molding material leaves the second surface of the substrate uncovered by the package molding material. The substrate is formed by a layer of electrically-insulating material.

Abstract: A communication system has a galvanic isolation link coupling a first circuit to a second circuit. The first circuit transmits first data signals to the second circuit and receives second data signals from the second circuit in response to the first data signals. The data signals are transmitted in consecutive time slots of a determined time duration via the galvanic isolation link. The first data signals include polling signals transmitted from the first circuit to the second circuit during consecutive time slots, and on-demand access requests transmitted from the first circuit to the second circuit. The second data signals include status response signals transmitted from the second circuit to the first circuit in response to polling signals received from the first circuit, and access response signals transmitted from the second circuit to the first circuit in response to access requests received from the first circuit.

Abstract: A piezoelectric microelectromechanical structure is provided with a piezoelectric stack having a main extension in a horizontal plane and a variable section in a plane transverse to the horizontal plane. The stack is formed by a bottom-electrode region, a piezoelectric material region arranged on the bottom-electrode region, and a top-electrode region arranged on the piezoelectric material region. The piezoelectric material region has, as a result of the variable section, a first thickness along a vertical axis transverse to the horizontal plane at a first area, and a second thickness along the same vertical axis at a second area. The second thickness is smaller than the first thickness. The structure at the first and second areas can form piezoelectric detector and a piezoelectric actuator, respectively.

Abstract: An electronic module includes a first die of semiconductor material including a first reflector, a second die of semiconductor material including a second reflector, and a frame including a first supporting portion and a second supporting portion parallel to one another. The first and second dies are carried, respectively, by the first and second supporting portions and are respectively arranged so that the first reflector faces the second supporting portion and the second reflector faces the first supporting portion. An incoming light beam impinges upon the first reflector and is reflected on the second reflector so as to be supplied at output from the electronic module.

Abstract: A microelectromechanical mirror device includes a supporting frame of semiconductor material and a plate of semiconductor material. The plate is connected to the supporting frame so as to be orientable around at least one rotation axis. A reflective layer is arranged on a first region of the plate. A piezoelectric actuation structure extends on a second region of the plate adjacent to the reflective layer. The piezoelectric actuation structure is configured to apply forces such as to modify a curvature of the plate.

Abstract: A microelectromechanical device includes a fixed structure having a frame defining a cavity, a tiltable structure elastically suspended above the cavity with main extension in a horizontal plane, a piezoelectrically driven actuation structure which can be biased to cause a desired rotation of the tiltable structure about a first and second rotation axes, and a supporting structure integral with the fixed structure and extending in the cavity starting from the frame. Lever elements are elastically coupled to the tiltable structure at a first end by elastic suspension elements and to the supporting structure at a second end by elastic connecting elements which define a lever rotation axis. The lever elements are elastically coupled to the actuation structure so that their biasing causes the desired rotation of the tiltable structure about the first and second rotation axes.

Abstract: Systems and devices are provided to perform low-power digital filtering of sensor or other data based on bitwise operations. A reference sinusoid is encoded via a plurality of pulse trains, such that each pulse train includes a number of pulses n representing a value of the reference sinusoid out of a maximum possible pulses corresponding to an encoding quantization level. A circular register stores a representation of the encoded sinusoid. A set of multiple logical gate blocks are configured to multiply, via one or more bitwise operations, each of multiple bits of a received input signal with a pulse train corresponding to a value of the encoded sinusoid. A logic circuit coupled to the circular register and the set of multiple logical gate blocks is configured to generate, based on the encoded sinusoid and on the input signal, an output signal indicating an approximate value of the received input signal multiplied by the encoded sinusoid.

Abstract: An embodiment non-volatile memory device includes an array of memory cells, coupled to word lines, and a row decoder including a pull-down stage and a pull-up stage, which includes, for each word line: a corresponding control circuit, which generates a corresponding control signal; and a corresponding pull-up switch circuit, which is controlled via the control signal so as to couple/decouple the word line to/from the supply. The control circuit includes: a current mirror, which injects a current into an internal node; and a series circuit, which couples/decouples the corresponding internal node to/from ground, on the basis of selection/deselection of the corresponding word line so as to cause a decrease/increase in a voltage on the corresponding internal node. Each control signal is a function of the voltage on the corresponding internal node.

Abstract: A delta-sigma modulation circuit has a sampling period and, in operation, generates a delta-sigma modulated signal based on the analog input signal. The delta-sigma modulation circuit includes: a first integrator; an analog-to-digital converter; a feedback-loop coupled between an input of the first integrator and the output interface; a second integrator coupled between the first integrator and the analog-to-digital converter. The delta-sigma modulation circuit has loop-delay compensation circuitry having a plurality of switches. The loop delay compensation circuitry, in operation, controls the plurality of switches based on a time interval of a duration of half the sampling period and generates a loop-delay compensation signal.

Abstract: A method of operating a radio transmitter configured to transmit at least one sequence of logic values by transmitting transmission signals selected in a constellation diagram having a certain cardinality comprises selecting said transmission signals out of a first subset of transmission signals in said constellation diagram, said first subset comprising a first number of transmission signals, and a second subset of transmission signals in said constellation diagram, said second subset comprising a second number of transmission signals, wherein. The transmission signals in the second subset of transmission signals have an energy higher than the transmission signals in the first subset of transmission signals. The sum of said first number of transmission signals and said second number of transmission signals is less than said cardinality.

Abstract: A power supply system includes a voltage application source, and a switched mode power supply having an output coupled to the voltage application source through a first path and through a second path different from the first path. A first node is coupled to the output of the switched mode power supply, the switched mode power supply being configured to couple the first node to the voltage application source through the first path in a first operating mode and through the second path in a different second operating mode. A digital regulator is coupled to the first node. A digital circuit is coupled to an output of the digital regulator. An analog regulator is coupled to the first node and an analog circuit coupled to an output of the analog regulator.

Abstract: In one example, an integrated circuit includes a register interface that includes a plurality of registers, a bus interface configured to monitor write requests transmitted to the register interface, where the write requests include a target address and data to be written. The bus interface is configured to receive the data to be written to the plurality of registers and register selection signals for selecting a respective register in the plurality of registers. The integrated circuit includes a monitoring circuit configured to monitor the register selection signals between the bus interface and the plurality of registers in order to determine when the data to be written to the plurality of registers is valid.