Abstract: An integrated circuit device includes: a Buck converter; and a control circuit for the Buck converter, which includes: a comparator configured to compare a feedback voltage of the Buck converter with a reference voltage that increases from a first voltage to a second voltage; a pulse-width modulator configured to generate a pulse-width modulated (PWM) signal having a timing-varying pulse width proportional to the reference voltage; an AND gate configured to generate a first control signal by performing a logic AND operation on an output of the comparator and the PWM signal; a pulse generator configured to generate a second control signal by generating a pulse in response to a rising edge in the output of the comparator; and a selection circuit configured to, based on an output voltage of the Buck converter, select the first control signal or the second control signal as a control signal for the Buck converter.

Abstract: A pixel includes a photosensitive circuit, a sense node, a first transistor and a first capacitor. A first electrode of the first capacitor is connected to a control terminal of the first transistor. A second electrode of the first capacitor is to a node of application of a first control signal.

Abstract: A MOS transistor including a substrate, a conductive having lateral walls, drain and source regions, and spacers having an upper surface such that the spacers are buried in the substrate and are position between the conductive gate and the drain and source regions is provided. The spacers are each cuboid-shaped and have a width that is constant along the spacers height and independent from a height of the conductive gate. A device including the MOS transistor and a method of manufacture for producing a right-hand portion and a left-hand portion of a MOS transistor is also provided.

Abstract: A method for manufacturing an ohmic contact for a HEMT device, comprising the steps of: forming a photoresist layer, on a semiconductor body comprising a heterostructure; forming, in the photoresist layer, an opening, through which a surface region of the semiconductor body is exposed at said heterostructure; etching the surface region of the semiconductor body using the photoresist layer as etching mask to form a trench in the heterostructure; depositing one or more metal layers in said trench and on the photoresist layer; and carrying out a process of lift-off of the photoresist layer.

Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.

Abstract: For manufacturing a semiconductor electronic device a wafer is provided which has a substrate layer of semiconductor material having a first portion and a second portion distinct from the first portion. An epitaxial region of a single semiconductor material is grown on the first portion of the substrate layer. An epitaxial multilayer having a heterostructure is grown on the second portion of the substrate layer. A first electronic component based on the single semiconductor material is formed from the epitaxial region and a second electronic component based on heterostructure is formed from the heterostructure. Forming a first electronic component comprises forming a plurality of doped regions in the epitaxial region, after the step of growing an epitaxial multilayer.

Abstract: A semiconductor electronic device has a substrate region of semiconductor material; a first electronic component based on heterostructure, which has an epitaxial multilayer that extends on the substrate region and includes a heterostructure; and a separation region that extends on the substrate region. The separation region includes a polycrystalline region of semiconductor material of polycrystalline type which is arranged, along a first direction, alongside the epitaxial multilayer. The electronic device also has an epitaxial region of a single semiconductor material of monocrystalline type which extends on the substrate region. The polycrystalline region extends, along the first direction, between the epitaxial multilayer and the epitaxial region.

Abstract: Electronic device, comprising: a semiconductor body having a surface, an electrical conductivity P and a first doping value; at least one gate region on the surface; one or more source regions, having a second electrical conductivity N, extending in the semiconductor body at the surface and at a first side of the gate region; and at least one body contact region, of P+ type, extending in the semiconductor body at the surface and at the first side of the gate region 22. The first gate region has the shape of a stripe with main extension along a first direction. The first body contact region has a tapered shape along said first direction. The one or more source regions are adjacent to, and at least partially surround, the first body contact region.

Abstract: To manufacture a semiconductor electronic device a wafer is provided that has a substrate layer of semiconductor material having a first portion and a second portion distinct from the first portion. An epitaxial region of a single semiconductor material is grown on the first portion of the substrate layer. An epitaxial multilayer having a heterostructure is grown on the second portion of the substrate layer. A first electronic component based upon the single semiconductor material is formed starting from the epitaxial region and a second electronic component based upon a heterostructure is formed starting from the heterostructure. To grow an epitaxial multilayer, a growth mask is formed on the substrate layer; an opening is made in the growth mask, thereby exposing the second portion of the substrate layer; and the epitaxial multilayer is grown on the second portion of the substrate layer.

Abstract: An electronic power device includes a substrate of silicon carbide (SiC) having a front surface and a rear surface which lie in a horizontal plane and are opposite to one another along a vertical axis. The substrate includes an active area, provided in which are a number of doped regions, and an edge area, which is not active, distinct from and surrounding the active area. A dielectric region is arranged above the front surface, in at least the edge area. A passivation layer is arranged above the front surface of the substrate, and is in contact with the dielectric region in the edge area. The passivation layer includes at least one anchorage region that extends through the thickness of the dielectric region at the edge area, such as to define a mechanical anchorage for the passivation layer.

Abstract: Content is generated for a programmable computing device based on user-selected configuration information. The user-selected configuration information includes a user-selected versatile component. User-selectable versatile component configuration options for the user-selected versatile component are presented and versatile component configuration option selections for the user-selected versatile component are received. Settings for an instance of the user-selected versatile component are generated based on the received component configuration option selections. A configuration store is generated or updated based on the settings for the user-selected versatile component. Content for the programmable computing device is generated based on the configuration store.

Abstract: A DC-DC converter includes a primary-side control-circuit having an oscillator driving a transformer in response to assertion of a PWM-signal to transmit power from the primary to the secondary and ceasing in response to deassertion of the PWM-signal, and a receiver demodulator circuit receiving/demodulating a feedback signal sent from the secondary to the primary by comparing an instantaneous value of an envelope indicative of voltages at the primary-coil to an average-value of the envelope to produce a reset-signal. A PWM circuit asserts the PWM-signal in response to a set-signal and deasserts the PWM-signal in response to assertion of the reset-signal. A secondary-side control-circuit rectifies the received power, asserts an intermediate feedback-signal if feedback indicative of the output voltage is greater than a reference-voltage, and connects a capacitance between the secondary and ground in response to assertion of the intermediate feedback-signal to modulate and send the feedback to the primary.

Abstract: The present disclosure is directed to input detection for electronic devices using electrostatic charge sensors. The devices and methods disclosed herein utilize electrostatic charge sensors to detect various touch gestures, such as long and short touches, single/double/triple taps, and swipes; and perform in-car detection.

Abstract: The present disclosure is directed to a device and method for lid angle detection that is accurate even if the device is activated in an upright position. While the device is in a sleep state, first and second sensor units measure acceleration and angular velocity, and calculate orientations of respective lid components based on the acceleration and angular velocity measurements. Upon the device exiting the sleep state, a processor estimates the lid angle using the calculated orientations, sets the estimated lid angle as an initial lid angle, and updates the initial lid angle using, for example, two accelerometers; two accelerometers and two gyroscopes; two accelerometers and two magnetometers; or two accelerometers, two gyroscopes, and two magnetometers.

Abstract: A device includes a memory and processing circuitry coupled to the memory. The processing circuitry, in operation: estimates an angular rate of change and determines a rotational versor based on the rotational data; and estimates a gravity vector based on the angular rate of change and the rotational versor. The processing circuitry generates a dynamic gravity vector based on the estimated gravity vector, a correction factor and an estimated error in estimated gravity vector. The processing circuitry estimates a linear acceleration and determines an acceleration versor based on the acceleration data, and determines the correction factor based on the linear acceleration. The processing circuitry estimates the error in the estimated gravity vector based on the acceleration versor.

Abstract: Provided is a coupler including a first assembly of an input unit element, an intermediate unit element, and an output unit element. Each unit element includes a first coil and a second coil arranged in a cross having a general “H” shape. A first input terminal and a second input terminal of the intermediate unit element are coupled to a first output terminal and to a second output terminal of the input unit element, a first output terminal and a second output terminal of the intermediate unit element are coupled to a first input terminal and to a second input terminal of the output unit element, and the input unit element is spatially positioned between the intermediate unit element and the output unit element.

Abstract: A semiconductor electronic device is formed in a die having a substrate of semiconductor material of a first conductivity type. The device has a first electronic component based on heterostructure, which has a body structure of semiconductor material that extending, in the die, on the substrate, and an epitaxial multilayer extending in contact with the body structure and having a heterostructure. The body structure of the first electronic component has a first doped region of semiconductor material that extends between the heterostructure and the substrate and has a second conductivity type different from the first conductivity type.

Abstract: A computer system is provided including a memory configured to store a computer program product, a processor configured to execute said computer program product, and a memory circuit. The computer program product includes at least one instruction to duplicate in the memory circuit a return address defined upon function call, and at least one instruction to compare a value of the return address stored in a call stack at the value of the return address duplicated in the memory circuit and to permit a function return branching only if these two values are identical.

Abstract: System, method, and circuitry for generating content for a programmable computing device based on user-selected configuration information. The user-selected configuration information includes code generation strategy selections. A configuration store is generated based on the user's selections, and includes a code generation strategy parameters file. The configuration store and the user selected configuration information is utilized to generate the content, such as code, data, parameters, settings, etc. When the content is provided to the programmable computing device, the content initializes, configures, or controls one or more software and hardware aspects of the programmable computing device.

Abstract: Two sets of the DC voltages are determined from among sets of DC voltages. At a first temperature, a first voltage of one of the two sets and a first voltage of the other one of the two sets surround a detection voltage that varies substantially proportionally to temperature. The detection voltage is compared with a second voltage of one of the two sets.