Abstract: SP recovery between communications of a source and destination apart from the PCP can occur by performing, prior to the initial frame response between a source and a destination, a back-off procedure using back-off parameters for SP recovery when the initiator of a SP cannot receive a responding frame from the destination and detects the communication medium being idle. In alternative embodiments the source and/or destination can send a notification frame to the PCP informing the PCP of transmission failure. When the PCP determines the communication medium to be idle, the PCP truncates and reallocates the remaining portion of the SP.

Abstract: An antialiasing method includes: providing a first fragment; computing a first coverage area representing a portion of the first fragment covered by a first primitive; providing a second fragment juxtaposed to the first fragment and at least partially covered by a second primitive; processing the first coverage area to obtain a corrected coverage area indicative of a visible first fragment portion resulting from the juxtaposition of the fragments; and applying an antialiasing procedure based on the corrected coverage area.

Abstract: A method for manufacturing a nanotube non-volatile memory cell is proposed. The method includes the steps of: forming a source electrode and a drain electrode, forming a nanotube implementing a conduction channel between the source electrode and the drain electrode, forming an insulated floating gate for storing electric charges by passivating conductive nanoparticles with passivation molecules and arranging a disposition of passivated conductive nanoparticles on the nanotube, the conductive nanoparticles being adapted to store the electric charges and being insulated by the passivation molecules from the nanotube, and forming a control gate coupled with the channel.

Abstract: A method manufactures semiconductor chips each comprising a component implanted in the semiconductor. The method includes collectively implanting components onto a front face of a semiconductor wafer and fixing the a plate of a transparent material onto the front face of the wafer. Fixing the plate of transparent material is preceded by a step of depositing, on the front face of the wafer, at least one layer of polymer material forming an optical filter. Application is particularly to the manufacturing of imagers.

Abstract: A method for testing the resistance of an algorithm using at least one secret quantity against attacks measuring physical effects of the execution of the algorithm by an integrated circuit, consisting of implementing statistical key search functions based on hypotheses about at least some bits thereof, by exploiting the input and output values of steps of the algorithm.

Abstract: A method of stabilizing an image sequence, said method comprising the following phases: estimating a first global motion vector comprising a first motion component in a predetermined direction that has associated with it a first respective amplitude and a first respective direction, said first vector being representative of the motion with respect to a reference image of a first image consisting of a pixel matrix, associating said first component with either a wanted motion or an unwanted motion, compensating said first component when it is associated with an unwanted motion, characterized in that the association phase comprises a phase of comparing the first amplitude of said component with a threshold compensation value T comp hor assigned to the predetermined direction, said first component being associated with an unwanted or wanted motion whenever the first amplitude is, respectively, smaller than said threshold value T comp hor or greater than/equal to it.

Abstract: An electronic component comprising several superimposed layers of materials including a TiCN barrier layer. A process for depositing a TiCN layer in order to obtain an electronic component, where a titanium precursor is chosen from among tetrakis(dimethylamido)titanium and/or tetrakis(diethylamido)titanium and is decomposed on a substrate by plasma-enhanced atomic layer deposition (PEALD) where the plasma is obtained with a hydrogen-rich gas which can contain nitrogen with at most 5 atomic % nitrogen and at least 95 atomic % hydrogen.

Abstract: An adaptive biasing technique improves fully differential gain boosted operational amplifiers transient characteristics and reduces power consumption. An adaptive biasing module includes a bias generation module and a bias replication module. The bias generation module generates a first control signal (VCMNB) and the first control signal is applied as an output common mode of a differential booster (inside the bias replication module). The bias replication module is coupled to the bias generation module for equalizing a common mode of the differential booster with the first control signal (VCMNB).

Abstract: A negative capacitances circuit includes first and second branches connected between a first reference voltage and a second reference voltage. The first branch includes, in series, a first biasing resistor, a first diode, a first bipolar transistor, and a first current source. The second branch includes, in series, a second biasing resistor, a second diode, a second bipolar transistor, and a second current source. The first transistor has a base coupled to a collector of the second transistor and to one input, and the second transistor has a base coupled to a collector of the first transistor and to another input. A capacitor is connected between the emitter of said first transistor and the emitter of said second transistor. A linearization resistor is coupled in parallel between the two emitters of said first and said second transistors.

Abstract: A method for the iterative decoding of a block of bits having a number N of bits to be decoded where N is a whole number greater than or equal to two, using an iterative decoding algorithm, comprises the generation of a current block of N intermediate decision bits by executing an iteration of the decoding algorithm, followed by the verification of a stability criterion for the current block by comparison of the current block with a given block of N reference bits. If the stability criterion is satisfied, the iterations of the iterative decoding algorithm are stopped and the current block of intermediate decision bits is delivered as a block of hard decision bits. Otherwise another iteration of the decoding algorithm is executed.

Abstract: A process manufactures a probe intended to interact with a storage medium of a probe-storage system, wherein a sacrificial layer is deposited on top of a substrate; a hole is formed in the sacrificial layer; a mold layer is deposited; the mold layer is etched via the technique for forming spacers so as to form a mold region delimiting an opening having an area decreasing towards the substrate. Then a stack of conductive layers is deposited on top of the sacrificial layer, the stack is etched so as to form a suspended structure, formed by a pair of supporting arms arranged to form a V, and an interaction tip projecting monolithically from the supporting arms. Then a stiffening structure is formed, of insulating material, and the suspended structure is fixed to a supporting wafer. The substrate, the sacrificial layer, and, last, the mold region are then removed.

Abstract: A method and system controls the power factor associated with a power supply line. The system includes a control circuit having a power factor control cell connected to the power supply line. The power factor control is performed by modulating the conduction time of a bipolar transistor in the control cell using the storage time of the bipolar transistor, and by regulating the modulation of the conduction time by feedback-driving a control terminal of the bipolar transistor.

Abstract: A method for forming a level of a tridimensional structure on a first support in which components are formed, including the steps of forming, on a second semiconductor support, a single-crystal semiconductor substrate with an interposed thermal oxide layer; placing the free surface of the single-crystal semiconductor substrate on the upper surface of the first support; eliminating the second semiconductor support; and thinning down the thermal oxide layer down to a thickness capable of forming a gate insulator.

Abstract: A method of generating electrical energy in an integrated circuit that may include setting into motion a (3D) three-dimensional enclosed space in the integrated circuit. The 3D enclosed space may include a piezoelectric element and a free moving object therein. The method may also include producing the electrical energy from impact between the free moving object and the piezoelectric element during the motion.

Abstract: The device generates a reference voltage, in particular designed for a system of the switched-capacitor type, based on a setpoint voltage. It includes a regulation loop having a first input to receive the setpoint voltage, and an output stage arranged as a voltage follower and looped to a second input of the loop. An additional stage is configured to deliver the reference voltage to the switched-capacitor system, this additional stage, coupled to the output stage, also being arranged as a voltage follower and paired with the output stage.

Abstract: A single-stage integrated circuit drives LED sources in a constant power mode to eliminate the need for LED current sensing, while reshaping the waveform of the inductor current near line zero crossing to achieve high power factor. The integrated circuit achieves substantially constant input power my maintaining a constant voltage at a power factor corrector controller through an input voltage feedforward system. Accordingly, the disclosed circuit provides a high power factor, high efficiency, simple, and cost-effective solution with substantially consistent input power for both isolated and non-isolated offline LED applications.

Abstract: An integrated circuit may include a region containing a thermoelectric material and be configured to be subjected to a temperature gradient resulting from a flow of an electric current in a part of the integrated circuit during its operation, and an electrically conducting output coupled to the region for delivering the electrical energy produced by thermoelectric material.

Abstract: A method tracks a plurality of touch points across successive frames of a touch sensitive input device to determine a trajectory. Each touch point on a frame of a touch sensitive input device is correlated with another distinct touch point on a subsequent frame of the same touch sensitive input device. The correlation is based on examining in the subsequent frame an area surrounding each touch point on the previous frame. Touch points identified within this search area are prioritized based on a projected trajectory through the prior touch point based on historical data.

Abstract: A back EMF signal from PWM driven motor is passed through an attenuation circuit. The attenuation circuit has a first mode of operation and a second mode of operation. The first mode of operation, used to sample a higher voltage back EMF signal during PWM on-time, applies the back EMF signal to a resistive divider formed of a first resistor and second resistor connected in series. The second mode of operation, used to sample a lower voltage back EMF signal during PWM off-time, applies the back EMF signal to a circuit comprised of a transistor conduction path in series with the second resistor. A control signal, responsive PWM on-time and off-time state, controls switching between the first and second modes.

Abstract: An interleaver is constructed based on the joint constraints imposed in the channel and the code domains. A sequentially optimal algorithm is used for mapping bits in the inter-symbol interference (ISI) domain to the code domain by taking into account the ISI memory depth and the connectivity of the nodes within the parity check matrix. Primary design constraints are considered such as the parallelism factor so that the proposed system is hardware compliant in meeting high throughput requirements.