Patents Assigned to STMicroelectronics
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Patent number: 8633521Abstract: A two terminal device which can be used for the rectification of the current. Internally it has a regenerative coupling between MOS gates of opposite type and probe regions. This regenerative coupling allows to achieve performance better than that of ideal diode.Type: GrantFiled: January 6, 2010Date of Patent: January 21, 2014Assignee: STMicroelectronics N.V.Inventors: Alexei Ankoudinov, Vladimir Rodov
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Patent number: 8633525Abstract: In capacitive sensor circuits where physical contact is required and excess pressure may be inadvertently applied to the sensor surface, aluminum is not sufficiently hard to provide “scratch” protection and may delaminate, causing circuit failure, even if passivation integrity remains intact. Because hard passivation layers alone provide insufficient scratch resistance, at least the capacitive electrodes and preferably all metallization levels within the sensor circuit in the region of the capacitive electrodes between the surface and the active regions of the substrate are formed of a conductive material having a hardness greater than that of aluminum, and at least as great as the lowest hardness for any interlevel dielectric or passivation material employed.Type: GrantFiled: September 14, 2011Date of Patent: January 21, 2014Assignee: STMicroelectronics, Inc.Inventor: Danielle A. Thomas
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Patent number: 8633553Abstract: A process for manufacturing a micromechanical structure envisages: forming a buried cavity within a body of semiconductor material, separated from a top surface of the body by a first surface layer; and forming an access duct for fluid communication between the buried cavity and an external environment. The method envisages: forming an etching mask on the top surface at a first access area; forming a second surface layer on the top surface and on the etching mask; carrying out an etch such as to remove, in a position corresponding to the first access area, a portion of the second surface layer, and an underlying portion of the first surface layer not covered by the etching mask until the buried cavity is reached, thus forming both the first access duct and a filter element, set between the first access duct and the same buried cavity.Type: GrantFiled: July 25, 2011Date of Patent: January 21, 2014Assignee: STMicroelectronics S.r.l.Inventors: Marco Ferrera, Matteo Perletti, Igor Varisco, Luca Zanotti
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Patent number: 8633852Abstract: A first position of a satellite is calculated at a first time in dependence on received orbit data corresponding to an orbit path of the satellite. Anan orbit path of the satellite is modeled from the first position at the first time to a second time to determine a second position of the satellite at the second time. A third position of the satellite is then calculated at the second time in dependence on the received orbit data. The second position and third position are compared to determine a validity of the orbit data.Type: GrantFiled: September 20, 2011Date of Patent: January 21, 2014Assignee: STMicroelectronics (Research & Development) LimitedInventor: Peter Bagnall
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Patent number: 8635355Abstract: Content that is delivered nearly on-demand, in overlapping streams that start in staggered intervals on different channels, is played on-demand for the user using a storage system in conjunction with the receiver. A portion of the content corresponding to the staggering interval of the various streams is pre-cached and employed for playback when the user initiates on-demand playback. Content from the most-recently-started stream at the time of playback initiation is then buffered, and playback switches from the pre-cached content to the buffered content at a preselected alignment point.Type: GrantFiled: May 1, 2002Date of Patent: January 21, 2014Assignee: STMicroelectronics, Inc.Inventors: Michael Robert Harris, Ren Egawa
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Patent number: 8633583Abstract: A semiconductor package substrate suitable for supporting a damage-sensitive device and a package substrate core having an upper and a lower surface. At least one pair of metal layers coats the upper and lower surfaces of the package substrate core. One pair of solder mask layers coats the outer metal layers of the at least one pair of metal layers. A plurality of vias is formed across the package substrate core and the at least one pair of metal layers. Advantageously, the plurality of vias is substantially distributed according to a homogeneous pattern in an area that is to be covered by the damage-sensitive device. A method for the production of such semiconductor package substrate is also described.Type: GrantFiled: July 16, 2007Date of Patent: January 21, 2014Assignees: STMicroelectrics S.r.l., STMicroelectronics (Malta) Ltd.Inventors: Federico Giovanni Ziglioli, Giovanni Graziosi, Mark Andrew Shaw, Mario Francesco Cortese, Conrad Max Cachia
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Patent number: 8633688Abstract: The integrated magnetic sensor for detecting an external magnetic field, is formed by a body of semiconductor material having a surface; an insulating layer covering the body of semiconductor material; a magnetically sensitive region, for example a Hall cell, extending inside the body; and a concentrator of ferromagnetic material, extending on the Hall cell and having a planar portion extending parallel to the surface of the substrate on the insulating layer. The concentrator terminates with a tip protruding peripherally from, and transversely to, the planar portion toward the Hall cell. When the magnetically sensitive region is a sensing coil of a fluxgate sensor, it is formed on the substrate, embedded in the insulating layer, and the tip of the concentrator can reach as far as the sensing coil.Type: GrantFiled: November 30, 2010Date of Patent: January 21, 2014Assignee: STMicroelectronics S.r.l.Inventors: Dario Paci, Paolo Iuliano, Caterina Riva, Marco Morelli
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Patent number: 8635259Abstract: A barrel shifter receiving N symbols, arranged n2 distinct groups of n1 symbols, applying a circular shift to the N symbols. The barrel shifter comprises n2 first barrel shifters, each applying a first circular shift to one of the groups of n1 symbols; a rearrangement module receiving the N symbols provided by the first barrel shifters and providing N symbols arranged, in a determined manner, in n1 distinct groups of n2 symbols; n1 second barrel shifters, each applying a second circular shift to one of the distinct groups of n2 symbols; a control module providing, to each first barrel shifter, an identical signal bs_ctrl1 representing the first shift, and providing, to each second barrel shifter, an identical signal bs_ctrl2 representing the second shift; and a switching module switching at least two of the symbols of the N symbols.Type: GrantFiled: May 11, 2010Date of Patent: January 21, 2014Assignee: STMicroelectronics S.A.Inventors: Laurent Paumier, Pascal Urard
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Patent number: 8635460Abstract: A method and a circuit for masking a digital word by application of a random bijection, including applying at least one first operation including selecting a non-disjoint subset of the word having its position and size depending on a first random quantity, and assigning to each bit of the subset, the state of the bit having a symmetrical position with respect to the middle of the subset, to obtain a masked digital quantity.Type: GrantFiled: December 14, 2005Date of Patent: January 21, 2014Assignee: STMicroelectronics S.A.Inventors: Pierre-Yvan Liardet, Yannick Teglia
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Patent number: 8634578Abstract: A multiband dynamics compressor implements a solution for minimizing unwanted changes to the long-term frequency response. The solution essentially proposes undoing the multiband compression in a controlled manner using much slower smoothing times. In this regard, the compensation provided acts more like an equalizer than a compressor. What is applied is a very slowly time-varying, frequency-dependent post-gain (make-up gain) that attempts to restore the smoothed long-term level of each compressor band.Type: GrantFiled: June 23, 2010Date of Patent: January 21, 2014Assignee: STMicroelectronics, Inc.Inventor: Earl C. Vickers
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Publication number: 20140015577Abstract: A system and method for providing a phase-locked loop that reduces the effects of jitter caused by thermal noise of a resistor in a low-pass filter in the PLL. Thermal noise from various electronic components may cause unwanted jitter is a PLL. The size of various components in the filter are typically set to specific sizes to realize a transfer function suited for loop stability and reduction in phase jitter. In one embodiment, the jitter due to thermal noise in the resistor may be reduced by reducing the size of the gain affecting the signal through this resistor. By adjusting the size of the resistor by a scaling factor as well as other components in the PLL, one may then control a voltage controlled oscillator (VCO) using two or more control signals through the LPF.Type: ApplicationFiled: July 12, 2012Publication date: January 16, 2014Applicant: STMICROELECTRONICS PVT. LTD.Inventors: Anand KUMAR, Pradeep DHADDA
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Publication number: 20140015699Abstract: In one embodiment, a method for converting an analog input value to a digital output value is disclosed. A successive approximation is performed. The analog input is quantized to a first quantized value, which is converted to a first analog value using a DAC. The first analog value is subtracted from the analog input value to form a first residue. The first residue is quantized to form a second quantized value, and a second residue is formed by converting the second quantized value to a second analog value using the DAC and subtracting the second analog value from the first residue value. The second residue is then quantized to form a third quantized value. The first, second and third quantized values are converted into a digital output value. The first, second and third quantized values each have at least three levels.Type: ApplicationFiled: September 16, 2013Publication date: January 16, 2014Applicant: STMicroelectronics R&D (Shanghai) Co. Ltd.Inventors: Jian Hua Zhao, Yuxing Zhang
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Publication number: 20140015002Abstract: A MOS transistor protected against overvoltages formed in an SOI-type semiconductor layer arranged on an insulating layer itself arranged on a semiconductor substrate including a lateral field-effect control thyristor formed in the substrate at least partly under the MOS transistor, a field-effect turn-on region of the thyristor extending under at least a portion of a main electrode of the MOS transistor and being separated there-from by said insulating layer, the anode and the cathode of the thyristor being respectively connected to the drain and to the source of the MOS transistor, whereby the thyristor turns on in case of a positive overvoltage between the drain and the source of the MOS transistor.Type: ApplicationFiled: June 19, 2013Publication date: January 16, 2014Applicant: STMicroelectronics SAInventor: Pascal FONTENEAU
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Publication number: 20140015071Abstract: An encapsulated micro-electro-mechanical device, wherein a MEMS chip is encapsulated by a package formed by a first, a second, and a third substrates that are bonded together. The first substrate has a main surface bearing the MEMS chip, the second substrate is bonded to the first substrate and defines a chamber surrounding the MEMS chip, and the third substrate is bonded to the second substrate and upwardly closes the chamber. A grid or mesh structure of electrically conductive material is formed in or on the third substrate and overlies the MEMS chip; the second substrate has a conductive connection structure coating the walls of the chamber, and the first substrate incorporates an electrically conductive region, which forms, together with the conductive layer and the grid or mesh structure, a Faraday cage.Type: ApplicationFiled: September 17, 2013Publication date: January 16, 2014Applicant: STMicroelectronics S.r.l.Inventors: Mark Andrew Shaw, Gianmarco Antonio Camillo
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Patent number: 8630338Abstract: A motion estimation method and device are provided for processing images to be inserted, between a preceding original image and a following original image, into a sequence of images. Each image is divided into pixel blocks associated with motion vectors. For a current block of an image being processed, motion vectors associated with blocks of the image being processed and/or associated with blocks of a processed image are selected. Candidate vectors are generated from selected motion vectors. An error is calculated for each candidate vector. A penalty is determined for a subset of candidate vectors on the basis of the values of the pixels of the pixel block in the preceding original image from which the candidate motion vector points to the current block and/or on the basis of the values of the pixels of the pixel block in the following original image to which the candidate motion vector points from the current block.Type: GrantFiled: August 9, 2011Date of Patent: January 14, 2014Assignee: STMicroelectronics S.A.Inventor: Marina Nicolas
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Patent number: 8631184Abstract: Transactions of the request/response type between a first circuit module and a second circuit module operating with incompatible protocols or interfaces envisage organizing a queue of memory locations for storing transaction information items and transaction identifiers associated to said transactions and implementing the transactions via operations of reading/writing of the locations in the queue, mapping on the transaction identifiers information for management of the queue.Type: GrantFiled: May 20, 2011Date of Patent: January 14, 2014Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics S.r.l.Inventors: Daniele Mangano, Ignazio Antonio Urzi′
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Patent number: 8630073Abstract: An integrated circuit protected against electrostatic discharges, having output pads coupled to amplification stages, each stage including, between first and second power supply rails, a P-channel MOS power transistor in series with an N-channel MOS power transistor, this integrated circuit further including protection circuitry for simultaneously turning on the two transistors when a positive overvoltage occurs between the first and second power supply rails.Type: GrantFiled: March 15, 2013Date of Patent: January 14, 2014Assignee: STMicroelectronics (Rousset) SASInventor: François Tailliet
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Patent number: 8629713Abstract: A voltage regulator bypass circuit to control bypass of a voltage regulator of an integrated circuit device, the voltage regulator bypass circuit including a first voltage detector, a second voltage detector, and circuit. The first voltage detector to detect that a core circuitry voltage level is above a first threshold and to assert a first detect signal at an output in response to the detection. The second voltage detector to detect that an unregulated supply voltage is above a second threshold and to assert a second detect signal at an output in response to the detection. The circuit having a first input coupled to the output of the first voltage detector and a second input coupled to the output of the second voltage detector, the circuit to bypass the voltage regulator in response the output of the latch being cleared.Type: GrantFiled: May 29, 2012Date of Patent: January 14, 2014Assignees: Freescale Semiconductor, Inc., STMicroelectronics SRL, STMicroelectronics Private Ltd.Inventors: Stefano Pietri, Chris C. Dao, Juxiang Ren, Nicolas Grosssier, V Srinivasan
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Patent number: 8630337Abstract: A method for demodulating a modulated signal, by: receiving a signal modulated in n-PSK or n-APSK comprising a succession of symbols organized in frames, each frame comprising a header followed by blocks of data symbols separated by blocks of pilot symbols, determining the phase of the headers and pilot blocks to predict the evolution of the signal phase, correcting the phase of the data symbols according to the evolution of the signal phase, and equalizing the data symbols corrected in phase using equalization coefficients evaluated thanks to estimated or known symbols of the signal, and pre-equalizing the header, pilot and data symbols, which is performed before determining the phase of the headers and pilot blocks, and using the estimated equalization coefficients to equalize the data symbols.Type: GrantFiled: May 25, 2010Date of Patent: January 14, 2014Assignee: STMicroelectronics (Grenoble 2) SASInventor: Jacques Meyer
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Patent number: 8629720Abstract: The disclosure relates to a driving method for obtaining a linear gain variation of a transconductance amplifier that includes a first differential transistor cell, with adjustment of a driving voltage value of a degenerative driving transistor of the transconductance amplifier The method includes generating an output current signal of a second differential cell corresponding to the first differential transistor cell of the transconductance amplifier, the output current signal having a linear relationship with a transconductance value of the second differential cell as the driving voltage varies; generating a reference current signal having a linear relationship with a differential input voltage; comparing the output current signal and the reference current signal for adjusting the driving voltage value; and modifying the transconductance value of the second differential cell up to a balance of the current signals.Type: GrantFiled: May 29, 2012Date of Patent: January 14, 2014Assignee: STMicroelectronics S.r.l.Inventors: Matteo Albertini, Daniele Ronchi, Sandro Rossi, Giulio Ricotti