Abstract: A low side driver includes a first transistor coupled in series with a second transistor at a low side voltage node for a load. A capacitance is configured to store a voltage and a voltage buffer circuit has an input coupled to receive the voltage stored by the capacitance and an output coupled to drive a control node of the second transistor with the stored voltage. A current source supplies current through a switch to the capacitance and the input of the voltage buffer circuit. The switch is configured to be actuated by an oscillating enable signal so as to cyclically source current from the current source to the capacitance and cause a stepped increase in the stored voltage which is applied by the buffer circuit to the control node of the second transistor.

Abstract: A multiplier of a binary number A by a binary number B may be configured to add each term AiBj with a left shift by i+j bits, where Ai is the bit of weight i of number A, and Bj the bit of weight j of number B. The multiplier may include a first counter associated with the number A and may count modulo n and be paced by a clock. The multiplier may include a second counter associated with the number B and paced by the clock. Switching circuitry may produce the terms AiBj by taking the content of the first and second counters respectively as weights i and j. Shifting circuitry is configured to shift the content of one of the first and second counters when the other counter has achieved a revolution.

Abstract: A row decoder circuit for a phase change non-volatile memory device may include memory cells arranged in a wordlines. The device may be configured to receive a first supply voltage and a second supply voltage higher than the first supply voltage. The row decoder may include a global predecoding stage configured to receive address signals and generate high-voltage decoded address signals in a range of the second supply voltage and a biasing signal with a value based upon an operation. The row decoder may include a row decoder stage coupled to the global predecoding stage. The row decoder stage may include a selection driving unit configured to generate block-address signals based upon the high-voltage decoded address signals and a row-driving unit configured to generate a row-driving signal for biasing the wordlines based upon the block-address signals and the biasing signal.

Abstract: An integrated magnetoresistive device, where a substrate of semiconductor material is covered, on a first surface, by an insulating layer. A magnetoresistor of ferromagnetic material extends in the insulating layer and defines a sensitivity plane of the sensor. A concentrator of ferromagnetic material including at least one arm, extending in a transversal direction to the sensitivity plane and vertically offset to the magnetoresistor. In this way, magnetic flux lines directed perpendicularly to the sensitivity plane are concentrated and deflected so as to generate magnetic-field components directed in a parallel direction to the sensitivity plane.

Abstract: A circuit for detecting a time skew, including: at least two comparators; a first set of paths respectively connecting a first source of a first signal to said comparators; and a second set of paths respectively connecting a second source of a second signal to said comparators, each comparator detecting a possible skew between said first and second signals.

Abstract: The present disclosure relates to an image display system, including a television having a screen, a sound projector, a control unit in signal communication with said screen and said sound projector, said control unit being configured for said sound projector to project one or more audible beams in a room towards one or more target paths. The system includes an optical instrument having a frame and a pair of lenses, detection means and transmission means, said detection means being designed to receive at their input an audio signal having a frequency falling in a 20-20 kHz frequency band and to output a processed signal, said transmission means being designed to receive at their input said processed signal, and to output a calibration signal. The control unit calibrates said sound projector according to said calibration signal generated by said optical instrument.

Abstract: Switches that are actuated through exposure to a magnetic field are described. A mobile element of a switch includes one or more anchoring members that are in electrical contact with one of the conductive portions. The mobile element also has a beam that is attached to the one or more anchoring members. The beam can be attached to the one or more anchoring members by flexures. The beam has an end portion that is configured to move toward the other conductive portion when exposed to an external force, such as a magnetic field. Various configurations of anchoring members may significantly decrease initial upward beam deformation upon manufacture of the mobile element, resulting in an increased sensitivity upon exposure to a magnetic field. Methods for manufacturing switches that exhibit increased sensitivity to magnetic fields are also disclosed.

Abstract: An embodiment of a process for manufacturing an electronic device on a semiconductor body of a material with wide forbidden bandgap having a first conductivity type.

Abstract: A method for forming an integrated lithium-ion type battery, including the successive steps of: forming, on a substrate, a stack of a cathode layer made of a material capable of receiving lithium ions, an electrolyte layer, and an anode layer of the battery; forming a short-circuit between the anode and cathode layers; performing a thermal evaporation of lithium; and opening the short-circuit between the anode and cathode layers.

Abstract: An embodiment of a charge-balance power device formed in an epitaxial layer having a first conductivity type and housing at least two columns of a second conductivity type, which extend through the epitaxial layer. A first and a second surface region of the second conductivity type extend along the surface of the epitaxial layer on top of, and in contact with, a respective one of the columns, and a second and a third surface region of the first conductivity type extends within the first and the second surface region, respectively, facing the surface of the epitaxial layer. The columns extend at a distance from each other and are arranged staggered to one another with respect to a first direction and partially facing one another with respect to a second direction transversal to the first direction.

Abstract: A semiconductor device includes a substrate. On at least one face of that substrate, integrated circuits are formed. At least one electromagnetic waveguide is also included, that waveguide including two metal plates that are placed on either side of at least one part of the thickness of the substrate and are located facing each other. Two longitudinal walls are placed facing each other and are formed by metal vias made in holes passing through the substrate in its thickness direction. The metal vias electrically connect the two metal plates.

Abstract: A method for protecting the execution of a ciphering or deciphering algorithm against the introduction of a disturbance in a step implementing one or several first values obtained from second values supposed to be invariant and stored in a non-volatile memory in which, during an execution of the algorithm: a current signature of the first values is calculated; this current signature is combined with a reference signature previously stored in a non-volatile memory; and the result of this combination is taken into account at least in the step of the algorithm implementing said first values.

Abstract: A receiver is enabled to perform self-configuration of the main data link to receive and display video data. A video data signal is received through a data link having multiple channels or lanes at a specific bit rate. No link configuration data normally associated with the video signal is received. It is then determined which one or more of the channels of the data link are active in transmitting the data signal. A symbol pattern in the data signal is then identified. The symbol rate of the data signal is then synchronized with the local clock frequency. The local clock frequency is set to correspond to the actual bit rate of the data signal, thereby creating a signal-based clock frequency. This local clock frequency is set using only the data signal since no link configuration data associated with the signal is received. In this manner, the receiver configures or trains the link itself using only the video data signal and therefore, the receiver may be described as self-sufficient.

Abstract: A method and a circuit for ciphering or deciphering data with a key by using at least one variable stored in a storage element and updated by the successive operations, the variable being masked by at least one first random mask applied before use of the key, then unmasked by at least one second mask applied after use of the key, at least one of the masks being dividable into several portions successively applied to the variable and which, when combined, represent the other mask.

Abstract: A mobile telecommunication device including at least one telecommunication circuit; at least one subscriber identification module; at least one assembly including at least one supply battery; and a switch of selection between a power supply of the subscriber identification module by the assembly and by the telecommunication circuit according to the presence or not of a near-field communication module in the assembly.

Abstract: A passive cable adaptor for connecting a data source device with a display device is described. The adaptor has a packet-based interface connector at one end, the connector having a positive main link pin, a negative main link pin, a positive auxiliary channel pin, and a negative auxiliary channel pin. Also at the same end is a serial interface connector, such as a serial interface connector. At the other end is an upgraded serial interface connector (e.g., enhanced serial interface) connector having high-speed transmission pins, high-speed receiving pins, and a ground pin, wherein multimedia content is transmitted over the cable adaptor and electrical power is supplied over the cable adaptor simultaneously.

Abstract: Embodiments of a processor architecture utilizing multi-bank implementation of physical register mapping table are provided. A register renaming system to correlate architectural registers to physical registers includes a physical register mapping table and a renaming logic. The physical register mapping table has a plurality of entries each indicative of a state of a respective physical register. The mapping table has a plurality of non-overlapping sections each of which having respective entries of the mapping table. The renaming logic is coupled to search a number of the sections of the mapping table in parallel to identify entries that indicate the respective physical registers have a first state. The renaming logic selectively correlates each of a plurality of architectural registers to a respective physical register identified as being in the first state. Methods of utilizing the multi-bank implementation of physical register mapping table are also provided.

Abstract: Described herein is a preamplifier circuit for a capacitive acoustic transducer provided with a MEMS detection structure that generates a capacitive variation as a function of an acoustic signal to be detected, starting from a capacitance at rest; the preamplifier circuit is provided with an amplification stage that generates a differential output signal correlated to the capacitive variation. In particular, the amplification stage is an input stage of the preamplifier circuit and has a fully differential amplifier having a first differential input (INP) directly connected to the MEMS detection structure and a second differential input (INN) connected to a reference capacitive element, which has a value of capacitance equal to the capacitance at rest of the MEMS detection structure and fixed with respect to the acoustic signal to be detected; the fully differential amplifier amplifies the capacitive variation and generates the differential output signal.

Abstract: An inductive element formed of planar windings in different conductive levels, the windings being formed in a number of levels smaller by one unit than the number of windings, two of the windings being interdigited in a same level.

Abstract: A multiplying digital-to-analog converter suited to maintain impedance balancing during phases. In an embodiment, an input signal may be sampled onto nodes of impedance elements during an initial phase. In a second phase the impedance elements are directly coupled either to a non-inverting reference input or the inverting reference input of an amplifier depending on an output of a related flash ADC output. The determination as to which capacitor is to be coupled to inverting or non-inverting input nodes may be directly programmed into the MDAC using switches, such that a thermometric to binary converter is not required in an example embodiment. Thus, the number of impedance elements coupled to the non-inverting reference input or inverting reference input REFM remains constant in each cycle such that there is no need to settle the non-inverting reference input or inverting reference input to full accuracy.