Patents Assigned to Sun Microsystems
  • Patent number: 5339406
    Abstract: A relocatable segment list builder, a system image dump driver, and a system image dump saver are provided to a dynamically configurable operating system being executed on a computer system. The operating system includes a root executable segment and a number of pageable relocatable segments that are loaded on an as needed basis. The relocatable segment list builder maintains in memory a non-pageable relocatable segment list, which comprises names of the relocatable segments that are loaded in any particular point in time. The system image dump driver dumps an image of the operating system including the non-pageable relocatable segment list to a dump device at the time of a system crash. In addition, a system image saver is provided to the computer system. The system image saver builds a system image dump file, which comprises the relocatable segment list dumped using the operating system image dumped.
    Type: Grant
    Filed: April 3, 1992
    Date of Patent: August 16, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael W. Carney, Timothy Marsland, William F. Pittore
  • Patent number: 5339443
    Abstract: In a multiprocessor computer system, an access request and an access grant register is provided for storing an access request and an access grant semaphore for each shared resource. The access request and grant semaphores having a number of access request and grant bits assigned to the processors. Additionally, circuits are provided for each access request register for setting/clearing individual access request bits, and simultaneous reading of all access request bits of the stored access request semaphore. Furthermore, coordinated request and grant masks that reflect the relative access priorities of the processors are provided for the processors to use in conjunction with the current settings of the access request and grant semaphores to determine whether a shared resource is granted to a lower priority processor and whether a shared resource is being requested by a higher priority processor.
    Type: Grant
    Filed: December 17, 1992
    Date of Patent: August 16, 1994
    Assignee: Sun Microsystems, Inc.
    Inventor: James M. Lockwood
  • Patent number: 5337233
    Abstract: An apparatus and method for converting a non-English language document text or search and retrieval argument into a form which can be processed by an existing ASCII based automated text processing system, even though the non-English language may have thousands of characters in it, thereby allowing the use of existing text processing systems and existing text data bases without the need to convert these text processing systems to handle multi-byte character languages.
    Type: Grant
    Filed: April 13, 1992
    Date of Patent: August 9, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: David K. Hofert, Yutaka Yoshida
  • Patent number: 5334998
    Abstract: In a computer system having a frame buffer, apparatus for providing an overlay for the frame buffer, and a digital-to-analog converter for furnishing analog signals from the frame buffer to a pedestal setup display monitor, the digital-to-analog converter including apparatus for furnishing a blank level substantially below the lowest level of the analog signal desired to be visible on the monitor during retrace periods when used with a pedestal setup display monitor, the improvement including apparatus for allowing the system to utilize zero setup display monitors including apparatus for disabling the apparatus for furnishing a blank level when the computer system is used with a zero setup display monitor, and apparatus for causing the apparatus for providing an overlay for the frame buffer to furnish signals indicating a black level during retrace periods when the computer system is used with a zero setup display monitor.
    Type: Grant
    Filed: July 5, 1991
    Date of Patent: August 2, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Curtis Priem, Charles Boynton
  • Patent number: 5335347
    Abstract: A method and apparatus for scoped interprocess message switching between a sender process and a plurality of receiver processes is disclosed. Messages supported may be scoped to message scopes of a message scope type of "Session" or one of a plurality of non-session message scope types including a message scope type of "File". Messages may also be scoped to message scopes of an intersection or union of message scope types. Intersection and union of message scope types comprise "File in Session" and "File or Session". Scoped messages supported further comprise request and notice messages. Receiver processes supported comprise handler processes and observer processes. Request messages may be observed as well as handled, and notice messages may be handled as well as observed. Handler and observer processes may be non-executing as well as executing. Local receiver processes are selected for session scoped messages. Remote as well as local receiver processes are selected for non-session scoped messages.
    Type: Grant
    Filed: January 23, 1991
    Date of Patent: August 2, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Carolyn L. Foss, Dwight F. Hare, Richard F. McAllister, Tin A. Nguyen, Amy Pearl, Sami Shalo
  • Patent number: 5329993
    Abstract: An integral heat pipe, heat exchanger, and clamping plate. A base plate functioning as an evaporator has disposed in it a multiplicity of intersecting parallel and perpendicular internal channels extending laterally substantially across the base plate. A sintered copper thermal wick is applied to all channels. Thin-walled condenser tubes forming a condenser region are joined to the base plate at intersections of width wise and cross wise channels contained in the base plate. A multiplicity of fins extend to all condenser tubes. For heat pipe arrangements operating in horizontal configurations, all wick-lined channels within the base plate remain open. For heat pipe arrangements intended to operate in oblique or vertical configurations, horizontally extending channels vertically displaced relative to other horizontal channels are isolated from the latter by a multiplicity of plugs.
    Type: Grant
    Filed: January 13, 1993
    Date of Patent: July 19, 1994
    Assignee: Sun Microsystems, Inc.
    Inventor: Ehsan Ettehadieh
  • Patent number: 5329627
    Abstract: A method and apparatus for selecting an entry to be replaced in a translation lookaside buffer in a computer system. The translation lookaside buffer stores a plurality of entries of virtual-to-physical address translations with each entry having a used bit and a valid bit.
    Type: Grant
    Filed: April 17, 1992
    Date of Patent: July 12, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Sunil Nanda, Norman M. Hayes
  • Patent number: 5325362
    Abstract: The present invention provides an improved method and apparatus for internetwork communication between fixed host and mobile host data processing devices. A home network includes at least one mobility support border router (MSBR) coupled between the home network and a OSPF backbone network. A new area network also includes at least one MSBR coupled between the new area and the OSPF backbone network. A third network, referred to as an "other area" network includes an MSBR coupled between the other area network and the OSPF backbone. A mobile host (MH) data processing device may move between the three networks and continue to communicate with all other fixed and mobile data processing devices coupled to the networks. In one embodiment, a first data processing (DP) device coupled to the home network may send a data packet to a MH data processing device which is normally associated with the home network, but has moved to, for example, the new area network.
    Type: Grant
    Filed: September 29, 1993
    Date of Patent: June 28, 1994
    Assignee: Sun Microsystems, Inc.
    Inventor: Ashar Aziz
  • Patent number: 5325375
    Abstract: The method and apparatus provides a parity bit for every m multiples of b bits, a group of b bits being the smallest number of bits that can be manipulated by the CPU. The parity bit is computed for the entire m x b bits during a write operation, even if only a subset of the m multiples of b bits is being stored. The write operation is implemented as a read-modify-write operation of the entire m x b bits, with parity error reporting suppressed for the read portion of the operation. However, the parity bit is set factoring in whether a parity error is detected during the read portion of the operation. The parity bit for the entire m x b bits is checked during a read operation, even if only a subset of the m multiples of b bits is needed. Any detected parity error is reported to the CPU. As a result, hardware cost is substantially reduced with minimal degradation to data integrity. Furthermore, the method and apparatus is completely transparent to the CPU and the operating system.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: June 28, 1994
    Assignee: Sun Microsystems, Inc.
    Inventor: Thomas E. Westberg
  • Patent number: 5320098
    Abstract: An optical transdermal link. The interface consists of two modules. An internal module is placed just inside the skin, and an external module is placed just outside the skin and facing the internal module. The external module is connected to a host processor via high speed serial lines. The external module contains one or two laser diodes with drivers, and one photodetector with preamplifier. The internal module contains a photocell array to provide power for itself, a photo detector, preamplifier and a clock recovery circuit for detecting the incoming signal, and a laser diode and driver for the outgoing signal. The internal module also contains modulation/demodulation and neural interface circuits peculiar to the specific application.
    Type: Grant
    Filed: October 20, 1992
    Date of Patent: June 14, 1994
    Assignee: Sun Microsystems, Inc.
    Inventor: Howard L. Davidson
  • Patent number: 5319358
    Abstract: A method and apparatus for minimizing the visual degradation of a typeface wherein the need for the manual input of skilled technicians is eliminated and the important visual components of each character and the relationship of the visual components of each character with the other characters of the typeface are preserved. The characters are analyzed to determine the visual components in the horizontal and vertical direction which comprise each character and the priority of adjustment. Using the visual components determined, starting with the highest priority component, the coordinates describing each character are adjusted according to rules which are dependent upon whether the strokes formed are oriented in the horizontal or vertical direction. The adjustment of the lower priority visual components is dependent on the previously aligned components.
    Type: Grant
    Filed: March 11, 1992
    Date of Patent: June 7, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Eduardo Martinez, May Kao
  • Patent number: 5313646
    Abstract: In a computer system having a hierarchical file structure, a file system is provided which permits users of the system to share a file hierarchy and also have a private hierarchy in which files are automatically copied to as they are modified. Through the system of the present invention, a directory appears to the user as a single directory but may actually comprise files originating from a number of directories which are connected to one another through search links. Each directory has a search link associated with it which contains the path name of the back layer or directory behind it. The first layer seen through the system of the present invention is the front layer, private to the user. The back layers behind the front layer and connected to the front layer through the search links are shared layers accessible to multiple users. Thus transparent to the user of the directory accessible comprises multiple layers comprising shared and private files.
    Type: Grant
    Filed: June 10, 1991
    Date of Patent: May 17, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: David Hendricks, Evan Adams, Tom Lyon, Terrence C. Miller
  • Patent number: 5307286
    Abstract: A computer integrated circuit arrangement including flip-flop circuits, buffers, and combinatorial circuit elements in which the flip-flop circuits are arranged in rows with buffers which may be connected to drive signals to those flip-flop circuits, the flip-flop circuits having conductors designed to carry global signals arranged to traverse the width of the flip-flop circuits and provide input and output terminals to match input and output terminals of adjacent flip-flop circuits.
    Type: Grant
    Filed: December 10, 1992
    Date of Patent: April 26, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Stefan Rusu, Joseph S. Yang
  • Patent number: 5304989
    Abstract: A method and apparatus for minimizing the visual degradation of a typeface wherein the need for the manual input of skilled technicians is eliminated and the important visual components of each character and the relationship of the visual components of each character with the other characters of the typeface are preserved. The characters are analyzed to determine the visual components in the horizontal and vertical direction which comprise each character and the priority of adjustment. Using the visual components determined, starting with the highest priority component, the coordinates describing each character are adjusted according to rules which are dependent upon whether the strokes formed are oriented in the horizontal or vertical direction. The adjustment of the lower priority visual components is dependent on the previously aligned components.
    Type: Grant
    Filed: March 5, 1992
    Date of Patent: April 19, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Eduardo Martinez, May Kao
  • Patent number: 5305377
    Abstract: An interface for translating signals from a ISDN terminal to an analog telephone terminal including apparatus for separating ISDN signals into control and data signals, apparatus for utilizing the control signals to generate tone signals for transfer to a telephone line, apparatus for translating the digital control signals into signals controlling the transfer of data from digital to analog form, apparatus for translating digital signals in ISDN format into analog signals under control of the apparatus for translating the digital control signals into signals controlling the transfer of data from digital to analog form, apparatus for translating control signals in analog tone format to digital signals for controlling the transfer of signals to an ISDN terminal, apparatus for using the control signals for controlling the transfer of data from analog to digital form, and apparatus for translating analog signals into digital signals in ISDN format under control of the digital signals for controlling the transfer
    Type: Grant
    Filed: March 29, 1991
    Date of Patent: April 19, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Paul D'Arcy, Robert Sloan, David Evans
  • Patent number: 5305380
    Abstract: A device for preventing unauthorized access to female modular telephone jacks. A physical plug has been designed such that when it is inserted into an RJ-11, RJ-14, or RJ-45 modular telephone jack, it locks into place and cannot be removed without the use of a specialized tool. The specialized tool then acts as a key to unlock the plug. Several different pairs of plugs and corresponding tools have been created such that there are different `locks` and `keys`.
    Type: Grant
    Filed: May 20, 1992
    Date of Patent: April 19, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Vincent Hileman, Clifford Willis, David Evans, Benjamin Stolz
  • Patent number: 5305444
    Abstract: A translation lookaside buffer for caching virtual addresses from a plurality of sources along with the associated physical addresses which physical addresses must be rapidly accessable and in which virtual addresses may appear simultaneously from two of the sources requiring translation into physical addresses, including a primary cache for storing a plurality of individual virtual addresses and associated physical addresses from all of the plurality of sources, apparatus for storing a single virtual address and its associated physical address from one of the plurality of sources which occurs most often each time a virtual address and an associated physical address from that one of the plurality of sources is referenced in the primary cache, and apparatus for ascertaining whether the virtual address held in the apparatus for storing a single virtual address and an associated physical address is a virtual address sought when an attempt is made to access the primary cache for a virtual address from the one of
    Type: Grant
    Filed: December 21, 1990
    Date of Patent: April 19, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Robert Becker, Peter Mehring
  • Patent number: 5303392
    Abstract: In a computer system executing a dynamically configurable operating system, a symbol definition image file builder is provided for building a symbol definition image file real time for utilities and application programs. The symbol definition image file is built upon receipt of an open request for the file and a current system definition image file does not exist. The symbol definition image file is deleted upon receipt of a close request for the file and it is determined that the file is no longer referenced and non-current. The symbol definition image file comprises all current symbol definitions and strings of the operating system. The current symbol definitions and strings are gathered by the symbol definition builder from the symbol and string tables of the root executable segment and the relocatable segments of the operating system that are currently loaded in memory.
    Type: Grant
    Filed: February 27, 1992
    Date of Patent: April 12, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael W. Carney, William Shannon, Joseph E. Provino
  • Patent number: 5300832
    Abstract: A voltage interfacing buffer for interfacing a low voltage integrated circuit to a high voltage environment, wherein the integrated circuit contains only low voltage transistors. To drive the high voltage environment at the low voltage swing, the voltage interfacing circuit employs protection circuits and novel n-well biasing of MOS transistors. To drive the high voltage environment at the high voltage swing, the voltage interfacing circuit employs a bias generator circuit to bias buffer transistors supplied with the high voltage. As example applications, the voltage interfacing buffer enables a 3 volt or 3.3 volt integrated circuit chip to drive TTL as well as CMOS voltage levels. Moreover, the voltage interfacing buffer enables a 2 volt integrated circuit chip to drive TTL voltage levels.
    Type: Grant
    Filed: November 10, 1992
    Date of Patent: April 5, 1994
    Assignee: Sun Microsystems, Inc.
    Inventor: Alan C. Rogers
  • Patent number: D348267
    Type: Grant
    Filed: May 19, 1992
    Date of Patent: June 28, 1994
    Assignee: Sun Microsystems, Inc.
    Inventors: Philip Yurkonis, Allison Armstrong