Patents Assigned to TECHNOLOGIES INC.
  • Publication number: 20220051968
    Abstract: The present application relates to the field of semiconductor technologies, and discloses a semiconductor structure and a formation method thereof. The method includes: providing a semiconductor substrate, the semiconductor substrate including a TSV; forming a dielectric layer on a surface of the semiconductor substrate, the dielectric layer being provided with an embedded metal landing pad; and etching the dielectric layer to form a communication hole for communicating the TSV with the metal landing pad.
    Type: Application
    Filed: October 27, 2021
    Publication date: February 17, 2022
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Pingheng WU
  • Publication number: 20220052054
    Abstract: A method for manufacturing a bit line structure includes the following operations. A bit line conductive layer is formed on a surface of a semiconductor substrate, and the bit line conductive layer is partially located in a groove in the surface of the semiconductor substrate. A first protective layer is formed on surfaces of the bit line conductive layer and the semiconductor substrate. A first barrier layer is formed on a surface of the first protective layer. The surface of the first barrier layer is subjected with passivating treatment. A sacrificial layer is formed on the surface of the first barrier layer, and is provided with a filling part filled in the groove. A part, other than the filling part, of the sacrificial layer is cleaned and stripped.
    Type: Application
    Filed: August 30, 2021
    Publication date: February 17, 2022
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Ning XI, Peimeng WANG
  • Publication number: 20220052150
    Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate, which at least includes discrete conducting layers in the semiconductor substrate; forming discretely arranged supporting structures on the semiconductor substrate, capacitor openings being included between the supporting structures; forming lower electrodes on sidewalls of the supporting structures, the lower electrodes being electrically connected with the conducting layers; forming a capacitor dielectric layer covering tops of the supporting structures, sidewalls of the lower electrodes, and bottoms of the capacitor openings; and forming an upper electrode covering the capacitor dielectric layer, to form capacitor structures.
    Type: Application
    Filed: August 26, 2021
    Publication date: February 17, 2022
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Lingxiang WANG
  • Publication number: 20220047738
    Abstract: A pulsed xenon UV disinfection system for treating objects present inside a room and/or area surrounding the system. The system includes an head portion, an intermediate portion and a lower portion. The head portion includes a lamp, a housing and a reflector to redirect the UV rays in preferred direction. A shutter mechanism is disposed in the intermediate portion includes a shutter to provide protection to the lamp. A shape changing mechanism comprising second actuator to change shape of reflector as per the treatment conditions and/or physical characteristics of the room. The shape of reflector facilitates to converge or diverge UV rays emitted by the lamp to effectively treat objects/area close to the system or away from the system, respectively.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 17, 2022
    Applicant: HELIOSXE TECHNOLOGIES INC.
    Inventors: Pratik SHAH, Vinay SREEKUMAR, Vinod MENON
  • Publication number: 20220052014
    Abstract: A semiconductor device includes an integrated circuit die having bond pads and a bond wires. The bond wires are connected to respective ones of the bond pads by a ball bond. An area of contact between the ball bond and the bond pad has a predetermined shape that is non-circular and includes at least one axis of symmetry. A ratio of the ball bond length to the ball bond width may be equal to a ratio of the bond pad length to the bond pad width.
    Type: Application
    Filed: February 26, 2021
    Publication date: February 17, 2022
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Yang Lei, Xiaofeng Di, Yuyun Lou, Zhonghua Qian, Junrong Yan
  • Publication number: 20220051354
    Abstract: The present application discloses a metering device, including a structure body of the metering device, a first metering chip and a metering master control chip. The first metering chip is configured for performing fundamental wave and full wave processing on electric energy data; the metering master control chip includes a master control chip core, a coprocessor and a storage unit, wherein the master control chip core and the coprocessor share the storage unit; and the coprocessor is configured for performing harmonic processing on the electric energy data based on the storage unit and based on a manner of instruction. By applying the solution of the present application, the electric energy data of the metering device can be processed quickly and efficiently, and a hardware cost is saved at the same time. The present application also provides an electric energy meter which has the corresponding technical effects.
    Type: Application
    Filed: October 27, 2021
    Publication date: February 17, 2022
    Applicant: HANGZHOU VANGO TECHNOLOGIES, INC.
    Inventors: Jie CAO, Jie HE, Aijun WANG, Zhaosheng DU, Xiaohui XIAO
  • Publication number: 20220051933
    Abstract: A semiconductor device manufacturing method includes: providing a semiconductor substrate, wherein the semiconductor substrate includes an array region and a peripheral region; word line structures and shallow trench isolation structures are formed in the array region, grooves are formed over word line structures, and a shallow trench isolation structure is formed in the peripheral region; depositing at least two insulating layers on a surface of the semiconductor substrate, each of the insulating layer has a different etch rate under a same etching condition; and removing part of the insulating layers located on surfaces of the array region and the peripheral region in sequence, wherein a lower insulating layer in the adjacent insulating layers is an etch stop layer of an upper insulating layer, and keeping all the insulating layers in the grooves located over the word line structures.
    Type: Application
    Filed: September 9, 2021
    Publication date: February 17, 2022
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Gongyi WU, Yong LU, Youquan YU
  • Publication number: 20220052049
    Abstract: A semiconductor structure includes a substrate, a bit line, and a first isolation layer. A groove is set in the substrate. A bottom end of the bit line is set in the groove. The first isolation layer is at least partially set on a sidewall of the bit line, and the first isolation layer is in direct contact with the bit line.
    Type: Application
    Filed: July 30, 2021
    Publication date: February 17, 2022
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Longyang CHEN, Gongyi WU
  • Publication number: 20220052056
    Abstract: A semiconductor manufacturing method includes: providing a semiconductor substrate, in which the semiconductor substrate includes an array region and a peripheral circuit region, in the array region, multiple capacitor contact holes are on the semiconductor substrate, and a first conductive layer is deposited on a bottom of each of the capacitor contact hole, and in the peripheral circuit region, a device layer is on the semiconductor substrate; treating the first conductive layer to increase its roughness; forming wire contact holes exposing the semiconductor substrate in the peripheral circuit region; forming a transition layer that at least covers a surface of the first conductive layer and a surface of the semiconductor substrate exposed by the wire contact holes; and forming a second conductive layer that covers the transition layer, and fills the capacitor contact holes and the wire contact holes.
    Type: Application
    Filed: July 8, 2021
    Publication date: February 17, 2022
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Jingwen LU, Bingyu ZHU, Shijie BAI
  • Patent number: 11250272
    Abstract: In one or more implementations, groups of users enter a facility within a short time. Automated systems attempt to predict a grouping for various users, but the predicted grouping may not exhibit a confidence level above a certain threshold level. In such cases, a user interface is generated and presented to an associate to confirm the grouping of users. The user interface includes an image gallery and interface elements that allow for the selection of users into a group. The image gallery includes previously stored images of users, such as images obtained during a registration process or during a previous visit to the facility. In addition, the user interface also includes image data obtained from a camera at the facility depicting visitors at various times or locations. Once a grouping has been selected or confirmed by an associate, group data may be generated and stored for the group of users.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: February 15, 2022
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Thomas Meilandt Mathiesen, Maren Marie Costa, Nishitkumar Ashokkumar Desai, Christopher Richard Fescoe, Casey Louis Thurston, Jason Michael Famularo, Sudarshan Narasimha Raghavan, Waqas Ahmed, Danny Guan
  • Patent number: 11249664
    Abstract: Methods, apparatus and systems for data storage devices that include non-volatile memory (NVM) are described. One such apparatus includes a non-volatile memory, a data storage device controller configured to receive a command from a host device, and wherein the data storage device controller comprises a file system analyzer comprising a determination circuit configured to determine based on the command from the host device whether a logical block address (LBA) referenced in the command is part of a known file extent, and a selection circuit configured to select a flash translation layer (FTL) workflow for the file extent in response to the determination that the LBA referenced in the command is part of the known file extent.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: February 15, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Judah Gamliel Hahn, Vinay Vijendra Kumar Lakshmi
  • Patent number: 11246976
    Abstract: A delivery system of a portable delivery device, using a chamber with three connections structure (10) arranged on the upper housing (1) as a buffer channel for the flow passage of the drug fluid from the external syringe into the reservoir (6) and from the reservoir (6) into the infusion needle; and the structures on the upper, the lower housings (1), (4) and the needle seat (2) accommodating the infusion needle mate with each other sophisticatedly ensuring the compactness of the delivery device and enabling the patient to control the position of the infusion needle safely and conveniently at the same time; in additional, the needle seat cover (7, 8) which covers the needle seat (2) enhances the safety of using the infusion needle. The delivery system of a portable delivery device has advantages of small size, sophisticated structure, simple operation, safety guarantee.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: February 15, 2022
    Assignee: MEDTRUM TECHNOLOGIES INC.
    Inventor: Cuijun Yang
  • Patent number: 11247367
    Abstract: Techniques for producing panels such as for use in a vehicle, boat, aircraft or other transport structure or mechanical structure using a 3-D-printed tooling shell are disclosed. A 3-D printer may be used to produce a tooling shell containing Invar and/or some other material for use in molding the panels. A channel may be formed in a 3-D printed tooling shell for enabling resin infusion, vacuum generation or heat transfer. Alternatively, or in addition to, one or more hollow sections may be formed within the 3-D printed tooling shell for reducing a weight of the shell. The panel may be molded using the 3-D printed tooling shell.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: February 15, 2022
    Assignee: DIVERGENT TECHNOLOGIES, INC.
    Inventors: Jon Paul Gunner, Narender Shankar Lakshman
  • Patent number: 11246547
    Abstract: Various aspects include methods for compensating for the effects of charge sharing among pixelate detectors in X-ray detectors by applying a correspondence factor to counts of X-ray photons in energy bins to estimate incident X-ray photon energy bins. The correspondence factor may be determined by determining an incident X-ray photon energy spectrum, adjusting the incident X-ray photon energy spectrum to account for an energy resolution of the pixelated detector, generating a charge sharing model for the adjusted incident X-ray photon energy spectrum based on a percentage charge sharing parameter of the pixelated detector, applying the charge sharing model to energy bins of the pixelated detector to estimate counts in each of the energy bins, and determining the correspondence factor by comparing the estimated counts in each of the energy bins to counts in the energy bins that would be expected for the adjusting the incident X-ray photon energy spectrum.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: February 15, 2022
    Assignee: REDLEN TECHNOLOGIES, INC.
    Inventors: Krzysztof Iniewski, Elmaddin Guliyev, Conny Hansson
  • Patent number: 11252346
    Abstract: Switching techniques for fast voltage settling in image sensors are described. In one embodiment, a transfer gate (TX) driver circuit of an image sensor includes a TX driver configured to provide a TX driver voltage to a plurality of pixels of an image sensor. A power supply (NVDD) is operationally coupled to the TX driver. A first switch (SW1) operationally coupling an outside capacitance (Cext) and the TX driver. A second switch (SW2) operationally coupling the Cext and the NVDD. A third switch (SW3) operationally coupling the NVDD and the TX driver. A falling edge of the TX driver voltage is configured to control a start of data transfer from individual pixels of the plurality of pixels. The SW1 and the SW2 are configured in an open position before the falling edge of the TX driver voltage. The SW3 is configured in a closed position before the falling edge.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: February 15, 2022
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Tiejun Dai, Zhe Gao, Ling Fu
  • Patent number: 11250027
    Abstract: Embodiments of the present disclosure relate to systems, techniques, methods, and computer-readable mediums for one or more database systems for data processing, including database and file management, as well as systems for accessing one or more databases or other data structures and searching, filtering, associating, and analyzing data. The present disclosure further relates to computer systems and techniques for interactive data visualization and presentation from one or more databases.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: February 15, 2022
    Assignee: PALANTIR TECHNOLOGIES INC.
    Inventors: John O'Brien, Advaya Krishna, Amr Al Mallah, Andrew Poh, Christopher Yu, Daniel Puller, Dylan Cooke, Jason Chlipala, Mark Cinali, Randall Dorin, Robert Barton, Samuel Sinensky, William Seaton, Mitchell Moranis
  • Patent number: 11248939
    Abstract: A method that occurs at a calibration system includes generating a first digital record based on a calibration of the calibration system using a calibration source; providing a copy of the first digital record to a first device under test (DUT); and providing a calibration test signal associated with a calibration of the first DUT, wherein the first DUT uses the first digital record in generating a second digital record based on the calibration of the first DUT.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: February 15, 2022
    Assignee: KEYSIGHT TECHNOLOGIES, INC.
    Inventor: Stephen Samuel Jackson
  • Patent number: 11251218
    Abstract: Imaging apparatus (2000, 2100, 2200) includes a photosensitive medium (2004, 2204) and an array of pixel circuits (302), which are arranged in a regular grid on a semiconductor substrate (2002) and define respective pixels (2006, 2106) of the apparatus. Pixel electrodes (2012, 2112, 2212) are connected respectively to the pixel circuits in the array and coupled to read out photocharge from respective areas of the photosensitive medium to the pixel circuits. The pixel electrodes in a peripheral region of the array are spatially offset, relative to the regular grid, in respective directions away from a center of the array.
    Type: Grant
    Filed: October 19, 2017
    Date of Patent: February 15, 2022
    Assignee: INVISAGE TECHNOLOGIES, INC.
    Inventors: Erin Hanelt, Naveen Kolli
  • Patent number: 11250667
    Abstract: A system and method for evaluating a persistent bonus game jackpot includes providing a persistent bonus game jackpot including an amount that defines a state of the persistent bonus game jackpot, storing, within a memory, a plurality of paytables, each paytable of the plurality of paytables associated with a state of the persistent bonus game jackpot and including a probability of awarding the persistent bonus game jackpot at the associated state, determining a current state of the persistent bonus game jackpot, dynamically selecting, based upon the determined current state, a paytable from the plurality of paytables stored in the memory, evaluating a bingo card provided in association with the persistent bonus game jackpot against the dynamically selected paytable and a ball call, and determining, in response to the evaluating, to credit the amount of the persistent bonus game jackpot to a player credit balance associated with the evaluated bingo card.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: February 15, 2022
    Assignee: ARISTOCRAT TECHNOLOGIES, INC.
    Inventors: Eldon Ideus, II, Michael Casey, Kevin Walsh
  • Patent number: 11250081
    Abstract: Disclosed are various embodiments for a search query prediction service. User accounts are organized into various groupings. Candidate search queries are determined for the groups into which a user account is included. A predicted search query is selected from the candidate search queries and communicated to the client before an input of a portion of a search query by a user of the client.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: February 15, 2022
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Piers George Cowburn, Eric Michael Molitor