Patents Assigned to Texas Instruments
  • Sulfidization of compound semiconductor surfaces and passivated mercury cadmium telluride substrates
    Patent number: 4632886
    Abstract: The disclosure relates to a method of passivating mercury cadmium telluride substrates wherein a substrate surface is lapped and cleaned and then placed in an electrolyte solution containing sulfide ions to electrolytically grow a sulfide passivating layer on the lapped and cleaned surface. A preferred electrolyte solution is formed with sodium sulfide, water and ethylene glycol.
    Type: Grant
    Filed: September 28, 1984
    Date of Patent: December 30, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Towfik H. Teherani, Arturo Simmons
  • Process of making Schottky barrier devices formed by diffusion before contacting
    Patent number: 4632713
    Abstract: Increased barrier heights at metal(36)-semiconductor(32) contacts for semiconductors such as gallium arsenide by formation of an opposite doping type thin layer (34) on the semiconductor (32) surface by surface diffusion of dopants are disclosed. Preferred embodiments diffuse zinc 50 to 400 .ANG. into n type gallium arsenide (32) by rapid thermal pulses; then aluminum or titanium-platinum (36) contacts to the zinc doped layer (34) are deposited by evaporation and lift off.
    Type: Grant
    Filed: July 31, 1985
    Date of Patent: December 30, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Shiban K. Tiku
  • High speed address transition detector circuit for dynamic read/write memory
    Patent number: 4633102
    Abstract: A transition of an address input of a memory device is detected in a CMOS circuit having a pair of AND gates Or'ed together. One AND gate receives the input bit and a delayed complement of this bit. The other AND gate receives the complement of the input bit and a delayed version of the true bit. The delays are RC circuits with time constants longer than the transition times. The output of the gates uses a pull-up device to restore a zero level after each transition is indicated. A number of these transition detectors may be OR'ed together to monitor all of the address bits of a memory device.
    Type: Grant
    Filed: July 9, 1984
    Date of Patent: December 30, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Jimmie D. Childers
  • Self testing data processing system with processor independent test program
    Patent number: 4633466
    Abstract: The present invention relates to a self testing data processing system which includes a communications bus for communication between a number of slots, at least one nonintelligent data processing circuit connected to one of those slots and at least one intelligent data processing circuit connected to another of those slots. Each nonintelligent data processing circuit includes a test memory which is readable from the communication bus. The test memory has a diagnostic program stored therein for testing that nonintelligent data processing circuit. This diagnostic program is written in an intermediate level interpretable test language. Each of the intelligent data processing circuits includes an interpreter program for interpreting the intermediate level interpretable test language into the native code of the intelligent data processing circuit.
    Type: Grant
    Filed: May 1, 1984
    Date of Patent: December 30, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Gerald E. Laws, Keith E. Diefendorff
  • Method of fabricating defect free trench isolation devices
    Patent number: 4631803
    Abstract: The specification discloses an isolation trench (36) formed in a semiconductor body. A stress relief layer (38) of oxide is formed on the interior walls of the trench (36), the layer (38) being sufficiently thin to prevent stressing of the lower corners of the trench (36). A masking layer (40) of nitride is formed over the layer (38). An isolation body (42) of oxide or polysilicon then refills the remainder of the trench and a cap oxide (43) and layer (44) of field oxide is formed over the semiconductor body and the filled trench.
    Type: Grant
    Filed: February 14, 1985
    Date of Patent: December 30, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: William R. Hunter, Christopher Slawinski, Clarence W. Teng
  • Dynamic read/write memory circuits with equal-sized dummy and storage capacitors
    Patent number: 4633443
    Abstract: A semiconductor dynamic read/write memory circuit using one-transistor storage cells and balanced bit lines with differential sense amplifiers employs dummy capacitors which are the same size as the storage capacitors. The dummy cell produces a signal on the bit line half that of the storage cell due to a second dummy capacitor for each dummy cell. One dummy capacitor is precharged to a reference voltage, and the other is predischarged to ground. The net signal is thus equal to that of a capacitor one-half the size of the storage capacitors.
    Type: Grant
    Filed: July 9, 1984
    Date of Patent: December 30, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Jimmie D. Childers
  • Method and apparatus for automatically determining pairs of turnings related to the same seismic event in adjacent seismic traces
    Patent number: 4633401
    Abstract: A computer system automatically determines pairs of significant turnings related to the same seismic event in adjacent seismic traces of a three-dimensional seismic volume, wherein a turning is defined as a zero-crossing in the Nth derivative of the seismic trace. The times of the turnings of a first trace are compared with the times of the turnings of a second trace, and vice versa. The mutual smallest differences between times of turnings is detected and those turnings having the smallest mutual differences are paired, thereby designating the turnings that are mutual nearest neighbors, provided that the signs of the (N+1)th derivatives are the same (positive or negative). The system has the capability to compare the signs. The system repeats the comparison and pairing throughout the three-dimensional seismic volume.
    Type: Grant
    Filed: November 8, 1984
    Date of Patent: December 30, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Bruce E. Flinchbaugh
  • Heat-exchanger
    Patent number: 4633069
    Abstract: A body comprising a ceramic electrical resistance material of positive temperature coefficient of resistivity adapted to display a sharp increase in resistivity when heated to a selected temperature has passages extending through the body between opposite ends of the body for passing fluid through the passages in heat-exchange relationship to the body and has means electrically contacting spaced-apart portions of the body for directing electrical current through the body to self-heat the body. The body is made with an improved structure in an improved manner and is particularly adapted for use as a self-regulated fluid heater within a small or irregularly-shaped conduit or the like.
    Type: Grant
    Filed: October 21, 1985
    Date of Patent: December 30, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Peter G. Berg, Vishwa Shukla, Bernard M. Kulwicki, Thomas C. Conlan
  • Method and apparatus for automatically producing representations of three-dimensional horizons from processed seismic data
    Patent number: 4633402
    Abstract: An electronic system automatically produces representations of three-dimensional recommended horizons from processed seismic data. Significant events, in the form of turnings, are identified in all of the digitized traces that make up the processed seismic data. Pairs of significant events in adjacent traces are determined. The system determines these pairs through a mutual nearest neighbor technique, together with a technique for detecting similar signs. The system measures the curvature of the path formed by the paired turnings in successive digital traces and terminates the path at any point where the curvature exceeds a predetermined limit. The system then looks for three-dimensional continuity by looking for a closed loop of at least four turnings making up four pairs of turnings. These techniques yield at least one horizon represented in a first format.
    Type: Grant
    Filed: November 8, 1984
    Date of Patent: December 30, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Bruce E. Flinchbaugh
  • Self-configuring digital processor system with logical arbiter
    Patent number: 4633392
    Abstract: A digital processor system including several function modules where each modules includes circuitry to perform at least one computational task and circuitry to transfer information containing that module's respective computational task capability to a logical arbiter upon initialization. Each module further includes circuitry to interface to the logical arbiter upon initialization to determine that module's address. Further disclosed is an information bus that connects all function modules together with the logical arbiter. The presence of the logical arbiter provides for a self-configuration capability upon initialization.
    Type: Grant
    Filed: April 22, 1985
    Date of Patent: December 30, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Geoffrey P. F. Vincent, Nicholas K. D. Ing-Simmons, John McGrath, Marvin C. Conrad
  • Memory interface with automatic delay state
    Patent number: 4631659
    Abstract: A digital processor system that includes a processor interface to an external memory. The interface to the external memory includes an information transfer bus to transfer information between the processor and the external memory and control circuitry to regulate the information on the information bus. This control circuitry includes the capability to delay the reading of information on the memory in order to allow for memory accesses to a slow memory. This delay capability is a selectable feature that is selected upon initialization of the processor.
    Type: Grant
    Filed: April 1, 1985
    Date of Patent: December 23, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: John Hayn, II, John Schabowski
  • Electronic handheld translator having miniature electronic speech synthesis chip
    Patent number: 4631748
    Abstract: An electronic handheld talking translator including a speech synthesis integrated circuit device. The speech synthesis integrated circuit device includes a digital filter, a voiced/unvoiced excitation circuit, a speech parameter interpolator, an input parameter decoder, a digital-to-analog converter, a speaker and associated timing circuits. A non-volatile memory stores digital data representative of the correct spellings of selected words in a foreign language and the model vocal tract control data necessary to control the speech synthesis circuit in a manner to cause the selected words to be audibly pronounced by the translator.
    Type: Grant
    Filed: February 24, 1982
    Date of Patent: December 23, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Paul S. Breedlove, James H. Moore, George L. Brantingham, Richard H. Wiggins, Jr.
  • Germanium hardened silicon substrate
    Patent number: 4631234
    Abstract: Disclosed is a substitutionally strengthened silicon semiconductor material. A high concentration of germanium atoms is added to a silicon melt to thereby substitutionally displace various silicon atoms throughout the crystalline structure. The germanium atoms, being larger than the silicon atoms, block crystalline dislocations and thus localize such dislocations so that a fault line does not spread throughout the crystalline structure. In heavily boron doped P+ silicon substrates, the larger germanium atoms offset the crystalline shrinkage caused by the boron atoms, thereby equilibrating the silicon crystal size.
    Type: Grant
    Filed: September 13, 1985
    Date of Patent: December 23, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Graydon B. Larrabee
  • CMOS substrate bias generator
    Patent number: 4631421
    Abstract: A generator for producing a negative bias voltage on a semiconductor device employs an on-chip oscillator driving two charge pump circuits. The oscillator produces a frequency inversely related to the negative bias, using a feedback circuit, thus reducing standby current. Each of the charge pumps include a CMOS inverter for controlling the transistor that functions as a diode connection to the ground terminal, producing an efficient charge transfer and speeding up generation of the bias voltage. Both charge pumps are used during power-up so the bias is rapidly increased to the operating level, then one is turned off to reduce current drain. A shunt circuit prevents CMOS latch-up during power-UP by coupling the substrate node to ground, preventing forward bias of N+ source/drain regions with respect to P substrate.
    Type: Grant
    Filed: August 14, 1984
    Date of Patent: December 23, 1986
    Assignee: Texas Instruments
    Inventors: Shinji Inoue, Rama S. Akundi
  • Device to preheat a fuel mixture
    Patent number: 4628889
    Abstract: A device preheats a fuel mixture in an intake manifold of a combustion engine, the device corresponding a cylindrical body having a side wall and a bottom disposed in the wall of the intake manifold. The body is arranged on an electro- and heat insulating contact bearer and is secured on the intake manifold in an electro- and heat conducting way, the bottom of the body being provided with PTC pills which are connected to a current conductor and are secured on the bottom in an electro- and heat conducting way. The bottom has such a thickness and shape that during preheating the fuel mixture a homogeneous heat conduction is created, the side wall of the body having securing means to secure the preheater, and wherein it has such a thickness that together with the securing means it provides the required heat resistance upon heat transfer from and to the intake manifold.
    Type: Grant
    Filed: August 22, 1985
    Date of Patent: December 16, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Arie Van Der Ploeg
  • Method for fabricating stacked CMOS structures
    Patent number: 4628589
    Abstract: In stacked CMOS, a single gate in first level polysilicon is used to address both an n-channel device in the substrate and an overlayed p-channel device. To self-align the p-channel polycrystalline silicon device to the gate, a layer of polycrystalline silicon is deposited over the integrated circuit, followed by spinning on a layer of doped oxide which is then etched back to expose the polycrystalline silicon over the gate region. Thermally annealing the integrated circuit causes dopant from the doped layer to diffuse into the polycrystalline layer, thereby forming self-aligned source and drain structures.
    Type: Grant
    Filed: September 28, 1984
    Date of Patent: December 16, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Ravishankar Sundaresan
  • Method for obtaining full oxide isolation of epitaxial islands in silicon utilizing selective oxidation of porous silicon
    Patent number: 4628591
    Abstract: Full oxide isolation of epitaxial islands can be accomplished by oxidizing suitably porous silicon. The porous silicon can be created by anodizing highly doped n+ silicon in hydroflouric acid. Lesser doped epitaxial regions will not become porous and will become isolated islands suitable for the fabrication of semiconductor devices.
    Type: Grant
    Filed: October 31, 1984
    Date of Patent: December 16, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Eldon J. Zorinsky, David B. Spratt
  • ESD input protection circuit
    Patent number: 4630162
    Abstract: A clamp circuit which breaks down under application of high voltage is connected to an input pin to be protected through a unidirectional device such as a diode. A voltage supply is connected to the discharge path between the unidirectional device and the clamp. The voltage supply will therefore supply any leakage currents which may be drawn by the clamp during normal operation.
    Type: Grant
    Filed: July 31, 1984
    Date of Patent: December 16, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Kenneth M. Bell, William H. Giolma
  • Dynamic memory with intermediate column derode
    Patent number: 4630240
    Abstract: A dynamic read/write memory array has a column decode and data input/output arrangement constructed to compensate for large capacitive loads in the I/O circuitry. In a first stage, a buffer is employed between sense amplifiers and segmented intermediate I/O lines. Each segment is a small fraction of the I/O load. First-level column decoding selects one column for each segment. A second level of column decoding employs tri-state buffers which can only be activated during a read with the proper column address. When writing, all buffers are in the high impedance state for reading while the selected buffer is written into through decoded pass gates.
    Type: Grant
    Filed: July 2, 1984
    Date of Patent: December 16, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Ken A. Poteet, Shuen C. Chang
  • Mercury cadmium telluride infrared focal plane devices having step insulator and process for making same
    Patent number: 4630090
    Abstract: The disclosure relates to a stepped insulator process for HgCdTe infared focal plane devices, the insulator being a combination of two insulator materials, ZnS and SiO, which differ in dielectric constant and chemical reactivity. The structure is patterned on HgCdTe which has an accumulated surface region. The resulting configuration significantly reduces pin hole short circuits introduced during via etching and improves the operating range (channel stopping action) for a given step height over that of ZnS alone.
    Type: Grant
    Filed: September 25, 1984
    Date of Patent: December 16, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Arturo Simmons, Michael A. Kinch