Abstract: An optical spatial address system wherein a collimated light beam which is deflectable in a predetermined manner strikes a backdrop having one or more sets of reflecting facets thereon to direct the beam to a unique point in a three-dimensional space as defined by the predetermined deflection of the light beam for the case of two sets of facets. The facets are designed to preferably direct the beam from the source from the first set of facets along an axis in three-dimensional space to the second set of facets, the latter facets directing the beam along an axis orthogonal to the direction of the beam impinging thereon.

Abstract: A molybdenum mask is used instead of a photoresist mask in defining and etching an oxide-encapsulated molybdenum gate in a VLSI manufacturing method. The molybdenum mask is first defined by a photoresist mask, then the photoresist is removed, leaving the molybdenum mask. A long over etch can then be tolerated so that oxide filaments can be avoided; this would be otherwise unreliable due to damage to photoresist during the over etch.

Abstract: A time delay relay (TDR) is formed by capturing a thermostatic switch between identical shells of an outer housing and suspending the switch in a switch cavity to minimize heat loss to the outer housing. The shells are bonded together to form a unitary housing member. Heater terminal members are captured in identical grooves formed in the housing shells with the terminals projecting from either the top or bottom of the TDR. An alternate embodiment includes a manual reset mechanism also captured between the housing shells.

Abstract: A starter circuit for a fluorescent tube lamp is connected between the cathode heaters of the tube to provide an initial heating current and then changes to a high impedance to ignite the tube. The circuit is fed by raw rectified a.c. and has a main thyristor requiring a high holding current to maintain the initial conduction. The current through the main thyristor sets up a voltage across a series diode which triggers a second thyristor to reduce the gate voltage of the main thyristor. The main thyristor ceases conduction when the current falls below the holding value and the inductive ballast impedance then produces a high energy striking pulse for the tube. The pulse voltage is limited to increase its duration. One embodiment generates a single pulse only each time the circuit is switched on and another embodiment produces pulses for a period of time before becoming quiescent. The main thyristor and the voltage limiting means are embodied in a monolithic semiconductor structure.

Abstract: A substrate pump circuit for generating a negative bias on the substrate of a semiconductor device employs a capacitor coupling an oscillator output to a pump node, and MOS diodes coupling the pump node to a ground terminal and to the substrate node; the MOS diode for the substrate node is reconfigured as an active switch, controlled by a complementary pump circuit. This circuit allows transfer of more charge from the pumping capacitor to the substrate capacitance on each pump cycle. Also, pumped charge is delivered directly to the substrate through ohmic connections, rather than through forward biased injecting junctions.

Abstract: A floating-gate, electrically-erasable, programmable read-only memory cell is programmed or erased by a high voltage across a thin oxide area between the floating gate and the substrate. A tunnelling phenomena is produced by the high voltage. In order to protect the thin oxide from excessive stress, yet minimize programming time, the maximum electric field is controlled by a dual-slope waveform for the programming voltage Vpp. The values of slope and breakpoints for this dual-slope Vpp voltage are selected by a feedback arrangement which is responsive to process variations in threshold voltage, supply voltage, etc.

Abstract: An integrated circuit chip is alloyed to a ceramic header for a standard semiconductor package in an elongated preheater fixture. The fixture has a heating position laterally spaced from a loading position, with slots running from the loading to heating positions accommodating the pins of the header. The slots also function as fins to radiate heat so that a temperature gradient is created between loading and heating positions. As the headers slide from the loading position along the length of the fixture, the headers are heated to the bonded temperature without producing undue thermal stress.

Abstract: A CMOS sense amplifier circuit for a dynamic read/write memory employs cross-coupled N-channel transistors and cross-coupled P-channel transistors, returned to the voltage supply and ground through two separate sets of P and N channel transistors selectively activated by sense clocks. The return transistors are activated for either fast or slow sensing, depending upon the address input. The selected columns are sensed at maximum speed, and non-selected columns which are only being refreshed are sensed at a slower speed. A large return transistor is switched into the circuit only for fast sensing, and other smaller transistors perform the slow sense function with high resistance returns to the supply so peak current is lower. The current needed to charge and discharge the bit lines is thus spread out, and the peak current is decreased.

Abstract: Since the formants in human speech move slowly over time, their slow time-varying behavior provides a source of information redundancy which can be used to reduce the required data rate in encoding of speech. In the present invention, speech is encoded by an adaptive tracking procedure, which follows the time-varying behavior of the speech parameters (e.g. the roots of the LPC inverse filter) with a minimum bit rate.A sequence of frames of parameters is segmented into locally-smooth segments which are approximated by higher-order orthogonal functions, and the required best-fit approximation order and coefficients are encoded.

Abstract: A semiconductor memory device having an array of rows and columns of dynamic one-transistor memory cells uses a single-ended differential sense amplifier connected to each whole column line, rather than separately to column line halves. A bistable circuit with cross-coupled driver transistors has one side connected to the column line by a first coupling transistor which turns off as the row line goes high to trap a fixed reference voltage, then the other side is connected to the column line by a second coupling transistor which turns on after the column line has settled out. This column line voltage is related to whether a 1 or 0 is stored. The time needed to precharge the column line is short because two halves need not be precharged from different levels, and so the memory cycle time is short. Also, the device is less susceptible to errors due to alpha particles because a change of the bit line voltage equally effects both inputs to a sense amplifier.

Abstract: A target for a laser beam consists of a plurality of closely spaced lines that causes the generation of an readily-identifiable read-out so that the laser beam can be indexed when performing laser scribing for redundant memory devices or the like.

Abstract: This device permits the distribution of the access to a RAM memory RAM (14) among a plurality of users (U1, U2, U3), the access being effected in an asynchronous manner. Certain users (U2, for example) can access the memory at adjoining addresses by means of a single row precharge cycle, the column access cycles (CAS) being successively effected during a single row (RAS) access cycle. One can thus considerably reduce the access time of the memory (14) when a large quantity of data must be read into the memory or written into it.Application to teletext terminals where the users of the memory can be the CPU, the video processor, and a teletext data receiver.

Abstract: A static random access memory wherein all cells have p-channel access transistors, p-channel driver transistors, and n-channel loads. The access transistors have a width to length ratio which is greater than the width to length ratio of the driver transistors.The bit lines are precharged close to VSS, and the wordlines are held near VCC in the off state. Thus the operating signals in the array of the SRAM of the present invention are opposite to those in SRAMs of the prior art.

Abstract: A seismic energy source air gun has a body with an air chamber formed therein that opens 360 degrees around the periphery of the body. A sleeve-type shuttle covers the opening in a pre-fire condition. When the air gun is fired, the shuttle moves rapidly away from the opening providing a large area for compressed air held in the chamber to escape. This very quick release maximizes the acoustic output. The movement of the shuttle is ultimately controlled by a solenoid which, when activated, causes the shuttle to move away from the 360 degree opening and when deactivated permits the shuttle to move back into the pre-fire position over the 360 degree opening.

Abstract: A magnetron plasma reactor wherein the susceptor is an aluminum arm extending into approximately the middle of a solenoidal magnetic field generated by a dc current.

Abstract: A miniature thermostatic switch of the type that can be inserted into the windings of electrical devices in order to sense the temperature of the windings is disclosed having an improved liquid tight seal to prevent seepage into the switch of varnish or other liquids to which the windings are subjected during assembly. The switch has a two part metallic housing with lips of one part clamped to the other part with an electrically insulating gasket interposed between the two parts. After assembly of the switch the gasket material is softened and the lip is subjected to a force to deform the gasket material, wetting the housing contiguous to the gasket and forming fillets therebetween to completely fill in any voids between the gasket and the contiguous housing.

Abstract: Method and apparatus for converting voice characteristics of synthesized speech from a single applied source of synthesized speech in a manner obtaining modified voice characteristics pertaining to the apparent age and/or sex of the speaker. The apparatus is capable of altering the voice characteristics of synthesized speech to obtain modified voice sounds simulating child-like, teenage, adult, aged and sexual preference characteristics by control of vocal track parameters including pitch period, vocal tract model, and speech data rate. A source of synthesized speech having a predetermined pitch period, a predetermined vocal tract model, and a predetermined speech rate is separated into the respective speech parameters. The values of pitch, the speech data frame length, and the speech data rate are then varied in a preselected manner to modify the voice characteristics of the synthesized speech from the source thereof.

Abstract: Optical illumination rather than furnace heating is used to drive in MOSFET source and drain diffusions, preferably using a surface layer of antimony as the dopant source. This results in substantially less overlap between the gate and the source and drain diffusions. Similarly, if the present invention is practiced in a process having gate sidewalls less than zero overlap can be achieved.

Abstract: A block associative memory includes a plurality of memory cell arrays (70 and 72) arranged in rows and columns. Addressing of memory cells in the arrays (70 and 72) loads the data contained in one row thereof into a row of sense amplifiers (74). The selected row constitutes a block of memory. The data in the accessed block is compared with key data from a key data generator (20) in an equalizer circuit (90). The data in a given row or block is arranged in word groups. Each word group is compared with the key data and a match output generated for each data word group matching the key data word group. This match is decoded to output the column location of that word. The steps of retrieving the block from memory and associating the block with the key search data is performed in a single step and then additional blocks are selected for association with the key data word.

Abstract: A monolithic delta frame circuit comprises a high speed line address circuit, demultiplexer, line shift register, plurality of buffer amplifiers, an array of difference frame elements, reset circuit means, plurality of sample and hold circuits, multiplexer, and a high speed line address circuit. The high speed line address circuit clocks a single line video input at a fast rate into the demultiplexer for demultiplexing into the line shift register, the line shift register shifts the single line signals and noise into the elements of the array of difference frame elements. As the data from the previous frame which consists of noise or noise minus signal is still present in the difference elements only the signal or delta signal portion feeds through a reset circuit at a slower rate to the multiplexer. The reset circuit introduces offset noises into the signal which is substantially reduced by feedback through the reset circuit.