Patents Assigned to Texas Instruments
  • Patent number: 10594237
    Abstract: A system includes a timer to determine a time interval between successive commutation state changes of a brushless direct current (BLDC) motor. A speed calculator computes a speed of the BLDC motor based on the time interval. A threshold calculator determines a threshold based on the computed speed, the threshold specifying a calculation of back electromotive force (BEMF) and mutual inductance of the BLDC motor at a next state change of the BLDC motor. A state change trigger commands the next state change based on a measured voltage associated with a floating phase of the BLDC motor relative to the threshold.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: March 17, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Zachery S. Buckley, Seil Oh
  • Patent number: 10591540
    Abstract: Electronic scan circuitry includes a decompressor (510), a plurality of scan chains (520.i) fed by the decompressor (510), a scan circuit (502, 504) coupled to the plurality of scan chains (520.i) to scan them in and out, a masking circuit (590) fed by the scan chains (520.i), and a scannable masking qualification circuit (550, 560, 580) coupled to the masking circuit (590), the masking qualification circuit (550, 560, 580) scannable by scan-in of bits by the decompressor (510) along with scan-in of the scan chains (520.i), and the scannable masking qualification circuit (550, 560, 580) operable to hold such scanned-in bits upon scan-out of the scan chains through the masking circuit (590). Other scan circuitry, processes, circuits, devices and systems are also disclosed.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: March 17, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Prakash Narayanan, Rubin A. Parekhji, Arvind Jain, Sundarrajan Subramanian
  • Patent number: 10593015
    Abstract: The architecture shown can perform global search, local search and local sub pixel search in a parallel or in a pipelined mode. All operations are in a streaming mode without the requirement of external intermediate data storage.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mahesh M. Mehendale, Ajit Deepak Gupte
  • Patent number: 10592243
    Abstract: A streaming engine employed in a digital data processor specifies a fixed read only data stream defined by plural nested loops. An address generator produces address of data elements. A steam head register stores data elements next to be supplied to functional units for use as operands. The streaming engine fetches stream data ahead of use by the central processing unit core in a stream buffer constructed like a cache. The stream buffer cache includes plural cache lines, each includes tag bits, at least one valid bit and data bits. Cache lines are allocated to store newly fetched stream data. Cache lines are deallocated upon consumption of the data by a central processing unit core functional unit. Instructions preferably include operand fields with a first subset of codings corresponding to registers, a stream read only operand coding and a stream read and advance operand coding.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Joseph Zbiciak
  • Patent number: 10594215
    Abstract: Described examples include DC-DC power conversion systems, apparatus and methods for linearizing a DC-DC circuit conversion gain, including a gain circuit providing an output signal according to a gain value and the difference between a first compensation signal and a threshold signal, and a switching circuit selectively operative when the first compensation signal exceeds the threshold signal to linearize the conversion gain by providing a second compensation signal for pulse width modulation of at least one DC-DC converter switch according to the threshold signal and the gain circuit output signal.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: March 17, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Sujan K. Manohar, Angelo W. Pereira
  • Patent number: 10594162
    Abstract: A system on a package (SOP) can include a galvanic isolator. The galvanic isolator can include an input stage configured to transmit an input RF signal in response to receiving an input modulated signal. The galvanic isolator can also include a resonant coupler electrically isolated from the input stage by a dielectric. The resonant coupler can be configured to filter the input RF signal and transmit an output RF signal in response to the input RF signal. The galvanic isolator can further include an output stage electrically isolated from the resonant coupler by the dielectric. The output stage can be configured to provide an output modulated signal in response to receiving the output RF signal.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Bharadvaj Bhamidipati, Swaminathan Sankaran, Mark W. Morgan, Gregory E. Howard, Bradley A. Kramer
  • Patent number: 10594279
    Abstract: A system having a set of power amplifiers each having a primary inductive structure configured to provide an output signal. A secondary inductive structure is configured to inductively couple to each of the primary inductive structures. A transmission line is provided with a signal trace and a ground trace. The signal trace of the transmission line is connected to a first end of the secondary inductive structure. A return path from a second end of the secondary inductive structure is coupled via a resonant network to the ground trace of the transmission line, in which the return path is spaced away from the secondary inductive structure to minimize inductive coupling to the primary structures.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Krishnanshu Dandu, Brian Paul Ginsburg
  • Patent number: 10591720
    Abstract: An apparatus for mitigating contamination of an optical device comprises an open-topped, closed-sided, and closed-bottomed housing cup partially defining a protected volume to enclose the optical device. A housing cap encloses a top of the housing cup and partially defines the protected volume. The housing cap includes a top collar having an open central aperture. A top cover laterally spans the central aperture of the top collar. An interface structure circumscribes the top cover to suspend the top cover downwardly into the housing cup from the top collar. The interface structure prevents direct contact between the top cover and the top collar.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Stephen John Fedigan, David Patrick Magee
  • Patent number: 10593640
    Abstract: In a described example, an apparatus includes a semiconductor substrate and at least two pillar bumps formed on an active surface of the semiconductor substrate, the at least two pillar bumps extending away from the active surface and having ends spaced from the semiconductor substrate with solder material at the ends of the at least two pillar bumps. At least one spacer is formed on the active surface of the semiconductor substrate, the at least one spacer extending a predetermined distance from the active surface of the semiconductor substrate. A package substrate has a die mount area on a first surface including portions receiving the ends of the at least two pillar bumps and receiving an end of the at least one spacer. Mold compound covers the semiconductor substrate, the at least two pillars, the at least one spacer, and at least a portion of the semiconductor substrate.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: James Raymond Maliclic Baello, Rafael Jose Lizares Guevara
  • Patent number: 10589986
    Abstract: An electronic device includes a package substrate, a circuit assembly, and a housing. The circuit assembly is mounted on the package substrate. The circuit assembly includes a first sealed cavity formed in a device substrate. The housing is mounted on the package substrate to form a second sealed cavity about the circuit assembly.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Adam Joseph Fruehling, Juan Alejandro Herbsommer, Simon Joshua Jacobs, Benjamin Stassen Cook, James F. Hallas, Randy Long
  • Patent number: 10591872
    Abstract: An integrated microfabricated sensor includes a sensor cell having a cell body, a first window attached to a first surface, and a second window attached to a second surface, opposite to the first window. The cell body laterally surrounds a cavity, so that the first window and the second window are exposed to the cavity. The sensor cell contains a sensor fluid material in the cavity. The cell body has recesses on opposing exterior sides of the cell body; each recess extends from the first surface to the second surface. Exterior portions of the cell body wall in the recesses are recessed from singulation surfaces on the cell body exterior. The cell body is formed by etching the cavity and the recesses concurrently through a body substrate. After the windows are attached, the sensor cell is singulated from the body substrate through the recesses.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Roozbeh Parsa, Iouri N Mirgorodski, William French, Nathan Brockie, Ann Gabrys, Terry Dyer
  • Patent number: 10593752
    Abstract: An integrated circuit and method has an isolated well with an improved isolated well contact. The well contact diffusion is isolated from a device diffusion of opposite conductivity type within the isolated well by an isolation transistor gate.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: March 17, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Bruce Lynn Pickelsimer, Patrick Robert Smith, Terry James Bordelon, Jr.
  • Patent number: 10593566
    Abstract: A method for manufacturing a switch-mode converter includes forming a plurality of windings by coiling one or more conductors. Each of the windings is secured to one of a plurality of module bases arranged in a module array. At least one side of the array is encapsulated in a magnetic mold compound.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kristen Nguyen Parrish, Charles Devries
  • Patent number: 10589980
    Abstract: In described examples, a microelectromechanical system (MEMS) includes a first element and a second element. The first element is mounted on a substrate and has a first contact surface. The second element is mounted on the substrate and has a second contact surface that protrudes from the second element to form an acute contact surface. The first element and/or the second element is/are operable to move in: a first direction, such that the first contact surface comes in contact with the second contact surface; and a second direction, such that the second contact surface separates from the first contact surface.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Patrick Ian Oden, James Carl Baker, Sandra Zheng, William C. McDonald
  • Patent number: 10592339
    Abstract: Disclosed embodiments relate to a streaming engine employed in, for example, a digital signal processor. A fixed data stream sequence including plural nested loops is specified by a control register. The streaming engine includes an address generator producing addresses of data elements and a steam head register storing data elements next to be supplied as operands. The streaming engine fetches stream data ahead of use by the central processing unit core in a stream buffer. Parity bits are formed upon storage of data in the stream buffer which are stored with the corresponding data. Upon transfer to the stream head register a second parity is calculated and compared with the stored parity. The streaming engine signals a parity fault if the parities do not match. The streaming engine preferably restarts fetching the data stream at the data element generating a parity fault.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Joseph Zbiciak, Timothy Anderson
  • Patent number: 10593795
    Abstract: An integrated circuit and method having an extended drain MOS transistor, wherein a diffused drain is deeper under a field oxide element in the drain than in a drift region under the gate. A field oxide hard mask layer is etched to define a drain field oxide trench area. Drain dopants are implanted through the drain field oxide trench area and a thermal drain drive is performed. Subsequently, the drain field oxide element is formed.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Seetharaman Sridhar
  • Publication number: 20200083076
    Abstract: Apparatus to store singulated wafers for transport, including multiple wafer assemblies stacked in the interior of a container housing, the individual wafer assemblies including an expanded laser diced wafer singulated into dies, a first frame spaced outward from the wafer on a carrier structure, a second frame spaced outward from the wafer and inward from the first frame on the carrier structure, and a foam structure that supports the second frame and the carrier structure.
    Type: Application
    Filed: September 12, 2018
    Publication date: March 12, 2020
    Applicant: Texas Instruments Incorporated
    Inventors: Connie Alagadan Esteron, Dolores Babaran Milo, Jerry Gomez Cayabyab
  • Patent number: 10585810
    Abstract: A method of protecting software for embedded applications against unauthorized access is disclosed. Software to be protected is loaded into a protected memory area and access to the protected memory area is controlled by sentinel logic circuitry. The sentinel logic circuitry allows access to the protected memory area only either from within the protected memory area or from outside of the protected memory area but through a dedicated memory location within the protected memory area. The dedicated memory location then points to protected address locations within the protected memory area.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: March 10, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Johann Zipperer
  • Patent number: 10587437
    Abstract: Apparatus and methods are presented for using configurable additive data scrambling or descrambling circuitry for multichannel link aggregators in which a scrambler or descrambler polynomial is specified by binary data in a programmable register, and the polynomial data is used to compute a polynomial matrix. A scrambler or descrambler pattern is computed according to the polynomial matrix, and input data is bitwise exclusive-ORed with the computed scrambler or descrambler pattern to generate scrambled or descrambled output data. The scrambling or descrambling circuitry can be reconfigured for different polynomials by reprogramming the register, with the scrambler or descrambler automatically computing an updated polynomial matrix.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: March 10, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Seuk Bo Kim, T-Pinn R. Koh
  • Patent number: 10586791
    Abstract: In a described example, an apparatus includes: a first metal oxide semiconductor field effect transistor (MOSFET) coupled between a first input terminal for receiving a supply voltage and an output terminal for coupling to a load, and having a first gate terminal; an enable terminal coupled to the first gate terminal for receiving an enable signal; a first current mirror coupled between the first input terminal and a first terminal of a first series resistor and having an input coupled to the first gate terminal; and a second MOSFET coupled between the first gate terminal and the output terminal, and having a second gate terminal coupled to the first terminal of the first series resistor, the first series resistor having a second terminal coupled to the output terminal.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: March 10, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Qingjie Ma, Wei Xu, Jingwei Xu, Yang Wang