Abstract: A method for signaling sample adaptive offset (SAO) band offset syntax elements in a video encoder is provided that includes receiving a plurality of band offset syntax elements, entropy encoding an absolute value of a magnitude of each band offset syntax element in a compressed video bit stream, and entropy encoding a sign of each non-zero band offset syntax element in the compressed video bit stream following the absolute values of the magnitudes.

Abstract: A system, method and apparatus for tuning an internal oscillator to a desired frequency F1 is shown and uses an RC delay element that comprises a resistor, a capacitor and a comparator. The method includes receiving a clock signal from an oscillator to be tuned, triggering charging of the RC delay element, and N clock cycles after triggering the charging, the method determines whether the charge on the precision RC delay element is higher than or lower than a reference voltage. Correction to the clock frequency is based on the results.

Abstract: A bulk acoustic wave (BAW) resonator includes a substrate having a top side surface and a bottom side surface. A Bragg mirror is on the top side surface of the substrate. A bottom electrode layer is on the Bragg mirror, and a piezoelectric layer is on the bottom electrode layer. A top dielectric layer is on the piezoelectric layer, and a top electrode layer is on the top dielectric layer. The bottom side surface of the substrate has a surface roughness of at least 1 ?m root mean square (RMS).

Abstract: A method and device for eye gaze tracking has coincident display and imaging channel with shared field of view; a pupil forming/collimating subsystem that is part of the imaging channel; and a microdisplay that is part of the imaging channel. The method and device enable simultaneous display and eye tracking by using a pond of mirrors in a micromirror array.

Abstract: Embodiments of methods for adaptive sub-band point-to-point communication are presented. In one embodiment a method includes performing functions using a power line communication (PLC) transmitter device. The method may include receiving a first data packet having a first adaptive sub-band information set, the first sub-band information set comprising information from a PLC transmitter. The method may also include extracting the first sub-band information set from the first data packet. Additionally, the method may include analyzing the first sub-band information set to determine a transmitter sub-band hopping pattern. The method may further include setting a corresponding receiver sub-band hopping pattern synchronized to the sub-band hopping patter used by the PLC transmitter and hopping to a subsequent sub-band as defined by the receiver sub-band hopping pattern.

Abstract: An electronic circuit 120 includes a more-secure processor (600) having hardware based security (138) for storing data. A less-secure processor (200) eventually utilizes the data. By a data transfer request-response arrangement (2010, 2050, 2070, 2090) between the more-secure processor (600) and the less-secure processor (200), the more-secure processor (600) confers greater security of the data on the less-secure processor (200). A manufacturing process makes a handheld device (110) having a storage space (222), a less-secure processor (200) for executing modem software and a more-secure processor (600) having a protected application (2090) and a secure storage (2210).

Abstract: Methods are provided for reducing the size of a transpose buffer used for computation of a two-dimensional (2D) separable transform. Scaling factors and clip bit widths determined for a particular transpose buffer size and the expected transform sizes are used to reduce the size of the intermediate results of applying the 2D separable transform. The reduced bit widths of the intermediate results may vary across the intermediate results. In some embodiments, the scaling factors and associated clip bit widths may be adapted during encoding.

Abstract: A method of compressing digital image data is provided that includes selecting an entropy code for encoding a line of pixels in the digital image data, wherein the entropy code is selected from a plurality of variable length entropy codes, using spatial prediction to compute a pixel predictor and a pixel residual for a pixel in the line of pixels, and selectively encoding the pixel residual using one of the entropy code or run mode encoding.

Abstract: Systems and methods for enabling co-existence among power line communications (PLC) technologies are described. In some embodiments, a method performed by a PLC device, such as a PLC gateway, may include searching for and detecting a co-existence preamble on a PLC network while not transmitting or receiving frames. The device waits a time period before attempting transmission of a frame if the coexistence preamble is detected and is not followed by a native preamble. Transmissions are resumed to the PLC network after expiration of the time period.

Abstract: A system includes a user input engine to receive input via a graphical user interface (GUI) through a first window, the input including a distance value and an input resolution value. The system also includes a sensor circuit solution generation engine to generate a plurality of sensor circuit solutions based on the received input and to cause the plurality of sensor circuit solutions to be displayed. Each sensor circuit solution specifies information about a conductive coil.

Abstract: An integrated circuit and method with a delamination free opening formed through multiple levels of polymer dielectric. The opening has a vertical sidewall and no interface between adjacent levels of polymer dielectric is exposed on the vertical sidewall.

Abstract: Described examples include circuitry and methods to control lock time of a phase lock loop (PLL) or other locking circuit, in which a phase frequency detector (PFD) circuit is switched from a first mode to provide a control input signal to a charge pump as a pulse signal having a pulse width corresponding to a phase difference between a reference clock signal and a feedback clock signal to a second mode to hold the control input signal at a constant value for a predetermined time in response to detected cycle slip conditions to enhance loop filter current during frequency transitions to reduce lock time for the locking circuit.

Abstract: A loss of lock detector that includes a logic gate, a voltage-to-current converter coupled to the logic gate, a capacitor coupled to the converter, and a comparator coupled to the capacitor. The logic gate is configured to receive a first error signal and a second error signal from a phase detector, perform an AND function of the first and second error signals, and generate a gate output signal. The converter is configured to receive the gate output signal and generate a stream of current pulses representative of the gate output signal. The capacitor is configured to receive the stream of current pulses and generate a DC signal representative of the stream of current pulses. The comparator is configured to compare the DC signal to a reference signal and output a lock signal.

Abstract: A method of calculating a time difference is disclosed. The method includes receiving a first signal, determining a first envelope of the first signal, and determining a first time the first envelope crosses a threshold. The method further includes receiving a second signal, determining a second envelope of the second signal, and determining a second time the second envelope crosses the threshold. The time difference is calculated between the first and second times.

Abstract: A circuit and method for magnetic field detection is disclosed. A fluxgate sensor comprises a fluxgate having a first core and a second core. A sense coil has a first winding around the first fluxgate core and a second winding around the second fluxgate core. A fluxgate detection circuit is coupled to the sense coil and outputs a signal proportional to an external magnetic field applied to the fluxgate. A detection circuit is coupled to the first winding and outputs a signal that indicates whether voltage pulses have been detected on the first winding.

Abstract: USB interface and charging port controller integrated circuits and systems are presented for interfacing USB power and data signaling with a host circuit, in which an ESD protection diode is integrated in the IC, having an anode connected to a data terminal of the IC and a cathode connected to the positive USB bus voltage terminal for directing ESD transient current from the data terminal to the USB bus voltage terminal for dissipation to an external bus capacitance connected between the USB bus voltage terminal and a USB ground node on a host system circuit board.

Abstract: A method for sample adaptive offset (SAO) filtering in a video encoder is provided that includes estimating SAO parameters for color components of a largest coding unit (LCU) of a picture, wherein estimating SAO parameters includes using at least some non-deblock-filtered reconstructed pixels of the LCU to estimate the SAO parameters, performing SAO filtering on the reconstructed LCU according to the estimated SAO parameters, and entropy encoding SAO information for the LCU in a compressed video bit stream, wherein the SAO information signals the estimated SAO parameters for the LCU.

Abstract: An integrated circuit containing CMOS transistors and an embedded thermoelectric device is formed by forming isolation trenches in a substrate, concurrently between the CMOS transistors and between thermoelectric elements of the embedded thermoelectric device. Dielectric material is formed in the isolation trenches to provide field oxide which laterally isolates the CMOS transistors and the thermoelectric elements. Germanium is implanted into the substrate in areas for the thermoelectric elements, and the substrate is subsequently annealed, to provide a germanium density of at least 0.10 atomic percent in the thermoelectric elements between the isolation trenches. The germanium may be implanted before the isolation trenches are formed, after the isolation trenches are formed and before the dielectric material is formed in the isolation trenches, and/or after the dielectric material is formed in the isolation trenches.

Abstract: Methods and circuits for transmitting data are disclosed. An embodiment of a method includes transmitting a predetermined number of pulses during predetermined period of time. A first predetermined number of pulses transmitted during the predetermined period of time represents a first value and a second predetermined number of pulses transmitted during the predetermined period of time represents a second value.

Abstract: A method of fabricating an integrated circuit includes depositing a first dielectric material onto a semiconductor surface of a substrate having a gate stack thereon including a gate electrode on a gate dielectric. The first dielectric material is etched to form sidewall spacers on sidewalls of the gate stack. A top surface of the first dielectric material is chemically converted to a second dielectric material by adding at least one element to provide surface converted sidewall spacers. The second dielectric material is chemically bonded across a transition region to the first dielectric material.