Patents Assigned to Texas Instruments
  • Multi domain bridge with auto snoop response
    Patent number: 9489307
    Abstract: An asynchronous dual domain bridge is implemented between the cache coherent master and the coherent system interconnect. The bridge has 2 halves, one in each clock/powerdown domain—master and interconnect. The powerdown mechanism is isolated to just the asynchronous bridge implemented between the master and the interconnect with a basic request/acknowledge handshake between the master subsystem and the asynchronous bridge.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: November 8, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Daniel B Wu, Timothy D Anderson
  • Highly efficient different precision complex multiply accumulate to enhance chip rate functionality in DSSS cellular systems
    Patent number: 9489197
    Abstract: This invention is a digital signal processor capable of performing correlation of data with pseudo noise for code division multiple access (CDMA) decoding using clusters. Each cluster includes plural multipliers. The multipliers multiply real and imaginary parts of packed data by corresponding pseudo noise data. Within a cluster the real parts and the imaginary parts of the products are summed separately. This forms plural complex number outputs equal in number to the number of clusters. The pseudo noise data is offset relative to the data input differing amounts for different clusters. The clusters are divided into first half clusters receiving data from even numbered slots and second half clusters receiving data from odd numbered slots. The correlation unit includes a mask input to selectively zero a multiplier product.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: November 8, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mujibur Rahman, Peter Richard Dent, Timothy David Anderson, Duc Quang Bui
  • SYSTEM AND METHOD FOR ULTRA LOW POWER MODE TRANSMISSION
    Publication number: 20160323824
    Abstract: A time slot assignment arrangement for ultralow power devices in a wireless communication network is disclosed. The time slot assigned to ultralow power device wakeup frame is identified as ultralow power timeslot using various indicators. The ultralow power timeslot is assigned as contention based timeslot allowing ultralow power devices in the wireless network to extend the interval for synchronizing with the network overcoming the short synchronization interval requirements of wireless communication network resulting in significant improvement in battery life by preserving the power needed for frequent synchronization with the wireless communication network.
    Type: Application
    Filed: February 9, 2016
    Publication date: November 3, 2016
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: ARITON E. XHAFA, BAHER HAROUN
  • Integrated circuit
    Patent number: 9482718
    Abstract: Integrated circuits and methods for testing integrated circuits are disclosed herein. An embodiment of an integrated circuit includes a microprocessor and memory that is accessible by the microprocessor. The integrated circuit also includes reconfigurable logic, wherein a first test program for testing at least one of the microprocessor and memory is loadable onto the reconfigurable logic. At least one other program is loadable into the reconfigurable logic after the first test program runs.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Clive David Bittlestone
  • LVDS input circuit with comparators, or gate, and multiplexer
    Patent number: 9484921
    Abstract: First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an input circuit and a differential output driver connected to the single pair of LVDS signal paths. An input to the input circuit is also connected to the input of the driver. The input circuit may also receive an offset voltage. In response to its inputs, the input circuit in each device can use comparators, gates and a multiplexer to determine the logic state being transmitted over the pair of LVDS signal paths from the other device. This advantageously reduces the number of required interconnects between the first and second devices by one half.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: November 1, 2016
    Assignee: Texas Instruments Incorporated
    Inventor: Lee D. Whetsel
  • Unified input/output controller for integrated wireless devices
    Patent number: 9483429
    Abstract: A novel and useful apparatus for and method of a unified IO controller well suited for use in integrated wireless devices incorporating multiple functions. The unified IO controller is operative to provide a single host interface PHY/MAC that is shared among all functions on the controller. The invention provides an IO protocol handler comprising common and unified logic that provides IO access to any function on the device. The common and unified IO PHY interface logic is shared between multiple functions within the same device (e.g., WLAN, GPS, Bluetooth, etc.). This implementation provides optimized hardware partitioning in which common SDIO logic serves multiple functions thereby eliminating the need to provide a protocol handler for each function, reducing pin count, power consumption and die size, since the SDIO protocol handling is implemented in a shared module.
    Type: Grant
    Filed: July 14, 2008
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Alon Paycher, Eli Dekel, Avi Baum
  • Emulation of LED input characteristics in BICMOS process
    Patent number: 9484913
    Abstract: An LED input emulator to interface a signal source designed for use with an LED optocoupler, to capacitive or other galvanic isolation circuitry, emulating LED forward and reverse bias voltages. VR reverse blocking circuitry includes MP1 and MP2 PMOS transistors coupled to an emulator anode port, and to emulate LED reverse bias voltage. VF control circuitry includes a variable resistance (MP3) coupled between anode and cathode ports, and a current control circuit coupled to an output node, and to control current through the variable resistance to maintain a desired forward voltage at the output node. In an example embodiment, the VF control circuitry is implemented with an amplifier and a bandgap voltage reference circuit coupled to the output node, generating both reference and feedback voltages input to the amplifier to control the variable resistance.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shailendra K. Baranwal, David W. Stout, Abhijeeth A. Premanath
  • Power regulation with load detection
    Patent number: 9483065
    Abstract: One embodiment of the present invention includes a power regulator system. The system includes a power stage configured to provide an output voltage to a load in response to an input voltage and a control signal. The system also includes a feedback system that receives the input voltage and is configured to generate the control signal based on the output voltage. The system further includes a load detector configured to determine a state of the load and to set the power to the feedback system based on determining the state of the load.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: H. Pooya Forghani-zadeh, Luis Alberto Huertas-Sanchez, Sungho Beck
  • TCAM providing efficient move contents operation
    Patent number: 9484095
    Abstract: An embodiment of the invention includes a Ternary Content Addressable Memory (TCAM) that includes a group of TCAM block. Each TCAM block stores a number of match entries. Each TCAM block is ranked in priority order. The TCAM also includes a group of TCAM headpointers. There is a TCAM headpointer coupled to each TCAM block. The TCAM headpointer indicates the highest priority match in the group of match entries in a TCAM block. The match entries within a TCAM block are prioritized in circular priority order starting from the highest priority match.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Patrick W. Bosshart
  • Optical electronic device and method of fabrication
    Patent number: 9481572
    Abstract: An optical electronic device and method that forms cavities through an interposer wafer after bonding the interposer wafer to a window wafer. The cavities are etched into the bonded interposer/window wafer pair using the anti-reflective coating of the window wafer as an etch stop. After formation of the cavities, the bonded interposer/window wafer pair is bonded peripherally of die areas to the MEMS device wafer, with die area micromechanical elements sealed within respectively corresponding ones of the cavities.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Simon Joshua Jacobs
  • MOS transistor with varying channel width
    Patent number: 9484435
    Abstract: One embodiment of the invention relates to a semiconductor device formed over a semiconductor body. In this device, source and drain regions are formed in the body about lateral edges of a gate electrode and are separated from one another by a gate length. A channel region, which is configured to allow charged carriers to selectively flow between the source and drain regions during operation of the device, has differing widths under the gate electrode. These widths are generally perpendicular to the gate length. Other devices, methods, and systems are also disclosed.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Henry Litzmann Edwards, Tathagata Chatterjee, Mohamed Kamel Mahmoud, Gabriel J. Gomez
  • Integrated channel diode
    Patent number: 9484450
    Abstract: A semiconductor device includes a vertical drift region over a drain contact region, abutted on opposite sides by RESURF trenches. A split gate is disposed over the vertical drift region. A first portion of the split gate is a gate of an MOS transistor and is located over a body of the MOS transistor over a first side of the vertical drift region. A second portion of the split gate is a gate of a channel diode and is located over a body of the channel diode over a second, opposite, side of the vertical drift region. A source electrode is electrically coupled to a source region of the channel diode and a source region of the MOS transistor.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Christopher Boguslaw Kocon, Simon John Molloy, John Manning Savidge Neilson, Hideaki Kawahara
  • Method and system for preventing unauthorized processor mode switches
    Patent number: 9483638
    Abstract: A system comprising a processor adapted to activate multiple security levels for the system and a monitoring device coupled to the processor and employing security rules pertaining to the multiple security levels. The monitoring device restricts usage of the system if the processor activates the security levels in a sequence contrary to the security rules.
    Type: Grant
    Filed: January 6, 2015
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Gregory R. Conti
  • Method and system for constraining slice header processing overhead in video coding
    Patent number: 9485506
    Abstract: A method for encoding a picture of a video sequence in a bit stream that constrains slice header processing overhead is provided. The method includes computing a maximum slice rate for the video sequence, computing a maximum number of slices for the picture based on the maximum slice rate, and encoding the picture wherein a number of slices used to encode the picture is enforced to be no more than the maximum number of slices.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Minhua Zhou
  • Wafer scale testing using a 2 signal JTAG interface
    Patent number: 9482717
    Abstract: Testing of die on wafer is achieved by; (1) providing a tester with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuitry, (2) providing die on wafer with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuitry, and (3) providing a connectivity mechanism between the bidirectional transceiver circuitry's of the tester and a selected group or all of the die on wafer for communication of the JTAG signals.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: November 1, 2016
    Assignee: Texas Instruments Incorporated
    Inventor: Lee D. Whetsel
  • Switching between transmit and receive modes in a wireless transceiver
    Patent number: 9484979
    Abstract: A wireless transceiver decodes a receive signal to extract data contained in the receive signal. A processing block contained in the wireless transceiver then initiates a power-ON of the transmit radio portions of the transceiver prior to initiating a power-OFF of the receive radio portions. The technique enables the transceiver to meet timing requirements when operating in environments that require an acknowledgement to be sent in response to receipt of data.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Saurabh Khanna, Sarma Sundareswara Gunturi, Vijaya Sarathy Bergai ParthaSarathy
  • Dielectric waveguide signal divider
    Patent number: 9484614
    Abstract: A dielectric waveguide (DWG) has a longitudinal core member with a first dielectric constant value surrounded by a cladding with a cladding dielectric constant value that is lower than the first dielectric constant value. A first port of a signal divider is connected to receive a signal from the DWG. A second port and a third port are each configured to output a portion of the signal received on the first port, wherein the first and second port are approximately in line and the third port is at an angle to a line formed by the first port and the second port. The first port and second port have a core member with the first dielectric constant value, and the third port has a core member with a second dielectric constant value that is higher than the first dielectric constant value.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Juan Alejandro Herbsommer
  • Inductive coupled pass transistor quadrature voltage controlled oscillator
    Patent number: 9484858
    Abstract: A quadrature voltage controlled oscillator (QVCO) for providing an oscillating output signal. The QVCO includes a first oscillating circuit for producing a first output signal and a second output signal, those signals being a first set of antiphase signals. The QVCO also includes a second oscillating circuit for producing a first output signal and a second output signal, those signals being a second set of antiphase signals. The first oscillating circuit also has injection circuitry for injecting the second set of antiphase signals without a DC bias into the first output signal and the second output signal, and the second oscillating circuit also has injection circuitry for injecting the first set of antiphase signals without a DC bias into the third output signal and the fourth output signal.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sachin Kalia, Bradley A. Kramer, Swaminathan Sankaran
  • Parallel motion estimation in video coding
    Patent number: 9485520
    Abstract: Methods for improved parallel motion estimation are provided that decouple the merging candidate list derivation and motion estimation for merge mode and skip mode and the advanced motion vector predictor (AMVP) candidate list construction from regular motion estimation to increase the coding quality in parallel motion estimation while meeting throughput requirements. This decoupling may be accomplished by modifying the availability rules for spatial motion data (SMD) positions for construction of the candidate lists. As part of the decoupling, largest coding units (LCUs) of a picture may be divided into non-overlapping parallel motion estimation regions (PMER) of equal size. Within a PMER, motion estimation for merge mode, skip mode, and normal inter-prediction mode may be performed in parallel for all the prediction units (PUs) in the PMER.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Minhua Zhou, Vivienne Sze
  • Distributed power control for controlling power consumption based on detected activity of logic blocks
    Patent number: RE46193
    Abstract: An embedded megamodule and an embedded CPU enable power-saving through a combination of hardware and software. The CPU configures the power-down controller (PDC) logic within megamodule and can software trigger a low-power state of logic modules during processor IDLE periods. To wake from this power-down state, a system event is asserted to the CPU through the module interrupt controller. Thus the entry into a low-power state is software-driven during periods of inactivity and power restoration is on system activity that demands the attention of the CPU.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: November 1, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Timothy David Anderson, Lewis Nardini, Jose Luis Flores, Abhijeet Chachad, Raguram Damodaran, Joseph R. M. Zbiciak, Gary Swoboda