Patents Assigned to Texas Instruments
  • INTEGRATED CIRCUIT WITH CONFIGURABLE CONTROL AND POWER SWITCHES
    Publication number: 20160190926
    Abstract: Disclosed examples include integrated circuits configurable according to sensed circuit conditions to provide configurable power converter topologies with externally connected circuitry to implement buck, boost, buck-boost, low dropout and/or hot-swap power converters. The ICs include one or more sets of series connected high and low side transistors connected with corresponding IC pads to allow connection to external circuitry to form a particular power converter configuration. The IC includes a control circuit and a configuration circuit to sense a circuit condition of the IC and to configure the control circuit to provide switching control signals to the transistors to implement one of a plurality of power converter topologies.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 30, 2016
    Applicant: Texas Instruments Incorporated
    Inventors: Chuan Ni, Timothy P. Pauletti
  • Well resistors and polysilicon resistors
    Patent number: 9379176
    Abstract: An integrated circuit containing a well resistor has STI field oxide and resistor dummy active areas in the well resistor. STI trenches are etched and filled with trench fill dielectric material. The trench fill dielectric material is removed from over the active areas by a CMP process, leaving STI field oxide in the STI trenches. Subsequently, dopants are implanted into a substrate in the well resistor area to form the well resistor. An integrated circuit containing a polysilicon resistor has STI field oxide and resistor dummy active areas in an area for the polysilicon resistor. A layer of polysilicon is formed and planarized by a CMP process. A polysilicon etch mask is formed over the CMP-planarized polysilicon layer to define the polysilicon resistor. A polysilicon etch process removes polysilicon in areas exposed by the polysilicon etch mask, leaving the polysilicon resistor.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Stephen Keith Heinrich-Barna, Douglas P. Verret, Alwin J. Tsao
  • Core wrapper link instruction register controls responsive to select signal
    Patent number: 9377509
    Abstract: A test architecture accesses IP core test wrappers within an IC using a Link Instruction Register (LIR). An IEEE P1500 standard is in development for providing test access to these individual cores via a test structure called a wrapper. The wrapper resides at the boundary of the core and provides a way to test the core and the interconnections between cores. The test architecture enables each of the plural wrappers in the IC, including wrappers in cores embedded within other cores, with separate enable signals.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Lee D. Whetsel
  • Packaging a semiconductor device having wires with polymerized insulator skin
    Patent number: 9378984
    Abstract: A chip is attached to a substrate with wires spanning from the chip to the substrate is loaded in a heated cavity of a mold. The wire surfaces are coated with an adsorbed layer of molecules of a heterocyclic compound. A pressure chamber of the mold is loaded with a solid pellet of a packaging material including a polymerizable resin. The chamber is connected to the cavity. The vapor of resin molecules is allowed to spread from the chamber to the assembly inside the cavity during the time interval needed to heat the solid pellet for rendering it semi-liquid and to pressurize it through runners before filling the mold cavity, wherein the resin molecules arriving in the cavity are cross-linked by the adsorbed heterocyclic compound molecules into an electrically insulating at least one monolayer of polymeric structures on the wire surfaces.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rongwei Zhang, Abram Castro
  • Transform and quantization architecture for video coding and decoding
    Patent number: 9378185
    Abstract: A method of encoding a video stream in a video encoder is provided that includes computing an offset into a transform matrix based on a transform block size, wherein a size of the transform matrix is larger than the transform block size, and wherein the transform matrix is one selected from a group consisting of a DCT transform matrix and an IDCT transform matrix, and transforming a residual block to generate a DCT coefficient block, wherein the offset is used to select elements of rows and columns of a DCT submatrix of the transform block size from the transform matrix.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mangesh Sadafale, Madhukar Budagavi
  • Methods and devices for determining logical to physical mapping on an integrated circuit
    Patent number: 9378848
    Abstract: Methods and devices for mapping logical addresses to physical locations on an integrated circuit die are disclosed herein. An embodiment of the method includes fabricating a die, where the die has a plurality of bits that are electrically accessible by way of logical addresses. A plurality of bits have known defects that form a predetermined fault pattern at a predetermined location on the die. The bits are tested by using the logical addresses, wherein the testing yields data as to the functionality of the bits. The test results are searched for the predetermined fault pattern. The physical locations of the defective bits constituting the predetermined fault pattern are correlated with their logical addresses based on the location of the predetermined fault pattern.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Stanton Petree Ashburn, Daniel L. Corum, Abha Singh Kasper, Harold C. Waite, Eric D. Rullan, Donald L. Plumton, Douglas A. Prinslow
  • Controllable circuits, processes and systems for functional ESD tolerance
    Patent number: 9379540
    Abstract: An electronic circuit (100) includes a first circuit (140) having an output and operable to give a warning but that has a sensitivity to an electrostatic discharge (ESD) event, a second circuit (120) that is operationally at least sometimes coupled with the output of said first circuit (140), whereby subject to some of the sensitivity, and a third circuit (240) interposed between said first circuit (140) and said second circuit (120) and operable to filter out at least one instance of an unnecessary warning so as to reduce the sensitivity to the ESD event.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Yanyang Xiao
  • Enhanced carrier sense multiple access (CSMA) protocols
    Patent number: 9379904
    Abstract: Power Line Communications (PLC) device for enhanced carrier sense multiple access (CSMA) protocols are described. The PLC device includes a modem, an AC interface and a PLC engine. The engine is configured for transmitting PLC packets over a plurality of electrical wires using a particular channel. Transmitting a normal priority packet may include attempting to access a communications channel to transmit a frame after a backoff time proportional to a randomly generated number within a contention window (CW), the CW having an initial value carried over from a previous transmission of a different frame. Additionally or alternatively, some of techniques described herein may facilitate the spreading of the time over which devices attempt to transmit packets, thereby reducing the probability of collisions using, for example, Additive Decrease Multiplicative Increase (ADMI) mechanisms.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kumaran Vijayasankar, Ramanuja Vedantham, Anand G. Dabak
  • Isolation circuits for digital communications and methods to provide isolation for digital communications
    Patent number: 9379746
    Abstract: Isolation circuits for digital communications and methods to provide isolation for digital communications are disclosed. An example isolation circuit includes an isolation barrier, a burst encoder in a first circuit, and an edge pattern detector in a second circuit. The example isolation barrier electrically isolates the first circuit from the second circuit. The example burst encoder generates a first pattern in response to receiving a rising edge on an input signal and generates a second pattern in response to receiving a falling edge on the input signal. The example edge pattern detector detects the first pattern or the second pattern received from the burst encoder via the isolation barrier, sets an output signal at a first signal level in response to detecting the first pattern, and sets the output signal at a second signal level in response to detecting the second pattern.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Bradley Allen Kramer, Mark W. Morgan, Swaminathan Sankaran
  • Method of fabricating an electronic circuit
    Patent number: 9378882
    Abstract: Circuits and methods of fabricating circuits are disclosed herein. A method of fabricating an electronic circuit includes placing an electronic component on a substrate. A ferromagnetic material is mixed into a mold compound to produce a mixed mold compound having an increased permeability over the mold compound. The mixed mold compound is applied to the substrate by way of a transfer mold process, wherein the mixed mold compound encapsulates the electronic component.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Steven Kummerl, Richard J. Saye
  • Process for forming driver for normally on III-nitride transistors to get normally-off functionality
    Patent number: 9379022
    Abstract: A semiconductor device includes a depletion mode GaN FET and an integrated driver/cascode IC. The integrated driver/cascode IC includes an enhancement mode cascoded NMOS transistor which is connected in series to a source node of the GaN FET. The integrated driver/cascode IC further includes a driver circuit which conditions a gate input signal and provides a suitable digital waveform to a gate node of the cascoded NMOS transistor. The cascoded NMOS transistor and the driver circuit are formed on a same silicon substrate.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sameer Pendharkar, Naveen Tipirneni
  • Sample adaptive offset (SAO) parameter signaling
    Patent number: 9380302
    Abstract: Techniques for signaling of sample adaptive offset (SAO) information that may reduce the coding rate for signaling such information in the compressed bit stream are provided. More specifically, techniques are provided that allow SAO information common to two or more of the color components to be signaled using one or more syntax elements (flags or indicators) representative of the common information. These techniques reduce the need to signal SAO information separately for each color component.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Woo-Shik Kim, Do-Kyoung Kwon, Minhua Zhou
  • Pixel retrieval for frame reconstruction
    Patent number: 9380314
    Abstract: A video decoder receives data representing an encoded image frame partitioned into one or more partitions. The video decoder stores the motion vector associated with each partition. For partitions of size (k*S), k being an integer, and S being the smallest allowed size for a partition, the video decoder stores (k) separate entries of a same value as the value of the motion vector of the corresponding partition. When performing motion compensation to reconstruct the encoded macro-block, such a manner of storing enables the video decoder to retrieve pixel values of best-match partitions associated with each of the corresponding ones of the one or more partitions without having to process partition information specifying the type of the partitions.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Shyam Jagannathan
  • Multichannel video port interface using no external memory
    Patent number: 9380260
    Abstract: This invention is a video line encapsulation protocol which allows multiple low definition video streams to be combined into a single super frame of high definition video data. Each super frame is formed of individual lines from plural lower definition video input signals. The high definition video frames include meta data in each line identifying the video input source, line and frame. This meta data enables the super frames to be separated into their component input signals within a video processing digital signal processor.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jason Meiners, James Nave, Xiaodong Wu, Hyunkeun Kim, Todd Hiers
  • System for transmitting information between circuits
    Patent number: 9379774
    Abstract: A system for transferring information from a first circuit to a second circuit includes first and second isolation elements coupled between the first circuit and the second circuit. A first transient filter is located on the second circuit and coupled to the first isolation element. A second transient filter is located on the second circuit and coupled to the second isolation element. A first ground is located on the first circuit, and a second ground is located on the second circuit. The first ground electrically floats relative to the second ground.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mark W. Morgan, Rajarshi Mukhopadhyay
  • WiFi USB protocol
    Patent number: 9378177
    Abstract: A wireless universal serial bus (USB) system that includes a wireless USB host, a first wireless USB device, and a second wireless USB device. The wireless USB host is configured to wirelessly transmit a beacon over a wireless USB network based on a wireless USB protocol. The first and second wireless USB devices are configured to exchange wireless packets with the wireless USB host. The beacon designates the wireless USB network address access times for the first and second wireless USB devices.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Assaf Sella, Leonardo Estevez, Nir Nitzani, Avi Baum
  • Phase detection in power line communication systems
    Patent number: 9379773
    Abstract: Phase detection between service nodes in a as “PRIME” (“PoweRline Intelligent Metering Evolution”) communications network, in which the service nodes are connected to one phase of a three-phase power distribution network. A service node joining a sub-network receives packet data units from other service nodes in the sub-network, including those that can potentially serve as a switch node to which the joining service node can register. The joining service node measures an elapsed time between a zero crossing of the AC power waveform at its phase and the start of a frame in the received packet data units. This elapsed time is compared with a similar zero crossing gap communicated by other service nodes in the packet data units, to identify the relative phases to which the two service nodes are connected.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kumaran Vijayasankar, Ramanuja Vedantham, Tarkesh Pande, Il Han Kim
  • Method of making a QFN package
    Patent number: 9379087
    Abstract: A method of making a flat no lead package including attaching a first plurality of leads in spaced apart relationship in a predetermined pattern on a tape and attaching a first die to the tape at a predetermined position within the predetermined lead pattern.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Dan Okamoto
  • Background Calibration for Digital-to-Analog Converters
    Publication number: 20160182076
    Abstract: A system and method where a comparator is operatively coupled to an output of a Digital-to-analog Converter (DAC). The DAC may comprise a single DAC core or a plurality of interleaved DAC cores. The comparator is configured to capture properties of DAC core output. A digital engine is operatively coupled to receive output of the comparator and configured to calculate a cross-correlation between comparator output and input to the DAC core(s). The digital engine may be configured to determine if the skew of each DAC core is positive or negative and to determine if a skew correction term for the DAC core(s) should be decreased or increased, based on the skew of each DAC core being positive or negative, respectively. In interleaved DAC core devices, clock frequency sampling edges of the comparator may alternate between clock edges of each of the interleaved DAC cores.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 23, 2016
    Applicant: Texas Instruments Incorporated
    Inventor: Manar Ibrahim El-Chammas
  • MULTIPHASE DC-TO-DC SWITCHING POWER CONVERTER WITH LEADING EDGE AND CROSS CHANNEL BLANKING
    Publication number: 20160181922
    Abstract: A multiphase DC-to-DC synchronous power converter, which has a number of converter channels that generate a corresponding number of current sense signals, blanks the current sense signals in a first converter channel for periods of time that correspond with the actions of the transistors in a second converter channel, where the actions result in noise spikes across the converter that falsely interfere with current sensing in the first converter channel.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Applicant: Texas Instruments Incorporated
    Inventor: Joseph Maurice Khayat