Abstract: A semiconductor device with a very high aspect ratio contact has a deep trench in the substrate. A dielectric liner is formed on sidewalls and a bottom of the deep trench. A contact opening is formed through the dielectric liner at the bottom of the deep trench to expose the substrate, leaving the dielectric liner on the sidewalls. Electrically conductive material is formed in the deep trench to provide the very high aspect ratio contact to the substrate through the contact opening.

Abstract: A dielectric wave guide (DWG) has a dielectric core member having that has a first dielectric constant value. A cladding surrounding the dielectric core member has a second dielectric constant value that is lower than the first dielectric constant. A mating end of the DWG is configured in a non-planer shape for mating with a second DWG having a matching non-planar shaped mating end.

Abstract: Apparatus and methods disclosed herein are associated with a primary side voltage and/or current regulator (PSR) in a flyback power converter. Apparatus and methods sense characteristics of a waveform generated in an auxiliary primary winding of a flyback transformer at a single terminal of the PSR. The waveform is analyzed, and error signals derived therefrom are used to maintain constant voltage and/or constant current regulation and to generate a peak current stabilization signal that is independent of line input voltage.

Abstract: A Capacitive Micromachined Ultrasonic Transducer (CMUT) device includes at least one CMUT cell including a first substrate of a single crystal material having a top side including a patterned dielectric layer thereon including a thick and a thin dielectric region, and a through-substrate via (TSV) extending a full thickness of the first substrate. The TSV is formed of the single crystal material, is electrically isolated by isolation regions in the single crystal material, and is positioned under a top side contact area of the first substrate. A membrane layer is bonded to the thick dielectric region and over the thin dielectric region to provide a movable membrane over a micro-electro-mechanical system (MEMS) cavity. A metal layer is over the top side substrate contact area and over the movable membrane including coupling of the top side substrate contact area to the movable membrane.

Abstract: A receiver is configured to use a first part of a received signal and a second part of the received signal to determine, respectively, a first estimate and a second estimate of the channel. The first and second parts carry information for decoding the received signal in a first protocol and in a second protocol, respectively. A final estimate of the channel is performed from the first and the second estimates. The final estimate is then used for decoding the data in the received signal according to one of the protocols. A carrier frequency offset from a set of symbols occurring prior to preamble symbols is determined and is corrected for decoding the preamble symbols. The corrected preamble symbols are then used for estimating the channel. In one embodiment, the carrier frequency offset is determined for the multiple antenna packet format used in the 802.11n standard.

Abstract: An integrated circuit including a plurality of internal clock generator circuits from which an internal clock is selected based on an external time reference. A number of cycles of internal clock signals from each of the internal clock generator circuits, or from at least one of those circuits where a frequency relationship is known, is counted relative to a system clock signal based on the external time reference. The lowest frequency internal clock signal providing at least a minimum number of cycles within the system clock period, the minimum number assuring completion of a function within a time constraint, is selected as the internal clock. Robust performance over a wide range of fabrication process parameters and operating conditions is assured.

Abstract: A Propagation Test instruction, a Decay Test instruction and a Cycle Test instruction provide testing of DC and AC interconnect circuits between circuits including JTAG boundary scan cells. A few additions to the Test Access Port circuitry, including gating producing a Capture Test Strobe (CTS) signal, and the boundary scan cells are required to implement the additional instructions. The instructions are extensions of the conventional JTAG operating structure.

Abstract: A DMD having an array of micromirror pixels wherein each pixel comprises a right electrode on a first side of the pixel, a left electrode on a second side of the pixel adjacent the first side and a cantilevered beam supporting a mirror. The cantilever beam tilts on two axes of translation: pitch and roll. The mirror has a first landed position (on a first and second spring tip) over the right electrode and a second landed position (on the first and a third spring tip) over the left electrode such that the first landed position and the second landed positions are 90° apart. In transitioning from the first landed position to the second landed position, the mirror maintains contact with the first spring tip while rolling from the second spring tip to the third spring tip.

Abstract: Systems and methods for implementing coexistence by requesting access to a channel in power line communications (PLC) are described. In an illustrative embodiment, a method performed by a PLC device, such as a PLC meter, may include detecting a communication from foreign PLC device on a PLC network in response to a foreign preamble received by the PLC device, determining whether a threshold back-off duration has been reached, and transmitting a channel access request in response to a determination that the threshold back-off duration has been reached.

Abstract: Digital values representing an audio signal are formed in a FM transmitter. The deviation of the amplitude of the audio signal as represented by the digital values, from a reference amplitude level, is measured. The audio signal is filtered based on the deviation measured by processing the digital values, with the filtering designed to filter different frequency components of the audio signal with different respective magnitudes. Another set of digital values representing the filtered audio signal is generated, and used to frequency modulate a carrier signal to generate a FM signal. Over-modulation of the FM signal is thereby controlled.

Abstract: A processor includes a carry save array multiplier. The carry save array multiplier includes an array of cascaded partial product generators. The array of cascaded partial product generators is configured to generate an output value as a product of two operands presented at inputs of the multiplier. The array of cascaded partial product generators is also configured to generate an output value as a sum of two operands presented at inputs of the multiplier.

Abstract: Methods and apparatus to clamp overvoltages for inductive power transfer systems are described herein. An example overvoltage protection circuit is described, including a first terminal configured to receive an alternating current signal for conversion to a second signal, a capacitor, a first switch configured to selectively electrically couple the capacitor to the first terminal based on an overvoltage detection signal to reduce an overvoltage on the second signal, and an overvoltage detector. The example overvoltage detector is configured to determine a signal level of the second signal and, in response to determining that the signal level of the second signal is greater than a threshold, to output the overvoltage detection signal to cause the switch to electrically couple the capacitor between the first terminal and a second terminal.

Abstract: The disclosure provides a flip-flop that utilizes low power as a result of reduced transistor count. The flip-flop includes a tri-state inverter that receives a flip-flop input and a clock input. A master latch is coupled to an output of the tri-state inverter and provides a control signal to the tri-state inverter. The control signal activates the tri-state inverter. A slave latch receives an output of the master latch and the control signal. An output inverter is coupled to an output of the slave latch and generates a flip-flop output.

Abstract: A thermoelectric device is disclosed which includes metal thermal terminals protruding from a top surface of an IC, connected to vertical thermally conductive conduits made of interconnect elements of the IC. Lateral thermoelectric elements are connected to the vertical conduits at one end and heatsinked to the IC substrate at the other end. The lateral thermoelectric elements are thermally isolated by interconnect dielectric materials on the top side and field oxide on the bottom side. When operated in a generator mode, the metal thermal terminals are connected to a heat source and the IC substrate is connected to a heat sink. Thermal power flows through the vertical conduits to the lateral thermoelectric elements, which generate an electrical potential. The electrical potential may be applied to a component or circuit in the IC. The thermoelectric device may be integrated into an IC without adding fabrication cost or complexity.

Abstract: Analog pulse width modulation (PWM) control circuits and techniques are presented for improving output voltage load transient response in controlling DC to DC conversion systems in which a transient detector circuit restarts a PWM carrier ramp waveform to initiate asynchronous injection of a pulse between the regular periodic PWM pulses in a fixed frequency pulse stream to mitigate the effect of output inductor energy depletion on output voltage.

Abstract: A mixed signal approach is applied to detect an output voltage condition as applied to a load. A current mode monitoring approach can be adopted and applied in discrete time using a mixed analog and digital approach. For application to various low drop-out voltage regulator situations, a sensing transistor can be connected in parallel with a feedback loop transistor of the low drop-out voltage regulator circuit to create a sensing current that is proportional to the current passing through the feedback loop transistor and thus the output current provided to the load. This sensing approach can be adapted to sense both overload and light load conditions to allow dynamic power control of the device.

Abstract: A method comprising characterizing the dimensions of structures on a semiconductor device having dimensions less than approximately 100 nanometers (nm) using one of scanning probe microscopy (SPM) or profilometry.

Abstract: Systems and methods for enabling scan testing of device-under-test (DUT) are disclosed. In an embodiment, a test system for scan testing the DUT, including P scan input ports and Q scan output ports, includes tester and adapter module. Tester operates at clock frequency F1 and includes M tester Input/Output (I/O) ports for providing M scan inputs and N tester I/O ports for receiving N scan outputs at F1. Adapter module is coupled to tester and configured to receive M scan inputs at F1 and, in response, provide P scan inputs at clock frequency F2 to P scan input ports, and to receive Q scan outputs at F2 from Q scan output ports and, in response, provide N scan outputs at F1 to N tester I/O ports, where ratio of M to P equals ratio of N to Q, and where each of M, N, P and Q are positive integers.

Abstract: PWM control circuits and soft start circuitry thereof are presented in which a source follower circuit provides an input to a pulse generator error amplifier during startup according to a lower one of an internal soft start circuit ramp signal and a voltage across and externally connected capacitor, with a current source connected to the source follower to limit the charging current supplied to the externally connected capacitor.

Abstract: Systems and methods for improved access point discoverability in multi-role multi-channel devices are described. When the multi-role multi-channel device leaves an AP role and then later returns to the AP role, such as when operating in another role, the multi-role multi-channel device sends a unicast probe response to the stations in a predetermined list. The unicast probe response is transmitted even without receiving a corresponding probe request. If one of the stations on the list is in the area and would like to connect to the AP role, it can complete the connection process using information in the response message.