Patents Assigned to Texas Instruments
  • Patent number: 7555068
    Abstract: A circuit is designed with a measurement circuit (746) coupled to receive an input signal from at least one of a first antenna and a second antenna of a transmitter. The measurement circuit produces an output signal corresponding to a magnitude of the input signal. A control circuit (726) is coupled to receive the output signal, a first reference signal (?1) and a second reference signal (?2). The control circuit is arranged to produce a control signal in response to a comparison of the output signal, the first reference signal and the second reference signal.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Anand Ganesh Dabak, Timothy M. Schmidl, Srinath Hosur
  • Patent number: 7555422
    Abstract: A system comprises a multi-core silicon-on-chip (SOC) device. The SOC device includes a core module, a test data shift path, a core power control module, and an emulation control module. The core module includes a TAP controller and a plurality of data registers. The test data shift path is operable to transport data shifted out of one or more of the data registers. The core power control module is operable to control the power status of the core module. The emulation control module includes a plurality of alternative registers operable to shift data into the test data shift path in the event that the core module is powered down by the core power control module such that the shift path continues uninterrupted. The emulation control module remains powered on regardless of the power status of the core module.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Merril R. Newman, Osvaldo Franco, Robert W. Milhaupt
  • Patent number: 7555682
    Abstract: Input processing limitations may be solved by placing two units in parallel, with each unit recording some portion of the incoming data. This requires the generation of simultaneous actions across units operating in parallel, with both the data recording and user command execution happening at the same point in the trace data stream.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Patent number: 7554517
    Abstract: A gamma reference voltage generator (10B) for an LCD display includes a control interface logic circuit (48) having an output bus coupled to inputs of a first register (46) having outputs coupled to inputs of a second register (42) the outputs of which are coupled to corresponding inputs of plurality of DACs (28). The control interface logic circuit receives gray scale codes representative of gamma reference voltages and transfers the codes via the output bus into the first register and controls further transfer of the codes to inputs of the DACs to instantaneously or rapidly update gamma correction voltages applied to the LCD display.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: David R. Baum, Frank Haupt, Jerry L. Doorenbos
  • Patent number: 7553717
    Abstract: A PMOS transistor and a method for fabricating a PMOS transistor. The method may include providing a semiconductor wafer having a PMOS transistor gate stack, source/drain extension regions, and active regions. The method may also include forming epi sidewalls, performing a ex-situ recess etch, and performing an in-situ recess etch. The ex-situ recess etch and the in-situ recess etch form recessed active regions. The PMOS transistor is formed by a method using ex-situ and in-situ etch and has epitaxial SiGe regions with a greatest width at the surface of the semiconductor wafer.
    Type: Grant
    Filed: May 11, 2007
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Srinivasan Chakravarthi, Periannan Chidambaram, Johan Weijtmans
  • Patent number: 7555086
    Abstract: Data is communicated through two separate circuits or circuit groups, each having clock and mode inputs, by sequentially reversing the role of the clock and mode inputs. The data communication circuits have data inputs, data outputs, a clock input for timing or synchronizing the data input and/or output communication, and a mode input for controlling the data input and/or output communication. A clock/mode signal connects to the clock input of one circuit and to the mode input of the other circuit. A mode/clock signal connects to the mode input of the one circuit and to the clock input of the other circuit. The role of the mode and clock signals on the mode/clock and clock/mode signals, or their reversal, selects one or the other of the data communication circuits.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Lee D. Whetsel
  • Patent number: 7555049
    Abstract: A client premises digital subscriber line (DSL) modem having multi-mode capability is disclosed. In initialization, the modem estimates whether channel conditions are such that digital processing of the received data according to a lower data rate DSL standard, such as ADSL2, may result in a higher effective data rate than receipt and processing according to a higher data rate DSL standard, such as ADSL2+. If so, the DSL modem configures itself, such as by configuring its filter characteristics and sampling frequency, to receive and process data according to the lower data rate DSL standard; the transmitting modem, for example at a central office or service area interface, may continue to operate according to the higher data rate standard (with its bit loading corresponding to a subset of subchannels). The receiving DSL modem processes the payload data according to the lower standard, while processing control messages according to the higher standard.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Murtaza Ali, Shahedolla Molla, Narasimhan Venkatraman, Channamallesh Hiremath, Umashankar S. Iyer, Udayan Dasgupta, Austin Paul Hunt, Dennis G. Mannering
  • Patent number: 7554390
    Abstract: A closed loop amplifier system comprising a modulator that provides a pulse-width modulated (PWM) output signal based on an input signal, the modulator having a variable closed loop transfer function. The system also comprises a ramp generator that provides a ramp signal to the modulator, the variable closed loop transfer function of the modulator varying as a function of the ramp signal. The system further comprises a controller that controls the ramp generator to provide the ramp signal to adjust the variable closed loop transfer function during transitions between operating states of the amplifier system.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Asit Shankar, Klaus Krogsgaard
  • Publication number: 20090161040
    Abstract: Provided is a light emitting diode (LED). The LED, in one embodiment, includes a reflective layer located over a substrate and a quarter wave plate emitter layer located over the reflective layer. The quarter wave plate emitter layer, in this embodiment, is substantially crystalline in nature, and further wherein an extra-ordinary axis of the quarter wave plate emitter layer is located in a plane thereof. The LED, in this embodiment, further includes a transmissive/reflective polarization layer located over the quarter wave plate emitter layer, wherein a transmission direction of the transmissive/reflective polarization layer is oriented at about 45 degrees with respect to the extra-ordinary axis.
    Type: Application
    Filed: December 19, 2007
    Publication date: June 25, 2009
    Applicant: Texas Instruments Incorporated
    Inventors: Sajjad A. Khan, Steven M. Penn
  • Publication number: 20090159933
    Abstract: Optimizing carrier mobilities in MOS transistors in CMOS ICs requires forming (100)-oriented silicon regions for NMOS and (110) regions for PMOS. Methods such as amorphization and templated recrystallization (ATR) have disadvantages for fabrication of deep submicron CMOS. This invention is a method of forming an integrated circuit (IC) which has (100) and (110)-oriented regions. The method forms a directly bonded silicon (DSB) layer of (110)-oriented silicon on a (100)-oriented substrate. The DSB layer is removed in the NMOS regions and a (100)-oriented silicon layer is formed by selective epitaxial growth (SEG), using the substrate as the seed layer. NMOS transistors are formed on the SEG layer, while PMOS transistors are formed on the DSB layer. An integrated circuit formed with the inventive method is also disclosed.
    Type: Application
    Filed: December 24, 2008
    Publication date: June 25, 2009
    Applicant: Texas Instruments Incorporated
    Inventors: Angelo Pinto, Frank S. Johnson, Benjamin P. McKee, Shaofeng Yu
  • Publication number: 20090162037
    Abstract: A method of optimizing bandwidth of a wireless link between a display device and an image data player. The display device is configured with one or more features that affect its bandwidth capacity. This configuration results in one or more “bandwidth reduction parameters”. The display device is programmed to communicate these parameters to the player via the wireless link, so that the player can deliver device-specific image data to the display device.
    Type: Application
    Filed: March 3, 2009
    Publication date: June 25, 2009
    Applicant: Texas Instruments Incorporated
    Inventor: Mary A. Du Val
  • Publication number: 20090160410
    Abstract: A real time clock (RTC) voltage regulator, a method of regulating an RTC voltage and a power management integrated circuit (PMIC). In one embodiment, an RTC voltage regulator includes a current source configured to provide a first current and a voltage regulator having a common gate amplifier and a power device. The first current is employed to establish a reference voltage for the common gate amplifier and the common gate amplifier is configured to control the power device. The power device is configured to provide an RTC voltage for the common gate amplifier.
    Type: Application
    Filed: December 20, 2007
    Publication date: June 25, 2009
    Applicant: Texas Instruments Incorporated
    Inventors: Mohammad A. Al-Shyoukh, Marcus M. Martins, Dircere Martins
  • Publication number: 20090160493
    Abstract: A circuit for, and method of, generating a spread-spectrum clock signal. In one embodiment, the circuit includes: (a) a modulator configured to generate a modulated control value, and (b) a frequency synthesizer coupled to the modulator and configured to generate a spread-spectrum clock signal based on a variation of the modulated control value, the frequency synthesizer having a directly-derivable frequency response output.
    Type: Application
    Filed: December 20, 2007
    Publication date: June 25, 2009
    Applicant: Texas Instruments Incorporated
    Inventors: Zhihong You, Liming Xiu
  • Publication number: 20090161410
    Abstract: The present disclosure provides a seven transistor static random access memory (7T SRAM) cell. In one embodiment, the 7T SRAM cell includes a pair of cross-coupled inverters configured to provide a memory element having first and second storage nodes. The 7T SRAM cell also includes a Read isolation transistor having a control element connected to one of the storage nodes of the cross-coupled transistor inverters and configured to provide a buffered Read output. The 7T SRAM cell further includes a Read pass gate transistor controlled by a Read word line and connected between the Read isolation transistor and a read bit line. Additionally, the 7T SRAM cell still further includes a Write pass gate transistor controlled by a Write word line and connected between one of the storage nodes of the cross-coupled inverters and a Write bit line to write either state of the memory element.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 25, 2009
    Applicant: Texas Instruments Inc.
    Inventor: Theodore W. Houston
  • Publication number: 20090164666
    Abstract: According to one embodiment of the present invention, a method for creating bit planes from frame data for a digital mirror device is disclosed including forming data elements comprising bits of equal significance from a plurality of pixel data in the frame data, the forming including using dual index direct memory address operations.
    Type: Application
    Filed: December 20, 2007
    Publication date: June 25, 2009
    Applicant: Texas Instruments Incorporated
    Inventors: James N. Malina, Leonardo W. Estevez, Gunter Schmer
  • Publication number: 20090159100
    Abstract: Mechanisms which rotate semiconductor substrates while immersed in wet chemicals are often complex due to a need to prevent leakage of the chemicals. Wear of the mechanisms necessitates replacement, entailing significant maintenance costs. A two-part semiconductor substrate roller is disclosed which consists of a rotary power coupler and an inexpensive replaceable roller component which attaches to the rotary power coupler in a simple manner. An external rotary power source turns the rotary power coupler through a mechanism that prevents leakage of the wet chemicals from the processing equipment. The replaceable roller component may be attached to the rotary power coupler by any of several mechanisms. The cost of the replaceable roller component is less than 10 percent of the cost of the rotary power coupler. A method of replacing the replaceable roller component and a method of processing semiconductor substrates using the instant invention are also disclosed.
    Type: Application
    Filed: December 24, 2008
    Publication date: June 25, 2009
    Applicant: Texas Instruments Incorporated
    Inventors: Christopher R. Frey, Tim L. Robinson
  • Publication number: 20090160059
    Abstract: One aspect of the invention provides a method of forming a semiconductor device (100). One aspect includes forming transistors (120, 125) on a semiconductor substrate (105), forming a first interlevel dielectric layer (165) over the transistors (120, 125), and forming metal interconnects (170, 175) within the first interlevel dielectric layer (165). A carbon-containing gas is used to form a silicon carbon nitride (SiCN) layer (180) over the metal interconnects (170, 175) and the first interlevel dielectric layer (165) within a deposition tool. An adhesion layer (185) is formed on the SiCN layer (180), within the deposition tool, by discontinuing a flow of the carbon-containing gas within the deposition chamber. A second interlevel dielectric layer (190) is formed over the adhesion layer (185).
    Type: Application
    Filed: December 20, 2007
    Publication date: June 25, 2009
    Applicant: Texas Instruments Incorporated
    Inventors: Ju-Ai Ruan, Sameer K. Ajmera, Changming Jin, Anand J. Reddy, Tae S. Kim
  • Patent number: 7552360
    Abstract: A system and method for sharing a communications link between multiple protocols is described that comprises a system comprising a communications interface configured to exchange information with other systems using at least one of a plurality of protocols; a protocol select register that stores a value that selects a protocol from among the plurality of protocols to become an active protocol; and a state machine accessible to the communications interface, the state machine used to control the exchange of information through the communications interface according to the active protocol. The active protocol is used by the communications interface to exchange information while the remaining protocols of the plurality of protocols remain inactive. The state machine sequences through a series of states that cause the communications interface to operate according to the active protocol, and that are designated as inert sequences under the remaining protocols.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: June 23, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Patent number: 7551701
    Abstract: Prefilters for a receiver with multiple input branches are trained in the frequency domain. The frequency response B of a conditioned channel is determined without reference to the prefilters, and the frequency response W of the prefilters is computed from the frequency response B of the conditioned channel. The prefilters suppress interference.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: June 23, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Sirikiat L. Ariyavisitakul, Manoneet Singh
  • Patent number: 7550856
    Abstract: A semiconductor assembly (300) comprising a semiconductor device (301), which has a plurality of metallic contact pads (302) and an outline by sides (303). A metallic bump (304) made of reflowable metal is attached to each of these contact pads. An electrically insulating substrate (305) has a surface with a plurality of metallic terminal pads (306) in locations matching the locations of the device contact pads, and further a plurality of grooves (310) and humps (311) distributed between the terminal pad locations, complementing the distribution of the terminal pads. Each bump is further attached to its matching terminal pad, respectively; the device is thus interconnected with the substrate and spaced apart by a gap (320). Adherent polymeric material (330) containing inorganic fillers fills the gap substantially without voids.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: June 23, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Jeremias P. Libres, Joel T. Medina, Mary C. Miller