Patents Assigned to Texas Instruments
  • Cantilevered Leadframe Support Structure for Magnetic Wireless Transfer Between Integrated Circuit Dies
    Publication number: 20150325501
    Abstract: A coupling device provides galvanic isolation using a leadframe that is configured to support two integrated circuit chips in a coplanar manner. Each chip contains an inductive coupling coil. The lead frame includes a set of bond pads for attaching bond wires to couple to the two integrated circuit chips. Two separated die attach pads support the two chips. Each die attach pad is configured to support one of the two integrated circuit chips with a plurality of cantilevered fingers.
    Type: Application
    Filed: May 12, 2014
    Publication date: November 12, 2015
    Applicant: Texas Instruments Incorporated
    Inventors: Benjamin Michael Sutton, Sreenivasan K. Koduri, Subhashish Mukherjee
  • Memory attribute sharing between differing cache levels of multilevel cache
    Patent number: 9183084
    Abstract: The level one memory controller maintains a local copy of the cacheability bit of each memory attribute register. The level two memory controller is the initiator of all configuration read/write requests from the CPU. Whenever a configuration write is made to a memory attribute register, the level one memory controller updates its local copy of the memory attribute register.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Raguram Damodaran, Joseph Raymond Michael Zbiciak, Naveen Bhoria
  • Low cost transistors
    Patent number: 9184163
    Abstract: An integrated circuit containing an analog MOS transistor has an implant mask for a well which blocks well dopants from two diluted regions at edges of the gate, but exposes a channel region to the well dopants. A thermal drive step diffuses the implanted well dopants across the two diluted regions to form a continuous well with lower doping densities in the two diluted regions. Source/drain regions are formed adjacent to and underlapping the gate by implanting source/drain dopants into the substrate adjacent to the gate using the gate as a blocking layer and subsequently annealing the substrate so that the implanted source/drain dopants provide a desired extent of underlap of the source/drain regions under the gate. Drain extension dopants and halo dopants are not implanted into the substrate adjacent to the gate.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Pinghai Hao, Sameer Pendharkar
  • Cyclic shift selection for MIMO narrowband power line communications
    Patent number: 9184794
    Abstract: A PLC network system and method operative with OFDM for generating MIMO frames with suitable preamble portions configured to provide backward compatibility with legacy PLC devices and facilitate different receiver tasks such as frame detection and symbol timing, channel estimation and automatic gain control (AGC), including robust preamble detection in the presence of impulsive noise and frequency-selective channels of the PLC network. A MIMO PLC transmitter device may selectively vary amounts of cyclic shift (CS) for different transmit phases based on whether an initial CS vector elicits an ACK signal back from a PLC receiver within a timeout period.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mostafa Sayed Ibrahim, Il Han Kim, Tarkesh Pande, Anuj Batra
  • Power line communication network and discovery process
    Patent number: 9182248
    Abstract: An apparatus for a power line communication network includes a power line transmitter/receiver, a processor coupled to the power line transmitter/receiver, and memory accessible to the processor. The processor is configured to store a routing table in the memory for routing packets in an upward direction towards a data concentrator (DC). However, no routing table is provided for routing packets in a downward direction away from the DC. Instead of using a routing table to route packets in the downward direction, the processor is configured to employ source routing in the downward direction.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ram Krishnan, Kumaran Vijayasankar, Ramanuja Vedantham Vedantham
  • Asynchronous to synchronous sampling using Akima algorithm
    Patent number: 9184761
    Abstract: A method, comprising: selecting three Two-Tuples before and three after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time difference between the asynchronous samples surrounding the selected sample, and the five linear slopes of the line segments between the three points before and the points after the selected synchronous sample point, including the slope of the selected point; evaluating the third order polynomial at the synchronous time instant; generating the synchronous ADC value based on this calculation; and using the ADC value as the desired voltage level of the synchronous sample, wherein the synchronous ADC value is generated based on this calculation.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Abhijit A. Patki, Ganesan Thiagarajan, Udayan Dasgupta
  • Dynamic medium switch in co-located PLC and RF networks
    Patent number: 9184779
    Abstract: An electronic communication device comprises a first transceiver capable of a bi-directional communication session on a first communication medium; a second transceiver capable of a bi-directional communication session on a second communication medium; and a control logic coupled to the first transceiver and the second transceiver and capable of implementing a convergence layer, wherein the control logic is configured to receive, from the first transceiver, a first signal; and cause, in response to the first signal, data received and transmitted by the first transceiver on the first communication medium as part of a communication session to be received and transmitted instead by the second transceiver on the second communication medium.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yanjun Sun, Gang Xu, Soon-Hyeok Choi, Bhadra Sandeep, Xiaolin Lu, Ariton E. Xhafa, Minghua Fu, Robert W. Liang, Susan Yim
  • Lead frame with abutment surface
    Patent number: 9184119
    Abstract: A lead frame device may include an integral die pad member, two separate finger members, a central body portion, each of the finger members have a top and a bottom surface connected by a peripheral edge surface. The lead frame also has a first ear portion, and a second ear portion, each has an ear top surface and an ear bottom surface coplanar with the top surface and bottom surface of the central body portion. The lead frame also has a first longitudinally extending groove and second longitudinally extending groove separate the first ear portion and the second ear portion from the central portion. The first ear portion and the second ear portion each have an abutment surface.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Lee Han Meng@ Eugene Lee, Sueann Lim Wei Fen, Sarel Bin Ismail
  • System and method for generating frame structure for MIMO narrowband power line communications
    Patent number: 9184967
    Abstract: A PLC network system and method operative with OFDM for generating MIMO frames with suitable preamble portions configured to provide backward compatibility with legacy PLC devices and facilitate different receiver tasks such as frame detection and symbol timing, channel estimation and automatic gain control (AGC), including robust preamble detection in the presence of impulsive noise and frequency-selective channels of the PLC network.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mostafa Sayed Ibrahim, Il Han Kim, Tarkesh Pande, Anuj Batra
  • Stacked synchronous buck converter having chip embedded in outside recess of leadframe
    Patent number: 9184121
    Abstract: A power supply system (200) has a QFN leadframe with leads and a pad (201, switch node terminal); a pad surface having a portion recessed with a depth (270) and an outline suitable for attaching a semiconductor chip. A first FET chip (220) is vertically stacked to the opposite pad surface. A clip (240) is vertically stacked on the first FET chip and tied to a lead (202, grounded output terminal). A second FET chip (210) has its source terminal attached to the recessed portion and its drain (210a, input terminal) and gate (210b) terminals co-planar with the un-recessed portion. A driver-and-controller chip (230) is attached to the clip. Packaging compound (290) encapsulates the parts but leaves a pad surface and the drain and gate terminals of the second FET chip un-encapsulated.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Osvaldo Jorge Lopez, Johathan A. Noquil
  • Mitigating the effects of signal overload in analog front-end circuits used in image sensing systems
    Patent number: 9185314
    Abstract: Output voltage of a charge-to-voltage converter used in an image sensing system is compared with one or more thresholds to determine if the output voltage exceeds predetermined threshold levels. If the output voltage exceeds one or more of the threshold levels, the input terminal of the charge-to-voltage converter is connected to a reference voltage to prevent the charge-to-voltage converter from saturating. Problems that could be caused due to overload of the voltage-to-charge converter are obviated. In an embodiment, the charge-to-voltage converter is implemented by an operational amplifier (OPAMP). A pair of comparators compares the output of the OPAMP with corresponding threshold voltages. The result of the comparison is used to generate a signal for connecting the input of the OPAMP to the reference voltage, thereby preventing saturation of the OPAMP.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rajiv Shrikant Mantri, Nagesh Surendranath
  • Embedded tungsten resistor
    Patent number: 9184226
    Abstract: A high TCR tungsten resistor on a reverse biased Schottky diode. A high TCR tungsten resistor on an unsilicided polysilicon platform geometry. A high TCR tungsten resistor between two parallel polysilicon leads on remaining contact etch stop dielectric. A high TCR tungsten resistor embedded in a intermetal dielectric layer above a lower interconnect layer and below an upper interconnect layer. A method of forming a high TCR tungsten resistor on a reverse biased Schottky diode. A method of forming high TCR tungsten resistor on an unsilicided polysilicon platform geometry. A method of forming high TCR tungsten resistor between two parallel polysilicon leads on remaining contact etch stop dielectric. A method of forming high TCR tungsten resistor embedded in a inter metal dielectric layer above a lower interconnect layer and below an upper interconnect layer.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Russell Carlton McMullan, Binu Kamblath Pushkarakshan, Subramanian J. Narayan, Swaminathan Sankaran, Keith Edmund Kunz
  • System and method for video transcoding
    Patent number: 9185421
    Abstract: A video transcoding system includes a video decoder, a video encoder, and a video interface. The video decoder is configured to decode a received video signal. The video encoder is configured to encode video data decoded from the received video signal by the video decoder. The video interface couples an output of the video decoder to an input of the video encoder and is configured to transfer video data having a first chroma subsampling ratio. The video decoder is further configured to provide video data having a second chroma subsampling ratio that includes fewer chrominance samples than the first chroma sampling ratio to the video interface, and to provide non-video information generated from decoding the received video signal to the video interface using video interface bandwidth usable based on a difference between the first chroma subsampling ratio and the second chroma subsampling ratio.
    Type: Grant
    Filed: October 1, 2012
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jian Wang, Thanh Thien Tran, Gang Hua, Ivan Garcia
  • Laser diode driver damping circuit
    Patent number: 9183873
    Abstract: A damping circuit having an input terminal and an output terminal is described. The damping circuit comprises a driver having an input and an output; an RC circuit coupled between the input terminal and the output; and a resistor coupled between the output and the output terminal, wherein the RC circuit delays passing a signal from the output terminal to the input terminal and a low impedance associated with the driver generally reduces ringing.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Douglas Warren Dean, Craig Matthew Brannon
  • Hall sensor excitation system
    Patent number: 9182453
    Abstract: A Hall plate excitation system provides reduced offset and temperature dependence. The Hall plate excitation system includes a current source, a switching network, and a controller. The current source is configured to provide an excitation current to a Hall plate. The switching network is configured to switchably connect the current source to each of a plurality of terminals of the Hall plate. The controller is configured to adjust the excitation current no more than once during each spinning cycle; and to sequentially switch the excitation current to each of the plurality of terminals of the Hall plate during each spinning cycle.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS DEUTSCHLAND GmbH
    Inventor: Caspar Petrus Laurentius van Vroonhoven
  • Nonleaded package and leadframe strip and method
    Patent number: 9184120
    Abstract: A nonleaded IC package, such as a QFN, including an encapsulation block having at least one generally flat lateral sidewall surface; and a plurality of leads, each terminating in a generally chair-shaped flat surface that is flush with the generally flat lateral sidewall surface.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Dolores Parobrob Babaran, Mark Gerald Rosario Pinlac, Ramil Alfonso Viluan
  • Fine time assistance for global navigation satellite systems
    Patent number: 9182493
    Abstract: Apparatus and method for providing fine timing assistance to global navigation satellite systems (GNSS) via wireless local area network (WLAN). In one embodiment, a method for synchronizing a global navigation satellite system (GNSS) receiver includes receiving, by a wireless device, via a wireless local area network (WLAN), fine time assistance information transmitted by an assisting device connected to the WLAN. A time value of a GNSS clock of the wireless device is adjusted based on the fine time assistance information. Based on the adjusted time value, GNSS codes of a GNSS positioning signal are acquired by the wireless device.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORAED
    Inventors: Deric Wayne Waters, Ariton E. Xhafa, Ramanuja Vedantham
  • Method and apparatus for digital predistortion for a switched mode power amplifier
    Patent number: 9184784
    Abstract: A method includes receiving an input signal and predistorting a baseband representation of the input signal at a carrier frequency and at one or more harmonic frequencies. The method also includes generating an output signal based on the predistorted baseband representation of the input signal, and transmitting the output signal to a power amplifier. Predistorting the baseband representation of the input signal at the carrier frequency could occur in parallel with predistorting the baseband representation of the input signal at the one or more harmonic frequencies.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Lei Ding, Rahmi Hezar
  • Apparatus for and method of robust packet detection and frequency offset estimation
    Patent number: 9184971
    Abstract: A novel and useful apparatus for and method of packet detection and carrier frequency offset estimation. The packet detection mechanism is robust to channels and sustains reasonable miss-detect (and false alarm) rates at low SNR values. The mechanism uses a modified combined cross correlation and delay and correlate scheme. A delay and correlate scheme is used in order to handle the effects of multipath while swapping integration and multiplication to increase cross-correlation factors resulting in improved sensitivity in low SNR conditions. Correlation is divided into multiple chains to generate a plurality of partial correlations to observe short patterns in the spread sequence resulting in improved performance in long multipath channels.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Gregory Lerner, Nir Tal, Dan Wolberg, Manoneet Singh, Yehuda Azenkot
  • Mismatch profile
    Patent number: 9184762
    Abstract: A system can include a signal image correlator receives a discrete frequency domain representation of a signal tone in an interleaved analog-to-digital (IADC) signal and an image of the signal tone in the discrete frequency domain representation of the IADC signal and determines a correlation between the signal tone and the image of the signal tone, a power of the signal tone and a power of the image of the signal tone. The system can also include a frequency domain estimator that determines an instantaneous frequency domain mismatch profile estimate based on the correlation between the signal tone and the image of the signal tone. The system can further include an averaging filter that averages the instantaneous frequency domain mismatch profile estimate over time to provide a frequency domain mismatch profile estimate.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sthanunathan Ramakrishnan, Sashidharan Venkatraman, Sreenath Narayanan Potty, Sunil Chomal, Nagarajan Viswanathan, Jawaharlal Tangudu