Abstract: A method and apparatus for controlling pre-fetching in a processor. A processor includes an execution pipeline and an instruction pre-fetch unit. The execution pipeline is configured to execute instructions. The instruction pre-fetch unit is coupled to the execution pipeline. The instruction pre-fetch unit includes instruction storage to store pre-fetched instructions, and pre-fetch control logic. The pre-fetch control logic is configured to fetch instructions from memory and store the fetched instructions in the instruction storage. The pre-fetch control logic is also configured to provide instructions stored in the instruction storage to the execution pipeline for execution. The pre-fetch control logic is further configured set a maximum number of instruction words to be pre-fetched for execution subsequent to execution of an instruction currently being executed in the instruction pipeline.

Abstract: A processor includes an execution pipeline that includes a plurality of execution stages, execution pipeline control logic, and a debug system. The execution pipeline control logic is configured to control flow of an instruction through the execution stages. The debug system includes a debug pipeline and debug pipeline control logic. The debug pipeline includes a plurality of debug stages. Each debug pipeline stage corresponds to an execution pipeline stage, and the total number of debug stages corresponds to the total number of execution stages. The debug pipeline control logic is coupled to the execution pipeline control logic. The debug pipeline control logic is configured to control flow through the debug stages of debug information associated with the instruction, and to advance the debug information into a next of the debug stages in correspondence with the execution pipeline control logic advancing the instruction into a corresponding stage of the execution pipeline.

Abstract: A method includes pulsating a magnetic field at a first location associated with an external surface of a wall containing magnetic material. The method also includes measuring at least one characteristic of the pulsating magnetic field at a second location associated with the external surface of the wall. The at least one characteristic changes based on corrosion on an internal surface the wall between the first and second locations. The magnetic field could be pulsated by applying an AC signal to a conductive coil or by vibrating a magnet. The method could also include analyzing the at least one measured characteristic to identify an amount of the corrosion and/or a change in the amount of the corrosion. Use of the internal surface the wall could be modified based on the amount or change of the corrosion. Multiple magnetic fields can be generated at multiple first locations, and the at least one characteristic can be measured at multiple second locations.

Abstract: An assembly for inspecting machine parts used in the production of semiconductor devices, such as integrated circuit (IC) dies. The assembly includes a laser scanning apparatus adapted to precisely measure predetermined parameters of the machine parts.

Abstract: A multi-level, multi-branch outphasing amplifier (20-1) includes a first branch group circuit (22-1) including a first branch circuit (11) receiving a first RF input signal (S1(t)) and first control information (S11—Ctrl=VDD) and a second branch circuit (12) receiving the first input signal and second control information (S12—Ctrl). Each of the first (11) and second (12) branch circuits includes a power amplifier. The second control information enables the second branch circuit to be switched on or off while the first branch circuit (12) remains on. A second branch group circuit (22-2) includes a third branch circuit (21) receiving a second RF input signal (S2(t)) and third control information (S21—Ctrl=VDD) and a fourth branch circuit (22) receiving the second input signal (S2(t)) and fourth control information (S22—Ctrl). Each of the third and fourth branch circuits includes a power amplifier.

Abstract: A packaged semiconductor device including a leadframe made of a first metal, the leadframe including structures with surfaces and sidewalls; capacitors attached to surface portions of the leadframe structures, the capacitors having sidewalls coplanar with structure sidewalls; the capacitors including a foil of conductive material attached to the structure surface, the conductive material having pores covered by oxide and filled with conductive polymer, the capacitors topped by electrodes made of a second metal.

Abstract: A method of quantization matrix compression in a video encoder is provided that includes preprocessing a quantization matrix by performing at least one selected from down-sampling the quantization matrix and imposing 135 degree symmetry on the quantization matrix, performing zigzag scanning on the pre-processed quantization matrix to generate a one dimensional (1D) sequence, predicting the 1D sequence to generate a residual 1D sequence, and coding the residual 1D sequence using kth order exp-Golomb coding to generate a compressed quantization matrix, wherein k?0.

Abstract: A multifunction antenna is described in which the multifunction antenna is divided into a first segment and a second segment by an impedance circuit that produces low impedance at a low frequency and high impedance at a high frequency. A high frequency radio frequency (HF-RF) signal may be transmitted or received using only the first segment of the multifunction antenna from a HF-RF transceiver by blocking the HF-RF signal from the second segment by the impedance circuit. A low frequency radio frequency (LF-RF) signal may be received using both the first segment and the second segment of the multifunction antenna by passing the LF-RF signal through the impedance circuit.

Abstract: ESD protection apparatus disclosed herein include an ESD trigger circuit to sense the occurrence of an ESD event and an ESD discharge device to provide a low impedance path to ground through which to discharge energy associated with the ESD pulse. Some embodiments also include a VDD turn-on clamp to prevent the ESD discharge device from switching to a conductive state during a VDD power-on event. Some embodiments further include a VDD glitch clamp to prevent a switching pulse triggered by a transient disruption in the VDD supply from propagating to the ESD discharge device and causing the ESD discharge device to conduct in the absence of an ESD event.

Abstract: Amplifier circuits and methods of cancelling the Miller effects in amplifiers are disclosed herein. An embodiment of an amplifier circuit includes an input and an output. An amplifier is connected between the input and the output of the circuit. A voltage source is connected to the output, wherein the voltage source output is one hundred eighty degrees out of phase with the voltage output by the amplifier, and wherein the voltage source cancels gain due to the Miller effect of a Miller capacitance between the input and output.

Abstract: A cell within cellular network includes user equipments (UEs) that transmit data to a base station (eNB). Over a period of time, not all of the UEs will have data to transmit. The UEs are tracked as a scheduled portion and an unscheduled portion, wherein a UE is included in the scheduled portion in response to receiving a scheduling request from the UE. Synchronization is maintained between the eNB and each UE in the scheduled portion by sending a timing adjustment (TA) command if needed. Synchronization is maintained between the eNB and each UE in the unscheduled portion by allocating a periodic reference signal (sync-RS) to each UE in the unscheduled portion and by sending a respective timing adjustment (TA) command if needed to each respective UE in the unscheduled portion in response to a respective sync-RS received from each UE in the unscheduled portion.

Abstract: The disclosure describes a novel method and apparatus for providing a shadow access port within a device. The shadow access port is accessed to perform operations in the device by reusing the TDI, TMS, TCK and TDO signals that are used to operate a test access port within the device. The presence and operation of the shadow access port is transparent to the presence and operation of the test access port. According to the disclosure, the shadow access port operates on the falling edge of the TCK signal while the test access port conventionally operates on the rising edge of the TCK signal.

Abstract: An apparatus is provided. Transmission line cells are formed in a first region. A first metallization layer is formed over the transmission line cells within a portion of the first region. At least a portion of the first metallization layer is electrically coupled to the plurality of transmission line cells. A second metallization layer is formed over the first metallization layer with an interconnect portion, and overlay portion, and a first balun. The interconnect portion at least partially extends into the first region, and the overlay portion is within the first region. The first balun winding is electrically coupled to the overlay portion and partially extends into a second region. The first region partially surrounds the second region. A third metallization layer is formed over the second metallization layer having a second balun winding within the second region, where the second winding is generally coaxial with the first balun winding.

Abstract: A packaged power transistor device (100) having a leadframe including a flat plate (110) and a coplanar flat strip (120) spaced from the plate, the plate having a first thickness (110a) and the strip having a second thickness (120a) smaller than the first thickness, the plate and the strip having terminals (212; 121a). A field-effect power transistor chip (210) having a third thickness (210a), a first and a second contact pad on one chip side, and a third contact pad (211) on the opposite chip side, the first pad being attached to the plate, the second pad being attached to the strip, and the third pad being coplanar with the terminals.

Abstract: With infrared (IR) sensors, repeatability and accuracy can become an issue when there are thermal gradients between the sensor and an underlying printed circuit board (PCB). Conventionally, a large thermal mass is included in the sensor packaging to reduce the effect from such thermal gradients, but this increase costs and size of the sensor. Here, however, a PCB is provided that includes an isothermal cage included therein that generally ensures that the temperature of the underlying PCB and sensor are about the same by including structural features (namely, the isothermal cage) that generally ensure that the thermal time constant for a path from a heat source to the thermopile (which is within the sensor) is approximately the same as thermal time constants for paths through the PCB.

Abstract: Accelerometers have a number of wide-ranging uses, and it is desirable to both increase their accuracy while decreasing size. Here, millimeter or sub-millimeter wavelength accelerometers are provided which has the advantage of having the high accuracy of an optical accelerometer, while being compact. Additionally, because millimeter or sub-millimeter wavelength signals are employed, cumbersome and awkward on-chip optical devices and bulky optical mediums can be avoided.

Abstract: Apparatus and method for controlling inductor current in a switch mode power supply. In one embodiment, a switch mode power supply includes an inductor, a high-side switch coupled to the inductor, a low-side switch coupled to the inductor, and a controller. The controller is coupled to at least one of the high-side switch and the low-side switch. The controller includes a first capacitor and a current source. The controller is configured to control timing of current switching to the inductor by enabling current flow through the at least one of the high-side switch and the low-side switch based on time to charge the first capacitor via the current source. The time is a function of voltage across the inductor.

Abstract: A key fob-control unit pairing device that includes a transceiver to transmit and receive signals, a memory to store a key fob identification (KFID) and a control unit identification (CUID), and a processor coupled to said transceiver and memory. The processor is to authenticate the key fob using identification (ID) authenticated key agreement protocol based on the KFID, and to transmit an encrypted CUID to the key fob.

Abstract: A rotatable coupler for dielectric wave guides is described. A first dielectric wave guide (DWG) has an interface surface at a one end of the DWG. A second DWG has a matching interface surface at an end of the second DWG. A rotatable coupling mechanism is coupled to the two DWG ends and is configured to hold the interface surface of the first DWG in axial alignment with the interface surface of the second DWG while allowing the interface surface of the first DWG to rotate axially with respect to the interface surface of the second DWG.

Abstract: The dominant frequency of a solidly mounted resonator (100/280/300/400) is substantially increased by reducing the thickness of each layer of each Bragg acoustic reflector (112/160/224/274) to have a thickness than is substantially equal to one-quarter of the wavelength of a frequency that is a higher harmonic resonant frequency of the fundamental resonant frequency of the solidly mounted resonator (100/280/300/400).