Patents Assigned to Texas Instruments
  • FILLER BANK CONTROL CIRCUIT FOR SYNCHRONOUS FIFO QUEUES AND OTHER MEMORY DEVICES
    Publication number: 20150317087
    Abstract: An apparatus includes a controller and logic circuitry. The controller is configured to generate multiple single-bit logic values. Each single-bit logic value has one of (i) a first value indicating that a data packet has been written into a memory and (ii) a second value indicating that a data packet has been read from the memory. The logic circuitry is configured to serially stack the single-bit logic values. The apparatus could further include a shift memory bank configured to store the single-bit logic values. The logic circuitry can be configured to serially stack the single-bit logic values in the shift memory bank. For example, the logic circuitry can be configured to shift the single-bit logic values in the shift memory bank in different directions and insert one single-bit logic value into the memory bank at different ends depending on whether the one logic value has the first or second value.
    Type: Application
    Filed: May 5, 2014
    Publication date: November 5, 2015
    Applicant: Texas Instruments Incorporated
    Inventors: Rakesh Yaraduyathinahalli Channabasappa, Shekhar Dinkar Patil, Rajeev Suvarna
  • CURRENT-LIMITING IN AN AMPLIFIER SYSTEM
    Publication number: 20150318831
    Abstract: One example includes an amplifier system. The system includes a gain stage configured to conduct a gain current in response to an input voltage. The system also includes a current limit stage coupled to the gain stage and being configured to one of source and sink the gain current and to define a limit amplitude of the gain current during a current limit condition. The system further includes an output stage coupled to the gain stage and configured to conduct an output current through an output node in response to the gain current, the output current having a maximum amplitude during the current limit condition that is proportional to the limit amplitude.
    Type: Application
    Filed: May 1, 2014
    Publication date: November 5, 2015
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: DAIJIRO OTANI, KEITA IKAI
  • Switched mode DCDC converter efficiency improvement by adaptive driver stage
    Patent number: 9178424
    Abstract: In a switched mode inductive DCDC converter having a first mode that conducts a first current path through an inductor and through a first switch, and a second mode that conducts a second current path through the inductor and through a second switch, a detecting component detects a parameter. The detecting component outputs a biasing signal extend the turn OFF time of one of the switches in order to decrease a voltage build up on the other switch.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: November 3, 2015
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Hans Schmeller, Erich Bayer
  • Method for detecting imperfect mounting of a rod-shaped metallic object in a metallic hollow shaft and a device
    Patent number: 9176173
    Abstract: A method for detecting an imperfect mounting of an essentially rod-shaped metallic object in a metallic hollow shaft is provided. The imperfect mounting may lead to the formation of metallic particles. The rod-shaped object is mounted electrically insulated from the hollow shaft. The electrical resistance between the rod-shaped object and the hollow shaft is measured. An alert is issued when the electrical resistance is lower than a predefined level. A device includes a spin unit with a hollow drive shaft and a nozzle mounted inside the hollow shaft. The device is configured to use the inventive method.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Wolfgang Pfeiffer, Thomas Klein
  • Cloud based adaptive learning for distributed sensors
    Patent number: 9177546
    Abstract: A low power sound recognition sensor is configured to receive an analog signal that may contain a signature sound. Sound parameter information is extracted from the analog signal and compared to a sound parameter reference stored locally with the sound recognition sensor to detect when the signature sound is received in the analog signal. A trigger signal is generated when a signature sound is detected. A portion of the extracted sound parameter information is sent to a remote training location for adaptive training when a signature sound detection error occurs. An updated sound parameter reference from the remote training location is received in response to the adaptive training.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Lin Sun, Wei Ma
  • Waveform calibration using built in self test mechanism
    Patent number: 9176188
    Abstract: A system on a chip (SoC) includes a transceiver comprising a transmitter having a power amplifier and a receiver having a signal buffer. At least one of the transmitter and receiver has a configurable portion that can be configured to produce a range of waveforms (both in waveshape as well as duty cycle). A low cost built in self test (BIST) logic is coupled to the transceiver. The BIST logic is operable to calibrate the configurable portion of the transceiver to produce a waveform that has a selected harmonic component that has an amplitude that is less than a threshold value. Current consumed by the transceiver may be dynamically reduced by selecting an optimized waveform that has low harmonic components.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sudipto Chakraborty, Jens Graul
  • Low-power offset-stored latch
    Patent number: 9178499
    Abstract: A low-power offset-stored CMOS latch includes, for example, a common current source that is arranged to provide a predetermined bias current for an offset storage phase and enable transistors that are arranged to couple a resolution bias current during a resolution period to a respective input pair device. The low-power offset-stored CMOS latch optionally includes current scaling to provide a resolution bias current that is larger than the predetermined bias current of the offset storage phase.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mahadevan Venkiteswaran, Rajavelu Thinakaran
  • Serial bus voltage compensation
    Patent number: 9176556
    Abstract: A serial bus network includes a voltage regulator, a plurality of power switches, and a voltage monitor. The voltage regulator provides power to a plurality of serial buses. Each of the serial buses provides power from the voltage regulator to a device coupled to the serial bus. Each of the power switches switches power from the voltage regulator to one of the serial buses, and includes an input terminal coupled to a voltage regulator output, and an output terminal coupled to one of the serial buses. The voltage monitor is coupled to the voltage regulator and to the output terminal of each of the power switches. The voltage monitor compares bus voltages at the output terminals of the power switches, identifies a lowest of the bus voltages, and adjusts the voltage regulator output voltage such that the identified lowest of the bus voltages is within a predetermined operational voltage range.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Weibing Jing, Jennifer (Xiaojun) Xu, Lingling Dong
  • System and method for mitigating oxide growth in a gate dielectric
    Patent number: 9177806
    Abstract: Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in oxide growth can be achieved by maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth of the gate dielectric layer between at least two sequential process steps used in the fabrication the gate dielectric structure. Maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth also improves the uniformity of nitrogen implanted in the gate dielectric.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Malcolm J. Bevan, Haowen Bu, Hiroaki Niimi, Husam N. Alshareef
  • Resonance-based single inductor output-driven DC-DC converter and method
    Patent number: 9178422
    Abstract: A resonance-based DC-DC converter for converting a DC input voltage to a first DC output voltage (VOUT1) on a output conductor (9) includes an inductor (L) having a first terminal connected to a source (2) of a DC input voltage (VIN) and a second terminal coupled to a first conductor (4) and a capacitor (CRES) having a first terminal coupled to the first conductor. A first switch (SW1) is coupled between the resonance conductor and the output conductor to conduct inductor current (IL) into the output conductor during a first phase (Phase1). A second switch (SW2) is coupled between a second terminal of the capacitor and the output conductor to conduct inductor current through the capacitor into the output conductor (9) during a second phase (Phase2).
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ranjit K. Dash, Keith E. Kunz
  • Raised source/drain MOS transistor and method of forming the transistor with an implant spacer and an epitaxial spacer
    Patent number: 9178038
    Abstract: A raised source/drain MOS transistor is formed in a process that utilizes a first sidewall spacer when implanting a semiconductor region to form the heavily-doped source region and the heavily-doped drain region of the transistor, and a second different sidewall spacer when epitaxially growing the raised source region and the raised drain region of the transistor.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Seung-Chul Song, James W. Blatchford, Kwan-Yong Lim
  • Mismatch corrector
    Patent number: 9178525
    Abstract: A mismatch corrector can include a correction path comprising a plurality of parallel branches that each includes a correction filter that applies a respective one of a plurality of time domain filter coefficients that corresponds to a function of a mismatch profile of an interleaved analog-to-digital (IADC) signal on the IADC signal. The mismatch corrector can also include a delay path that delays the IADC signal by a predetermined number of samples to provide a delayed version of the IADC signal. The mismatch corrector can further include a summer to subtract an output of each correction filter from the delayed version of the IADC signal to generate a corrected IADC signal.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sthanunathan Ramakrishnan, Sreenath Narayanan Potty
  • Packaged semiconductor device having multilevel leadframes configured as modules
    Patent number: 9177945
    Abstract: Fabricating a packaged semiconductor device provides first planar leadframe with first leads and pads having attached electronic components. The first leadframe has a set of elongated leads bent at an angle away from the plane of the first leadframe. A second planar leadframe has second leads having attached electronic components. The bent leads of the first leadframe conductively connected to the second leadframe, forming a conductively linked 3-dimensional network between components and leads in two planes.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Richard J. Saye
  • Electronic device, method and system for half duplex data transmission
    Patent number: 9179492
    Abstract: An electronic device and method for half duplex data transmission in a long range keyless entry and go system, and more specifically to an RFID transponder, a corresponding read/write (R/W) unit and methods for operating the RFID transponder and the R/W-unit. There is a first coil, a second coil and a third coil, being arranged as a three-dimensional antenna, a first capacitor, a second capacitor and a third capacitor couplable in parallel to the first coil, the second coil and the third coil, respectively, for selectively forming a first, a second and a third parallel-resonant circuit for receiving radio signals, a series-resonant circuit for transmitting radio signals and a control stage configured to either use one of the first, second or third parallel-resonant circuits for receiving radio signals or the series-resonant circuit for transmitting signals.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: November 3, 2015
    Assignees: Texas Instruments Deutschland GmbH, Texas Instruments Incorporated
    Inventors: Herbert Meier, Andreas Hagl, Jim Childers
  • Spatial light modulation display system
    Patent number: 9176316
    Abstract: An improved spatial light modulation display system includes light sources for providing red, green, and blue light. A system controller includes functionality for controlling a color balance of the red, green, and blue light. A sensor is provided for sensing light from each of the light sources. The controller can detect a shift in color balance based on the intensity of light sensed by the sensor. If the sensor output indicates that the sensor is operating out of a desirable range, the spatial light modulator can modulate the light in order change the brightness of light sensed by the sensor. The modulation pattern can be varied until the sensor output is a specified value or within a specified range of values. In a preferred embodiment, the sensor is located to receive off-state light from the spatial light modulator so as to avoid obstruction of light used for displaying images.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Daniel J. Morgan, Roger S. Carver
  • Integrated primary startup bias and MOSFET driver
    Patent number: 9178434
    Abstract: Some implementations are directed to a A DC-to-DC converter that includes a power transformer having a primary side and a secondary side and a plurality of power transistors coupled to the primary side of the transformer. The converter also includes a secondary bias supply coupled to the secondary side of the transformer and a secondary side controller coupled to the secondary side of the transformer and configured to generate a feedback control signal based on a voltage level associated with the secondary side of the transformer. The secondary side controller receives operating power only from the secondary bias supply.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: November 3, 2015
    Assignee: Texas Instruments Incorporated
    Inventor: Steven J. Tumasz
  • Systems and methods for networking coding using Reed-Solomon codes
    Patent number: 9179362
    Abstract: A method for network coding includes encoding a plurality of message packets to produce a plurality of encoded packets. Each message packet and each encoded packet includes a plurality of symbols having an index and each symbol of the encoded packets is generated by applying a Reed-Solomon code to the symbols of the message packets having the same index as the symbol of the encoded packets. A length of the encoded packets is the same as a length of the message packets.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Samantha Rose Summerson, Anuj Batra, Srinath Hosur, Georgios Angelopoulos
  • Inner L-spacer for replacement gate flow
    Patent number: 9178037
    Abstract: An integrated circuit is formed by removing a sacrificial gate dielectric layer and a sacrificial gate to form a gate cavity. A conformal dielectric first liner is formed in the gate cavity and a conformal second liner is formed on the first liner. A first etch removes the second liner from the bottom of the gate cavity, leaving material of the second liner on sidewalls of the gate cavity. A second etch removes the first liner from the bottom of the gate cavity exposed by the second liner, leaving material of the first liner on the bottom of the gate cavity under the second liner on the sidewalls of the gate cavity. A third etch removes the second liner from the gate cavity, leaving an L-shaped spacers of the first liner in the gate cavity. A permanent gate dielectric layer and replacement gate are formed in the gate cavity.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Chet Vernon Lenox, Seung-Chul Song, Brian K. Kirkpatrick
  • Apparatus and method for in situ current measurement in a conductor
    Patent number: 9176203
    Abstract: Improved current sensing methods and apparatus and conductor apparatus are presented for sensing current in a bus bar or other conductor using one or more circular magnetic sensors or multiple magnetic sensors disposed on a substrate in a pattern surrounding a longitudinal path within the outer periphery of the conductor to avoid or mitigate sensed magnetic field crosstalk and to facilitate use of high sensitivity magnetic sensors at locations inside the conductor periphery in which the magnetic field is relatively small.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mikhail Valeryevich Ivanov, Siva RaghuRam Prasad Chennupati, Viola Schaffer
  • Methods for combining camera and projector functions in a single device
    Patent number: 9179112
    Abstract: Described are handheld devices with combined image capture and image projection functions. One embodiment includes modulating and capturing a light beam along the same optic path. In another embodiment, the optical components are operable to switch between projection and capture modes. In yet another embodiment, the optical components may be formed on the same semiconductor substrate thereby increasing functionality.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael T. Davis, Daniel J. Morgan, Amit K. Saha, Roger S. Carver