Patents Assigned to Texas Instruments
  • Data frame for PLC having destination address in the PHY header
    Patent number: 8929398
    Abstract: A method of powerline communications including a first node and at least a second node on a PLC channel in a PLC network. The first node sends a physical layer (PHY) data frame on the PLC channel including a preamble, PHY header, a MAC header and a MAC payload. The PHY header includes a destination address field having a destination address therein. The second node receives the data frame. The second node compares its network address to the destination address before decoding the MAC header and MAC payload, providing power savings by allowing the second node to not decode the MAC header or MAC payload if its network address does not match the destination address in the PHY header of the data frame.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: January 6, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Gang Xu, Ramanuja Vedantham, Kumaran Vijayasankar, Anand G. Dabak, Tarkesh Pande, Il Han Kim, Xiaolin Lu
  • Clock data recovery with out-of-lock detection
    Patent number: 8929500
    Abstract: The disclosed clock-data recovery architecture includes out-of-lock (including false lock) detection. Out-of-lock detection is accomplished by sampling retimed/recovered data with positive and negative edges of the received data. In example embodiments, an out-of-lock condition is determined either by detecting the occurrence of, or counting, missed edges corresponding to the failure of received data sampling to detect corresponding positive/negative edges of the retimed/recovered data.
    Type: Grant
    Filed: January 21, 2013
    Date of Patent: January 6, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Tonmoy S. Mukherjee, Arlo J. Aude
  • MOSFET with source side only stress
    Patent number: 8928047
    Abstract: An integrated circuit contains a transistor with a stress enhancement region on the source side only. In a DeMOS transistor, forming the stress enhancement region on the source side only and not forming a stress enhancement region in the drain extension increases the resistance of the drain extension region enabling formation of a DeMOS transistor with reduced area. In a MOS transistor, by forming the stress enhancement region on the source side only and eliminating the stress enhancement region from the drain side, transistor leakage is reduced and CHC reliability improved.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: January 6, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Samuel Zafar Nawaz, Shaofeng Yu, Jeffrey E. Brighton, Song Zhao
  • Low-power inverter-based differential amplifier
    Patent number: 8928406
    Abstract: A new inverter-based fully-differential amplifier is provided including one or more common-mode feedback transistors coupled to each inverter, which transistors operate in the liner region. Accordingly, due to the fully-differential nature of the new inverter-based fully-differential amplifier, the amplifier provides an improved Power Supply Rejection Ratio (PSRR), provides a reduced sensitivity to supply voltage and process or part variations, and does not require an auto-zeroing technique to be utilized, which ultimately saves power, all while utilizing the low-voltage and low-power advantages of an inverter-based design.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: January 6, 2015
    Assignee: Texas Instruments Incorporated
    Inventor: Xavier Albinet
  • Low power switching DC-DC converter and method of the same
    Patent number: 8928299
    Abstract: A low power DC-DC converter includes a converter stage coupled to an input node, and having a low side switch and a rectifier switch. A peak current detector senses a current at the low side switch and a zero current detector senses a current at the rectifier switch. It is configured to set the low side switch to a non-conductive state and the rectifier switch to a conductive state if the peak current detector detects a predetermined peak current. It is configured to set the rectifier switch to a non-conductive state if the zero current detector detects zero current at the rectifier switch. A time interval between subsequent current peaks is triggered by a charge comparator receiving an average current fed to the low side and rectifier switches from the input node and a reference current coupled to the charge comparator by a reference current source.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: January 6, 2015
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Markus Matzberger, Konrad Wagensohner, Erich Bayer
  • Reference and read OTP sensors
    Patent number: 8929121
    Abstract: The present disclosure provides a reference one time programmable (OTP) cell, wherein the reference OTP cell can generate a reference bias current in at least a programmed-on configuration; a current mirror coupled to an output of the OTP cell, wherein the current mirror includes at least two gate-coupled field effect transistors (FETs); wherein a current gain of a second of the two FETS is a fraction less than one of a first of the at least two gate-coupled FETs; a programmable OTP memory bit element (OTPMBE) coupled to an input of the current mirror; and a comparator having an input coupled to a node between the OTPMBE and the current mirror.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: January 6, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Brett Earl Forejt, David John Baldwin
  • Iterative time delay values for ultrasound beamforming
    Patent number: 8926514
    Abstract: An iterative method of computing time delay values for ultrasound receive beamforming. Sensing signals are generated by transducer elements in a transducer array which detect reflected sound waves from a target tissue region for a time sample (n) for a first focal point and at a later time sample (n+1) for a second focal point. Respective time delays are calculated for time sample (n) for sensing signals received from the transducer elements for focusing the reflected sound waves from the first focal point. For the later time sample (n+1), respective time delays are calculated for the sensing signals received from the transducer elements for focusing the reflected sound waves from the second focal point, wherein the respective time delays for time sample (n+1) are computed iteratively from the respective time delays for time sample (n).
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: January 6, 2015
    Assignee: Texas Instruments Incorporated
    Inventor: David Patrick Magee
  • Static heading detection in personal navigation device
    Patent number: 8930136
    Abstract: A personal navigation device configured to determine heading readings continuously using data from a sensor in the personal navigation device. Heading readings are selected corresponding to a periodic event. A representative heading is determined from the selected heading readings. When a portion of the selected heading readings has a value within a range of the representative heading, a static heading indicator is asserted to indicate the personal navigation device is moving in a static heading. The static heading indicator may be used to smooth an estimated trajectory of the personal navigation device.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: January 6, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Tarkesh Pande, Jaiganesh Balakrishnan, Deric Waters, Goutam Dutta, Jayawardan Janardhanan, Sthanunathan Ramakrishnan, Sandeep Rao, Karthik Ramasubramanian
  • Power integrated circuit including series-connected source substrate and drain substrate power MOSFETs
    Patent number: 8928075
    Abstract: A semiconductor device containing a high voltage MOS transistor with a drain drift region over a lower drain layer and channel regions laterally disposed at the top surface of the substrate. RESURF trenches cut through the drain drift region and body region parallel to channel current flow. The RESURF trenches have dielectric liners and electrically conductive RESURF elements on the liners. Source contact metal is disposed over the body region and source regions. A semiconductor device containing a high voltage MOS transistor with a drain drift region over a lower drain layer, and channel regions laterally disposed at the top surface of the substrate. RESURF trenches cut through the drain drift region and body region perpendicular to channel current flow. Source contact metal is disposed in a source contact trench and extended over the drain drift region to provide a field plate.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: January 6, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Christopher Boguslaw Kocon, Marie Denison, Taylor Efland
  • COMBINED INPUT STAGE FOR TRANSCONDUCTANCE AMPLIFIER HAVING GAIN LINEARITY OVER INCREASED INPUT VOLTAGE RANGE
    Publication number: 20150002222
    Abstract: First and second transconductance amplifier input stages having first and second gain characteristics, respectively, are combined. The resulting combined input stage has a third gain characteristic with a linear range that is larger than a linear range of either of the first and second gain characteristics.
    Type: Application
    Filed: June 28, 2013
    Publication date: January 1, 2015
    Applicant: Texas Instruments Incorporated
    Inventors: Sanjeev Manandhar, Gary S. Gibson
  • DYNAMIC MANAGEMENT OF WRITE-MISS BUFFER TO REDUCE WRITE-MISS TRAFFIC
    Publication number: 20150006820
    Abstract: Traffic output from a cache write-miss buffer is controlled by determining whether a predetermined condition is satisfied, and outputting an oldest entry from the buffer only in response to a determination that the predetermined condition is satisfied. Posting of a new entry to the buffer is insufficient to satisfy the predetermined condition.
    Type: Application
    Filed: August 22, 2013
    Publication date: January 1, 2015
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Naveen Bhoria, Joseph Raymond Michael Zbiciak, Raguram Damodaran, Abhijeet Ashok Chachad
  • INDUCTIVE STRUCTURES WITH REDUCED EMISSIONS AND INTERFERENCE
    Publication number: 20150004904
    Abstract: An inductive structure includes a power coil and a data coil. The data coil is substantially centered within the power coil. A first portion of the data coil conducts current in a first direction. A second portion of the data coil conducts current in a second direction opposite the first direction. The first portion of the data coil is connected at a node to the second portion of the data coil. The node is coupled to a ground.
    Type: Application
    Filed: September 13, 2013
    Publication date: January 1, 2015
    Applicant: Texas Instruments Incorporated
    Inventors: Gianpaolo Lisi, Gerard Socci, Ali Djabbari, Rajaram Subramoniam
  • COMPRESSED SCAN CHAIN DIAGNOSIS BY INTERNAL CHAIN OBSERVATION, PROCESSES, CIRCUITS, DEVICES AND SYSTEMS
    Publication number: 20150006987
    Abstract: Electronic scan circuitry includes a decompressor (510), a plurality of scan chains (520.i) fed by the decompressor (510), a scan circuit (502, 504) coupled to the plurality of scan chains (520.i) to scan them in and out, a masking circuit (590) fed by the scan chains (520.i), and a scannable masking qualification circuit (550, 560, 580) coupled to the masking circuit (590), the masking qualification circuit (550, 560, 580) scannable by scan-in of bits by the decompressor (510) along with scan-in of the scan chains (520.i), and the scannable masking qualification circuit (550, 560, 580) operable to hold such scanned-in bits upon scan-out of the scan chains through the masking circuit (590). Other scan circuitry, processes, circuits, devices and systems are also disclosed.
    Type: Application
    Filed: September 16, 2014
    Publication date: January 1, 2015
    Applicant: Texas Instruments Incorporated
    Inventors: Prakash Narayanan, Arvind Jain, Sundarrajan Subramanian, Rubin A. Parekhji
  • Controlled on-time buck PFC
    Patent number: 8922189
    Abstract: An apparatus for generating an output voltage from an input voltage is provided. The apparatus comprises a switch that receives the input voltage, an inductor that is coupled to the switch, a capacitor coupled to the inductor with the output voltage being output from a node between the inductor and the capacitor, a measuring circuit that receives and measures the input voltage, and a controller that is coupled to the switch and to the measuring circuit. Additionally, the controller receives the measured input voltage and calculates an on-time for the switch based on the measured input voltage and actuates the switch for the on-time.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: December 30, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Robert A. Neidorff, Bing Lu
  • Wireless communications system with secondary synchronization code based on values in primary synchronization code
    Patent number: 8923362
    Abstract: A wireless communication system. The system comprises transmitter circuitry (BST1), the transmitter circuitry comprising encoder circuitry (50) for transmitting a plurality of frames (FR). Each of the plurality of frames comprises a primary synchronization code (PCS) and a second synchronization code (SSC). The encoder circuitry comprises of circuitry (501) for providing the primary synchronization code in response to a first sequence (32). The encoder circuitry further comprises circuitry (502) for providing the secondary synchronization code in response to a second sequence (54) and a third sequence (56). The second sequence is selected from a plurality of sequences. Each of the plurality of sequences is orthogonal with respect to all other sequences. The third sequence is a subset of bits from the first sequence.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: December 30, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Anand G. Dabak, Sundararajan Sriram, Srinath Hosur
  • Synchronizer and buffers delaying strobe to individual parallel scan paths
    Patent number: 8924804
    Abstract: Functional circuits and cores of circuits are tested on integrated circuits using scan paths. Using parallel scan distributor and collector circuits for these scan paths improves test access of circuits and cores embedded within ICs and reduces the IC's power consumption during scan testing. A controller for the distributor and collector circuits includes a test control register, a test control state machine and a multiplexer. These test circuits can be connected in a hierarchy or in parallel. A conventional test access port or TAP can be modified to work with the disclosed test circuits.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: December 30, 2014
    Assignee: Texas Instruments Incorporated
    Inventor: Lee D. Whetsel
  • RFID transponder and method for operating the same
    Patent number: 8923791
    Abstract: An RFID transponder having an analog front end receiver having an attenuator coupled to receive an RF-signal from an antenna and to attenuate the RF-signal, an amplifier having a fixed amplifier gain and being coupled to receive and to amplify the attenuated RF-signal and a control unit coupled to control a gain of the attenuator, wherein the control unit is configured to control the attenuator gain in response to a level of the amplified RF-signal, the control unit is configured to have a plurality of predetermined states causing the attenuator to increase (step-up) or to decrease (step-down), its gain by a predefined step size.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: December 30, 2014
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Ernst Muellner, Carlo Peschke
  • Cancellation of products generated by harmonics of a square wave used in square-wave mixing
    Patent number: 8920326
    Abstract: A mixer circuit includes three square wave mixers and a combiner. A first square wave mixer in the circuit multiplies an input signal with a first square wave. A second square wave mixer and a third square wave mixer in the circuit each multiplies the input signal with a second square wave and a third square wave respectively. The second and third square waves have a same frequency as the first square wave, but phases that respectively lead and lag the phase of the first square wave by a first value. The combiner adds the outputs of the mixers. A low-pass filter external to the mixer circuit filters the sum generated by the combiner to generate a filtered output. In an embodiment, the first value equals forty five degrees, and the filtered output is rendered free of products generated by third and fifth harmonics of the first square wave square.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: December 30, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Vajeed Nimran P A, Shabbir Amjhera Wala, Shagun Dusad, Sandeep Oswal, Visvesvaraya Appala Pentakota
  • Electronic device and method for kickback noise reduction of switched capacitive loads and method of operating the electronic device
    Patent number: 8922267
    Abstract: An electronic device which includes a first stage having an input capacitance, a switch, a buffer and a second stage having an input sensitive to charge injection and/or voltage glitches. An input of the buffer and the input of the second stage are coupled together at a first node which is configured to be coupled to a voltage source for supplying a reference voltage to the input of the first stage having the input capacitance. In a first configuration of the switch, the switch is arranged to either connect the input of the first stage to the first node and to disconnect the input of the first stage from an output of the buffer. In a second configuration of the switch, to connect the input of the first stage to the output of the buffer and to disconnect the input of the first stage from the first node.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: December 30, 2014
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Carlo Peschke, Ernst Muellner
  • Method and apparatus for transcoding audio data
    Patent number: 8924207
    Abstract: A method and apparatus for transcoding audio data. The method includes determining if AAC joint stereo exists, running a reference AC-3 rematrixing when the AAC joint stereo does not exist, when AAC joint stereo does exist, enabling rematrixing when the number of corresponding AAC bands is greater than half the size of the band, otherwise, running reference AC-3 rematrixing.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: December 30, 2014
    Assignee: Texas Instruments Incorporated
    Inventor: Mohamed Farouk Mansour