Abstract: A method (200) of forming an isolation structure is disclosed, and includes forming an isolation trench in a semiconductor body (214) associated with an isolation region, and filling a bottom portion of the isolation trench with an implant masking material (216). An angled ion implant is performed into the isolation trench (218) after having the bottom portion thereof filled with the implant masking material, thereby forming a threshold voltage compensation region in the semiconductor body. Subsequently, the isolation trench is filled with a dielectric material (220).
Type:
Grant
Filed:
July 27, 2004
Date of Patent:
May 16, 2006
Assignee:
Texas Instruments Incorporated
Inventors:
Amitava Chatterjee, Alwin Tsao, Manuel Quevedo-Lopez, Jong Yoon, Shaoping Tang
Abstract: An automated teller machine (ATM), a personal wireless device (PWD) and methods of transferring funds therebetween. In one embodiment, the ATM includes (1) a user interface configured to receive direct input from a user, (2) a personal wireless device (PWD) authenticator associated with the user interface and configured to authenticate a PWD based on a unique identification code contained therein and (3) an order transmitter associated with the PWD authenticator and configured to employ the direct input to transmit an electronic funds transfer order to the PWD.
Abstract: A system and method for securing the initialization of a Smartcard controller and a Smartcard terminal incorporating the system or the method. In one embodiment, the system includes: (1) a firmware loader associated with a Smartcard controller and configured to receive and authenticate firmware and provide an associated Smartcard driver digital signature and (2) a Smartcard driver associated with the Smartcard controller and configured to be authenticated using the Smartcard driver digital signature and authenticate the firmware.
Type:
Application
Filed:
November 10, 2004
Publication date:
May 11, 2006
Applicant:
Texas Instruments, Incorporated
Inventors:
Daniel Castillo, Keith Mowery, Cheng Xu
Abstract: A substrate via pod structure providing reliable connectivity in array package devices. The reliability is attained by providing a protruding metal stud in the via area, with the stud being connected to a conductive metal trace (which provides conductive path to a bond pad of an integrated circuit). Due to the presence of the metal stud, increased area of contact is obtained between a solder ball and the conductive metal trace. In an embodiment, the stud contains a well surrounded by protruding portions. The slopes of the protruding portions lead to enhanced resistance in different directions to various cohesive forces that would be present during mounting operations, thereby avoiding solder ball cracking problems.
Abstract: An SRAM device a method of placing a portion of memory cells of an SRAM device in an active mode. In one embodiment, the SRAM device includes (1) a set of memory cells and (2) biasing circuitry, coupled to the set, configured to bias a subset of the set based on a memory address associated therewith.
Abstract: A video correction system and method are disclosed that provide video correction for an input signal. The system includes a logarithmic converter that creates a logarithmic representation of the input signal. A configurable corrector/converter comprises a plurality of associated components operative to process the logarithmic representation of the input signal. The configurable corrector/converter produces an output signal having at least one desirable signal characteristic. A switch control selects a configuration for the corrector/converter. The configuration indicates at least one of the plurality of associated components that will process the logarithmic representation.
Type:
Grant
Filed:
June 30, 2003
Date of Patent:
May 9, 2006
Assignee:
Texas Instruments Incorporated
Inventors:
Towfique Haider, Walter H. Demmer, Bart DeCanne
Abstract: In one embodiment, an integrated differential isolation loss detector is disclosed that generates a first temperature that is a function of a high side current and a second temperature that is a function of a low side current. A temperature sensor senses the difference between the first and second temperatures and provides an output signal that is indicative of the magnitude and the polarity of the sensed difference. A controller receives the output signal and if the difference is greater than a predetermined magnitude the high side current, the low side current, or both can be disconnected from the load. In another embodiment, an integrated differential isolation loss detector is disclosed that includes a first temperature difference generator that generates first and second temperatures where the difference between the first and second temperatures is a function of the magnitude of the high side current.
Abstract: A handheld computing device includes a display screen, a main housing portion, a removable case, and a stand member. The main housing retains the display screen. The removable case is adapted to slidably fit over at least part of the main housing. The stand member is pivotably coupled to the case. The stand member, the case, and the main housing are configured so that the main housing may be retained at a tilt angle relative to a surface by the stand member and the case when the case is laying on the surface and when the stand member is pivoted relative to the case to form a stand angle between the stand member and the case. Preferably, the handheld computing device is a system adapted to have a storage configuration, a laying usage configuration, and a tilted usage configuration. The handheld computing device may be a graphing calculator, for example.
Abstract: A synchronizer circuit which synchronizes an input clock signal to a sampling clock to generate a synchronized signal. In an embodiment, an adaptive module detects the occurrence of a positive edge in an input clock signal after a logic low corresponding to a prior negative edge is propagated to as a synchronized signal, and provides a logic high as an input to a sampling module. The sampling module propagates the signal led at the input as the synchronized signal. The adaptive module causing the input to remain at logic high at least until the synchronization module provides logic level as the synchronized signal. The negative edges in the input signal may also be processed similarly.
Abstract: A method for treating an area of a semiconductor wafer surface with a laser for reducing stress concentrations is disclosed. The wafer treatment method discloses treating an area of a wafer surface with a laser beam, wherein the treated area is ablated or melted by the beam and re-solidifies into a more planar profile, thereby reducing areas of stress concentration and stress risers that contribute to cracking and chipping during wafer singulation. Preferably, the treated area has a width less than that of a scribe street, but wider than the kerf created by a wafer dicing blade. Consequently, when the wafer is singulated, the dicing blade will preferably saw through treated areas only. It will be understood that the method of the preferred embodiments may be used to treat other areas of stress concentration and surface discontinuities on the wafer, as desired.
Abstract: An output stage circuit is configured for enabling an output of an amplifier circuit to be pulled upwards and/or downwards to or beyond an upper power supply or below a lower power supply. The exemplary output stage circuit comprises a pair of output transistors configured to provide an output voltage, and a controlled resistive circuit. The controlled resistive element is configured to enhance the gain of the output stage circuit by modifying the dynamic impedance effect of the upper output transistor during pull-up operation, or the lower output transistor during pull-down operation. During normal operation, the controlled resistive element operates with low resistance, e.g., acts as a “short,” but during the pull-up or pull-down operation the controlled resistive element can be configured to add resistance to modify the dynamic impedance of the upper or lower output transistor.
Abstract: Estimating current density parameters on signal leads of an integrated circuit using computer aided design (CAD) tools. The signal leads are modeled as an impedance network (e.g., containing resistors and capacitors) and the driver cells are modeled as triangle (current) signal. The parameters of the triangle signal (e.g. peaks, periodicity) may be determined based on the characterization data of corresponding driver cell. By measuring the signals transferred on the impedances, the current density parameters on signal leads may be estimated.
Type:
Grant
Filed:
July 8, 2003
Date of Patent:
May 9, 2006
Assignee:
Texas Instruments Incorporated
Inventors:
Ananth G Somayaji, Sugandhini Karunanidhi
Abstract: The present invention is directed to a material handling system (100) and method (200) for isolating a carrier mechanism (110) from the system. The system (100) comprises a track (103) having a channel (105), a turntable (115), and a carrier mechanism (110) coupled to the track structure via the channel. The system (100) further comprises a maintenance station (125), comprising a stub track (130), wherein the stub track is operably coupled to the track structure (103) via the turntable (115). The maintenance station (125) further comprises a power supply (135) and one or more connectors (140) operable to electrically couple the carrier (110) to the power supply (135). One or more stop blocks (145) are provided which are removably coupled to the stub track (130), wherein the stop blocks each comprise a body (155) having a rod (160) extending therefrom.
Type:
Grant
Filed:
October 12, 2005
Date of Patent:
May 9, 2006
Assignee:
Texas Instruments Incorporated
Inventors:
Richard J. Davis, Leonard Paul Siemantel
Abstract: Emulation information indicative of internal operations of a data processor can be provided for use by an apparatus external to the data processor. A stream of emulation trace information indicative of data processing operations performed by the data processor is provided. A stream of timing information indicative of operation of a clock used by the data processor to perform data processing operations is also provided. The trace stream and the timing stream have inserted therein information indicative of a temporal relationship between the trace information and the timing information.
Abstract: A media player permits multiple compressed media files to be concurrently stored in memory interval to the media player. By concurrently buffering more than one compressed media file at a time, any mechanical disturbance that occurs during the playing of a file or between files will not cause a cessation of audio. Further, skipping ahead or in reverse is advantageously expedited.
Type:
Grant
Filed:
September 27, 2002
Date of Patent:
May 9, 2006
Assignee:
Texas Instruments Incorporated
Inventors:
Thomas N. Millikan, Sreenivas Kothandaraman
Abstract: A method for attaching an integrated circuit chip to an organic substrate comprising the steps of providing an integrated circuit chip having an active and a passive surface, said active surface including a protective polymer layer; activating said polymer layer by exposing it to reactive ion etching plasma, thereby increasing the surface roughness and imparting affinity to adhesion; providing an electrically insulating substrate having first and second surfaces; and contacting said second surface of said substrate to said activated polymer layer on said chip, whereby strong adhesion is exerted at the interface between said layer and said substrate, directly attaching said substrate to said chip.
Abstract: A system for transmitting modern signals across a packet network with improved resistance to bursty network packet loss that includes a first and a second processor, which connect a first and second V.32 and above modem to a first and a second side of the packet network and which provide a modified V.42 error correction using a Link Access Procedure for Modems (LAPM). The first and second processors provide a local interface to the V.32 and above moderns, demodulate a first and second data stream from the corresponding V.32 modems into bits, packetize the bits for transport over the packet network according to an Internet Protocol (IP), and remodulate data streams received from a remote end. The modified V.42 error correction includes a staggered redundancy of packet data, in which the staggered redundancy attaches data from a packet n1 to a subsequent packet nL, where L>2.
Type:
Grant
Filed:
November 28, 2000
Date of Patent:
May 9, 2006
Assignee:
Texas Instruments Incorporated
Inventors:
Ted George, Erhan Guven, Frank Edward Fruth
Abstract: An ADC implemented according to an aspect of the present invention contains a non-zero bit stage followed by a zero-bit stage. The non-zero bit stage generates a sub-code, which is used in generating a digital code corresponding to an input analog signal, and the zero-bit stage does not provide any such sub-codes. Such a feature may be attained by using a gain amplifier provided according to another aspect of the present invention. The gain amplifier contains a main-amplifier which operates as a zero bit stage, and is also used by the non-zero bit stage. The same capacitance value may be maintained between the input terminal and output terminal of the main-amplifier to implement the zero bit stage, which enables the main-amplifier to be implemented with a low gain.
Type:
Grant
Filed:
November 4, 2004
Date of Patent:
May 9, 2006
Assignee:
Texas Instruments Incorporated
Inventors:
Vineet Mishra, Visvesvaraya A. Pentakota
Abstract: A method of initializing an ITU Recommendation G.729 Annex B compliant voice activity detection (VAD) device is disclosed, having the steps of (1) determining a first set of running average background noise characteristics in accordance with Recommendation G.729B; (2) determining a second set of running average background noise characteristics; and (3) substituting the second set of running average background noise characteristics for the first set when a specific event occurs. The specific event is a divergence between the first and second sets of running average background noise characteristics.
Abstract: The memory array contains two layers representing word lines of different rows. Each row contains multiple bit cells sharing the same word line. The two layers are stacked one on top of another to form a high density memory array.
Type:
Grant
Filed:
November 21, 2003
Date of Patent:
May 9, 2006
Assignee:
Texas Instruments Incorporated
Inventors:
Suresh Balasuramanian, Stephen Wayne Spriggs, George Jamison, Mohan Mishra