Abstract: Damascene methods for forming copper conductors (30, 130) are disclosed. According to the disclosed method, a dual cap layer (18, 20; 122, 124) is formed over an organosilicate glass insulating layer (16; 116, 120) prior to the etching of a via or trench toward an underlying conductor (12; 112). The dual cap layer includes a layer of silicon carbide (18; 124) and a layer of silicon nitride (20; 122). The silicon carbide layer (18; 124) and silicon nitride layer (20; 122) can be deposited in either order relative to one another. The silicon carbide layer (18; 124) maintains the critical dimension of the via or trench as it is etched through the insulating layer (16; 116, 120), while the silicon nitride layer (20; 122) inhibits the failure mechanism of resist poisoning. The method is applicable to single damascene processes, but may also be used in dual damascene copper processes.

Abstract: Maintaining synchronization when sending/receiving multiple channels of data with a corresponding common reference clock signal. Synchronization signals (e.g., pulses) are generated periodically and the timing of channels is adjusted. In an embodiment, multiple sequences of parallel data elements are received on corresponding parallel data channels using a first common clock signal. Each sequence of parallel data elements is converted to a corresponding sequence of serial data elements. The serial data elements are transmitted on a corresponding serial channel using a serial clock as a common reference. A synchronization signal may be generated periodically with a time period of (the number of bits in each parallel data element x the time period of the serial clock), wherein ‘x’ represents multiplication operation. As the parallel data channels are synchronized in short intervals, synchronization is maintained.

Abstract: An operational amplifier is configured for low voltage operation and better compliance. An exemplary operational amplifier comprises a folded-cascode amplifier with a class-AB biased output stage configured for low voltage operation. The exemplary output stage includes a class-AB control loop being controlled for the upper output device, and with the complementary, lower output device being driven through an additional gain configuration to allow for the necessary compliance voltage. In addition, the lower output device can be configured to operate with a low gate-source voltage.

Abstract: Reducing leakage current when a circuit contains a series of CMOS transistors. The probability that each input signal (connecting to the gate terminal of the corresponding CMOS transistor) will be at a logical value which turns off the corresponding CMOS transistor is determined. A CMOS transistor with a high threshold voltage may be connected to receive an input signal with a high probability to reduce the aggregate leakage current in the circuit. The approach may be used in any environments such as synthesis tools and also manual design methodologies.

Abstract: A reconfigurable chip level equalizer having circuitry that restores signal orthogonality and eliminates channel interference for a wireless transmitted signal. In at least some embodiments, the reconfigurable chip level equalizer comprises two or more adaptive equalizers, a plurality of operational blocks that interconnect the two or more adaptive equalizers, and a control mechanism that configures the two or more adaptive equalizers and operational blocks according to different signal delay profiles.

Abstract: A method of analyzing a MEMS device having micromirrors. A laser is targeted on one or more mirror elements and used to remove only the mirror. Once the mirror is removed, the underlying structure can be observed in operation, measured, elementally analyzed, or undergo other types of analysis.

Abstract: A method of reducing ringing artifacts in image data that has been filtered with a high frequency emphasis filter. For each filtered data value, a local variance is calculated from data values at neighboring filter taps. This variance is compared to a threshold, and if the threshold is exceeded, the filtered data value is limited between local minimum and maximum values. A method of reducing noise, also using the local variance, is also described.

Abstract: A method of detecting both linear and non linear noise in video data. Linear noise is detected on a line-by-line basis, by blocks within each line. Non linear noise is detected during horizontal blanking periods. The method provides a noise floor value for linear noise and an impulse noise flag for non linear noise, both of which are delivered to a noise reduction filter.

Abstract: A digital micromirror device (DMD) modified for use as a temporal light modulator. The DMD is modified so that the mirrors of the DMD have a preferential tilt direction. The inputs and outputs of the DMD are connected to common ground, except for the bias input lines. The latter are connected to a common excitation input, which is used to cyclically reposition the mirrors between tilted and flat states.

Abstract: A method for creating electrical interconnects between a semiconductor die and package. In the preferred embodiment, an insulating material is applied over the die and extends to the substrate contact pads, leaving a portion of each contact pad exposed. Holes are then trimmed through the insulating material, exposing at least a portion of each die bond pad. A conductive material is then applied over the die, flowing into the holes, contacting the die bond pads, and extending out to contact at least a portion of each substrate contact pad. In another preferred embodiment, an electrically conductive bump may be formed on each die bond pad, protruding through said non-conductive material and at least partially through said conductive material. The conductive layer is then laser trimmed, forming conductive patches that serve as electrical interconnects between the die and package substrate.

Abstract: A current interrupter (10, 10′) includes bimetallic member (18) as a switching member having a formed portion (18a) providing snap action movement between oppositely dished configurations. An integrally formed extended length portion (18b) having a stiffening feature extends from the formed portion and mounts a movable contact at its free end. Stiffening feature embodiments include folded opposed marginal edges and one or more longitudinally extending ribs formed in the extended length portion. In one embodiment, the bimetallic member is cantilever mounted in a housing member (14). In another embodiment, a bimetallic member (18D) has first and second extended length portions (18b) extending from opposite sides of a formed portion to provide a circuit interrupter with a double break system.

Abstract: A digital audio dynamic range compressor includes a root mean square estimator receiving first and second audio input samples and generating root mean square values of the samples. A gain calculator receives the root mean square values and computes a gain for each input sample in the linear domain, not in the logarithmic or dB domain. A minimum selector receives the computed gain of each input sample and determines a minimum. An attack and release filter receives the minimum gain value and filters the minimum gain value according to attack and release coefficients and generate a gain output. A multiplier receives the gain output and multiplies the first and second audio input samples with the gain output.

Abstract: A process (111,101) of sending packets of real-time information at a sender (311) includes steps of initially generating at the sender the packets of real-time information with a source rate (s11) greater than zero kilobits per second, and a time or path or combined time/path diversity rate (d11), the amount of diversity (d11) initially being at least zero kilobits per second. The process sends the packets, thereby resulting in a quality of service QoS, and optionally obtains at the sender (311) a measure of the QoS. Rate/diversity adaptation decision may be performed at receiver (361′) instead. Another step compares the QoS with a threshold of acceptability (Th1), and when the QoS is on an unacceptable side of said threshold (Th1) increases the diversity rate (d11 to d22) and sends not only additional ones of the packets of real-time information but also sends diversity packets at the diversity rate as increased (d22).

Abstract: A method and apparatus for enabling z-axis offset of narrow metal ties straps in lead frames used for packaging integrated circuits to prevent bowing or distortion. Simultaneous offsetting of the tie strap and stress relief mechanisms are provided on both the front and back sides of the lead frame. Those mechanisms include indentations along the long or primary axis of each tie strap, coupled with depressions across the top surface both at the center of the lead frame and between the base of the off set and the chip attach locations to prevent bowing in small pad and no pad lead frames, in particular.

Abstract: The method of secure computing concerns the security of a debugger/emulator tool commonly employed in program development. A private encryption key is used to encrypt at least verification token for the program. A public decryption key corresponding to the private encryption key is stored at the secure computing system. Upon each initialization of the debugger/emulator the secure computer system decrypts the verification token employing public decryption key. This indicates whether the program is secure or nonsecure. If the program is secure, then the debugger/emulator is operated in a process mode permitting access to the program while prohibiting access to at least one security feature. If the program is nonsecure, then the debugger/emulator is operated in a raw mode permitting access to all features of the secure computing system.

Abstract: The method maps at least one intermediate data register of a first data width into the address space of the computer bus. The computer bus writes data to an intermediate data registers with write strobes corresponding to data subsets of a second smaller data width equal to the data width of the device registers. The IDE controller then transfers data from the intermediate data register to the device registers in subsets of the device register data width in a fixed order of device registers. Similarly, for reads of the device register, the computer bus writes data to a read selection data field of an intermediate data register. Each bit of the read selection data field corresponding to one device register. The IDE controller transfers data from the device registers corresponding to bits of the read selection data field having a predetermined first digital state to an intermediate data register in a fixed read order of device registers.

Abstract: A data processing system is provided with a digital signal processor which has an instruction for shifting a source operand in response to a signed shift count value and storing the shifted result in a selected destination register. A first 32-bit operand (600) is treated as a signed shift value that has a sign and a shift count value. A second operand (602) is shifted by an amount according to the shift count value and in a direction according to the sign of the shift count. One instruction is provided that performs a right shift for a positive shift count and a left shift for a negative shift count, and another instruction is provided performs a left shift for a positive shift count and a right shift for a negative shift count. If the shift count value is greater than 31, then the shift is limited to 31.

Abstract: Methods and apparatus are disclosed for selectively coupling sense amps with local IO lines in memory devices, comprising first and second selection systems operable to selectively couple a sense amp terminal with a local IO line. A first selection system is coupled with a local IO line and a sense amp, providing selective coupling thereof a second time period after the sense amp is enabled. A second selection system is coupled with the local IO line and the sense amp, which couples the local IO line with the sense amp a first time period before the sense amp is enabled during a write operation, wherein the first time period may be zero.

Abstract: An improved method for pick and place equipment operation is provided by an improved method for identifying the reference die on a wafer. A recording of good die, partial die, mirror die, and partial mirror die information about the neighboring dies about the reference die is formed by recording step is performed by starting at the reference die and moving clockwise about the reference die one die at a time to form a stored neighborhood matrix. Searching and identifying the reference die on a wafer includes aligning the wafer table with a wafer thereon at the reference die location coordinates determined by the recording step and starting at this location moving the wafer table one die at a time about the aligned reference die recording the neighboring die or partial die as full good die, partial die, mirror die, or partial mirror die and comparing to the information about dies or partial dies neighboring said reference die to identify the reference die.

Abstract: A printer controller in which the image data received in indexed format is stored only in indexed format. The image data is converted to long format when required for rendering operations by using an appropriate lookup table. By storing the image data only in indexed format until the time of rendering, the memory requirements within a system may be minimized. According to another aspect of the present invention, floating point operations (providing higher precision) may be used in a interpreter block and fixed point operations (providing more speed) may be used in a rendering block, while avoiding/reducing image artifacts in upscaled images. A check is performed to determine whether a pixel in the upscaled image maps back to fall within the boundary of the source image, and corrective action is taken if the pixel does not fall within the boundary.