Patents Assigned to Texas Instruments
  • Method to switch MOSFETs using recycled, parasitic energy
    Patent number: 6285173
    Abstract: An energy efficient gate drive technique for binary push-pull MOSFET switching systems having a common switch node with inductive and capacitive elements connected to this common switch node. These energy storage elements on the common switch node can be parasitic in nature or discrete components. This technique recycles otherwise lost PMOS gate drive energy through the switch node, as a storage element, to the NMOS output FET.
    Type: Grant
    Filed: June 6, 2000
    Date of Patent: September 4, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Ariel S. Bentolila, Sisan Shen
  • Apparatus and method for a reduced complexity tap leakage unit in a fast adaptive filter circuit
    Patent number: 6286021
    Abstract: In a fast adaptive filter unit, an update unit replaces the multiplier unit which generates a product of the filter constant, the error signal and data signal and adding this product to a previously generated coefficient with a reduced complexity unit. The reduced complexity unit determines the sign of the product and whether the product is zero or non-zero. As a result of this determination a two bit signal is generated which is used to either increment or decrement the count in a register in the counter unit. The count held by the register is the coefficient signal, the coefficient signal being updated by each additional operation. In order to prevent the register from over-flowing, a second counter applies a signal periodically to the counter unit which decrements the magnitude of coefficient signal stored in the register by one count.
    Type: Grant
    Filed: October 21, 1998
    Date of Patent: September 4, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Hiep V. Tran, Richard X. Gu
  • Optical disc apparatus with lens position detection and control
    Patent number: 6285636
    Abstract: A method of generating a lens position detection signal for optical disc apparatus. The signal is generated in a way which provides continuous position information. The signal is also independent of changes in reflectivity on the surface of the optical disc. Moreover, the signal can be calibrated for DC offset due to misalignment and changes in photo-detector output.
    Type: Grant
    Filed: January 27, 1999
    Date of Patent: September 4, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Hiok-Nam Tay, Xiuli Guo
  • Metalization outside protective overcoat for improved capacitors and inductors
    Patent number: 6284617
    Abstract: A thick layer of copper is formed on the outside the protective overcoat (PO) which protects an integrated circuit, and forms both an inductor and the upper electrode of a capacitor. Placing this layer outside the PO greatly reduces parasitic capacitances with the substrate in the devices.
    Type: Grant
    Filed: February 2, 2001
    Date of Patent: September 4, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: John P. Erdeljac, Louis Nicholas Hutter, M. Ali Khatibzadeh, John Kenneth Arch
  • High-speed clock circuit for semiconductor memory device
    Patent number: 6285625
    Abstract: A synchronous dynamic random access memory (SDRAM) (500) is disclosed. The SDRAM (500) operates in synchronism with differential clock signals (CLK and /CLK). A timing and control circuit (510) compares the complementary differential clock signals (CLK and /CLK) to generate an internal clock signal (CLKI). By comparing the differential clock signals (CLK and /CLK) to generate the internal clock signal (CLKI), the preferred embodiment can compensate for degradations in the differential clock signals (CLK and /CLK). In addition, by utilizing the internal timing signal (CLKI) the preferred embodiment does not have to employ more complex circuits that must operate in synchronism with the edges of both differential clock signals (CLK and /CLK).
    Type: Grant
    Filed: September 13, 1999
    Date of Patent: September 4, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Wilbur C. Vogley
  • Method to fabricate a semiconductor resistor in embedded flash memory application
    Patent number: 6284599
    Abstract: A method for fabricating a semiconductor resistor in embedded FLASH memory applications is described. In the method a gate stack (54) is formed on an insulating region (70) of a semiconductor substrate. The control gate (20) is removed from the gate stack (54) and electric contacts (125), (130) are formed to contact the floating gate (16) to form the resistor.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: September 4, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Freidoon Mehrad, George R. Misium, John H. MacPeak
  • Digital phase-locked loop circuit with reduced phase jitter frequency
    Patent number: 6285172
    Abstract: A digital phase-locked loop (DPLL) (22) for use in one or more integrated circuits (20) that may be combined within an electronic system is disclosed. The DPLL (22) includes a phase detector (30) that generates a shift clock and a shift direction signal responsive to a phase difference between a system clock and a feedback clock. The shift direction signal is stored in a latch (32), applied to one input of an exclusive-NOR gate (34), and to shift direction inputs (R/{overscore (L)}) of first and second digital delay lines (38, 42). The first digital delay line (38) receives the system clock and generates a delayed clock that is distributed within the integrated circuit (20) by clock distribution circuitry, and that is applied to an input of the second digital delay line (42); the second digital delay line (42) generates the feedback clock that is received by the phase detector (30).
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: September 4, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Elie Torbey
  • Nested pipelined analog-to-digital converter
    Patent number: 6285309
    Abstract: A multi-stage analog-to-digital converter (“ADC”) for converting an analog input signal to a series of digital values, each having a first plurality of bits, representing the voltage levels of the analog input signal at a corresponding series of sample times. The ADC includes a plurality of analog-to-digital converter stages connected serially in pipeline configuration. One or more of such stages includes an analog-to-digital subconverter, providing a second plurality of bits of the digital value, where the second plurality is smaller than the first plurality, the analog-to-digital subconverter including a plurality of analog-to-digital subconverter substages connected serially in pipeline configuration. Each such subconverter substages provides one or more bits of the second plurality of bits.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: September 4, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Paul C. Yu
  • Cache optimization for programming loops
    Patent number: 6282706
    Abstract: A cache memory architecture 50, which may be, for example, a set associative cache memory, has a cache controller (52) with an internal register for storing the address of the active line currently latched in the output buffer of the high speed cache data array (56) which stores the cached data values from the main memory. If a memory access request specifies an address which would be contained in the active line, the cache look-up mechanisms are disabled and the data is taken from the output buffer. The efficiency of the cache can be increased by linking a program to memory such that the number of cache lines used by one or more program loops are minimized.
    Type: Grant
    Filed: February 10, 1998
    Date of Patent: August 28, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Gerard Chauvel, Marion C. Lineberry, Matthew A. Woolsey, Michael McMahon
  • Substrate stack construction for enhanced coupling efficiency of optical couplers
    Patent number: 6282219
    Abstract: A grating (461) assisted coupling of a semiconductor waveguide to a dielectric waveguide (451) is provided with one or more reflective stacks (330, 332, 334) to enhance the coupling efficiency. The glass or dielectric core (458) may be efficiently butt-coupled to the core of an optical fiber (470). A laser and semiconductor waveguide, reflective stacks coupling grating, and dielectric waveguide are integrated on a single substrate. Further, multiple lasers (410, 420, 430, 440) with differing lasing frequencies may be integrated and their outputs grating coupled into a single dielectric waveguide (450) for wavelength division multiplexing.
    Type: Grant
    Filed: August 12, 1998
    Date of Patent: August 28, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Jerome K. Butler, Lily Y. Pang, Philip A. Congdon
  • Laser programming of CMOS semiconductor devices using make-link structure
    Patent number: 6281563
    Abstract: A CMOS semiconductor device is programmed by a laser beam which causes a PN junction in a silicon substrate to be permanently altered. This produces a leakage path between a program node and a tank region in the substrate; the program node can be an input to a transistor in a CMOS circuit, for example, so this node will always hold the transistor on or off depending whether or not it has been laser-programmed. Preferably, the tank region is of opposite type compared to the substrate, so the program node is electrically isolated from the substrate in either case.
    Type: Grant
    Filed: April 30, 1997
    Date of Patent: August 28, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Kendall Scott Wills, Paul A. Rodriguez
  • LPNP utilizing base ballast resistor
    Patent number: 6281530
    Abstract: A lateral PNP transistor (LPNP) (102) having the low resistance base buried N+ region (114) removed from below the emitter region (118). This leaves a high resistance n-well (116) below the emitter. The resistance from the center of the emitter region (118) to the N+ buried region (114) is greater than the resistance at the periphery of the emitter region (118) to the N+ buried region (114). Debiasing will occur in the center of the emitter region (118) where the parasitic base current is generated. Thus, the ratio of parasitic current to active collector current and peak beta will improve.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: August 28, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: F. Scott Johnson
  • Socket apparatus for IC packages
    Patent number: 6280219
    Abstract: A socket (10) having a base (12), an adapter (24) which has a mounting seat for a semiconductor device (100) and which is installed on the base, and a plurality of contact members (14) which are caused to engage respective terminals of the semiconductor device that has been placed on the mounting seat of the adapter. Each contact member (14) has a pair of arms (90, 130, 144) provided by the bifurcation of one end, with the other end being fixed to the base. Each contact member is caused to nip a respective terminal (102) of the semiconductor device arranged on the mounting seat at the tip portion of the pair of arms and has butting surfaces (92, 131, 148) that determine the minimum spacing distance of the tip portions of the arms on the opposing sides of each pair of arms.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: August 28, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Hideki Sano, Kiyokazu Ikeya
  • Anti-reflective coatings for spatial light modulators
    Patent number: 6282010
    Abstract: A spatial light modulator with an anti-reflective coating (ARC) 100 integrated into its structure. The manufacturing of the device is altered to include deposition of an ARC 100, and any necessary patterning and etching to allow the elements of the array to operate properly. The ARC could reside in several places of the element structure including over the addressing circuitry 26, over a middle layer 32 or on the underside of the reflective structure 10. Micromechanical spatial light modulators, as well as non-moving modulators, such as reflective and transmissive LCD modulators can use the invention.
    Type: Grant
    Filed: May 6, 1999
    Date of Patent: August 28, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Frank C. Sulzbach, Brian L. Ray, G. Sreenivas, Duane E. Carter, Henry W. Trombley, Austin L. Huang, James D. Huffman
  • Parity insertion with precoder feedback in a read channel
    Patent number: 6282690
    Abstract: A circuit for inserting a parity signal into a data stream, including a precoder circuit to precode the data stream to be written on a medium by generating a precoded data stream; a parity circuit to generate a parity signal based on said data stream at a predetermined time; and an insertion circuit to insert said parity signal into said precoded data stream.
    Type: Grant
    Filed: January 14, 1999
    Date of Patent: August 28, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Brett McClellan, Michael Leung, Leo Fu, Taehyun Jeon
  • Enhancement of markup language pages to support spoken queries
    Patent number: 6282512
    Abstract: Enhancement of hypertext pages containing graphical images is provided by extracting 102 the ALT tag from the markup language to support selection of the corresponding hypertext link by uttering the ALT tag phrase. We describe how to add a speakable phrase for images without ALT tags. The approach also applies to client image maps that can include ALT tags for individual areas. The steps include parsing to extract possible BASE tags reference and client map (MAP tag) 102, retaining any BASE tag for relative references or, if missing, creating one using the original page reference (103) and for each anchor (A tag) containing a page reference (HREF) but without link text, and using the ALT tag text as the link text (104). In the case of a missing ALT tag, creating unique link text.
    Type: Grant
    Filed: January 21, 1999
    Date of Patent: August 28, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Charles T. Hemphill
  • Server hard disk drive integrated circuit and method of operation
    Patent number: 6282045
    Abstract: A server hard disk drive integrated circuit (12) is provided for controlling the operation of a server hard disk drive (10) and for processing digital data exchanged between a client (20) and a storage media. The storage media includes a spindle motor for rotating a magnetic disk and a head actuator for positioning a read/write head. The server hard disk drive integrated circuit (12) includes a RAM (30), a disk control circuitry (24), write channel (32), a read channel (34), a servo circuit (36), a motor control circuit (40), and a DSP (26). The disk control circuitry (24) receives and stores requests provided from the client (20) and exchanges digital data with the client (20) and stores the digital data in RAM (30). The write channel (32) generates a write signal during a write operation, and the read channel (34) generates a read signal and an intermediate read signal during a read operation.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: August 28, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Kerry C. Glover
  • MOSFET single-pair differential amplifier having an adaptive biasing scheme for rail-to-rail input capability
    Patent number: 6281753
    Abstract: A single pair differential amplifier circuit (90) provides signal amplification across the full amplifier power-supply voltage range. The differential amplifier circuit (90) is coupled to the first rail (122) and the second rail (124) and has a differential input (114 and 116) for receiving a common-mode input voltage. A bias circuit (126) is coupled to the differential amplifier circuit (90) for applying a bias voltage to the differential pair of transistors (102 and 104) such that the bias circuit (126) controls the threshold voltage of the differential pair of transistors (102 and 104) in the response to the common-mode input voltage. The bias circuit (126) turns differential pair of transistors (102 and 104) on when the common-mode input voltage is in a range extending from the first supply voltage to the second supply voltage.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: August 28, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Marco Corsi, Priscilla Escobar-Bowser, Kenneth G. Maclean
  • On-chip temperature sensor and oscillator for reduced self-refresh current for dynamic random access memory
    Patent number: 6281760
    Abstract: A temperature dependent clock circuit (100) is disclosed. The clock circuit (100) includes a reference circuit (102) that provides a first group of reference signals (108) with positive temperature coefficients and a second group of reference signals (110) with negative temperature coefficients. A sample circuit (104) compares the first group of signals (108) with a second group of signals (110) and provides a group of bias signals (112) representative of the operating temperature of the clock circuit (100). A frequency controllable oscillator circuit (106) provides an output clock signal (CLK) having a frequency that is dependent upon the values of the bias signals (112).
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: August 28, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Jeffrey E. Koelling, Wah Kit Loh
  • 8V ring clamp circuit
    Patent number: 6282044
    Abstract: A clamp circuit for clamping a terminal of an H-bridge circuit. The clamp circuit is capable of being applied to a voltage in excess of 5V including 8 volts.
    Type: Grant
    Filed: April 5, 1999
    Date of Patent: August 28, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Patrick M. Teterud, Kenneth J. Maggio