Abstract: An illumination system for wire bonding at wire bonding locations which includes a first light source for directing light to the location to be illuminated along a predetermined axis, preferably normal to the wire bonding location, and a second light source having an aperture therethrough extending along the predetermined axis directing light in a pattern from around the aperture to the location to be illuminated. A portion of the light is reflectable back from the location to be illuminated through the aperture. The first light source directs light therefrom through the aperture. The light from the second light source for viewing of the lead frame comes from around the object and is diffused so that it scatters in all directions and at all angles. The amount of scattering depends upon the surface roughness at the edge of the light conductor from which the light exits the light conductor.

Abstract: A chemical mechanical polishing machine with ultrasonic vibration is disclosed. The chemical mechanical polishing machine (10) includes a movable abrasive surface (14). A wafer holder (12) holds a wafer (18) in contact with the abrasive surface (14), and a vibration generator (16) vibrates the wafer (18) during polishing. The ultrasonic vibration agitates the slurry and provides an additional degree of motion between the wafer and the abrasive surface, thereby increasing the speed and uniformity of the polishing.

Abstract: An embodiment of the instant invention is a method of forming a semiconductor device situated over a semiconductor substrate, the method comprising the steps of: forming a layer of suboxide material (layer 206 of FIG. 2a) over the substrate (substrate 202 of FIGS. 2a-2c), the suboxide material comprised of a material selected from the group consisting of: HfSiOx, ZrSiOx, LaSiOx, YSiOx, ScSiOx, and CeSiOx; and forming a structure (layer 210 of FIG. 2c) on the layer of suboxide material. In an alternative embodiment, semiconductor device is a transistor where and the structure formed on the layer of suboxide material is a gate electrode (preferably comprised of: polycrystalline silicon, tungsten, titanium, tungsten nitride, titanium nitride, platinum, aluminum, and any combination thereof).

Abstract: An open can-type stacked capacitor is fabricated by forming a conductive layer (30, 130) outwardly of a substantially uneven surface (12, 112). A step (50, 150) is formed in an outer surface (32, 132) of the conductive layer (30, 130). A base (72, 172, 202) of a first electrode (70, 170, 200) is formed by removing a predetermined thickness (66, 166) of at least part of the conductive layer (30, 130). The base (72, 172, 202) is made of a portion of the conductive layer (30, 130) underlying the step (50, 150) by the predetermined thickness (66, 166). A sidewall (74, 174) of the first electrode (70, 170, 200) is formed. A dielectric layer (80) is formed outwardly of the first electrode (70, 170, 200). A second electrode (82) of the capacitor is formed outwardly of the dielectric layer (80).

Abstract: An embodiment of the instant invention is a method of forming a first transistor having a first gate electrode and a second transistor having a second gate electrode on a semiconductor substrate, the method comprising the steps of: forming a conductive material (step 216 of FIG. 2) insulatively disposed over the semiconductor substrate, the conductive material having a work function; and altering a portion of the conductive material (step 218 of FIG. 2) so as to change the work function of the altered conductive material, the conductive material to form the first gate electrode and the altered conductive material to form the second gate electrode. Preferably, the first transistor is an NMOS device, the second transistor is a PMOS device, and the first transistor and the second transistor form a CMOS device. The conductive material is, preferably, comprised of a conductor selected from the group consisting of: Ta, Mo, Ti and any combination thereof.

Abstract: A method of measuring non-coherent electrical signals using either windowed or non-windowed digital signal processing. The method includes the steps of providing a digitized version of the non-coherent electrical signal; generating a matrix A of correlations between sine and cosine components of known correlation frequencies and sine and cosine components of signal frequencies; generating an inverse matrix A−1 of the correlation matrix; generating a second matrix B of correlations between sine and cosine components of the correlation frequencies and the digitized non-coherent electrical signal; and generation of a third matrix C which represents the measured amplitudes of the sine and cosine components of the non-coherent electrical signal.

Abstract: Responsive to an external load, an output stage (201) of an amplifier (200) in accordance with the present invention provides a current boosting scheme capable of generating a large output current while maintaining a low quiescent current. The output stage (201) includes a sink control circuit (204) coupled to the input terminal (202) for receiving the output of the input amplifier stage. A translinear loop circuit (210) is coupled to the sink control circuit (204), for receiving the sink pass-through current and for producing a source pass-through current. A current mirror circuit (222) is coupled to the translinear loop circuit (210) for receiving the source pass-through and for producing a bias current output therefrom. An output driver (230) is coupled to the current mirror circuit (222) and the sink control circuit (204), wherein the output driver (230) receives the bias output current and the sink pass-though current to provide an output current.

Abstract: A system for constructing semiconductor devices is disclosed. The system comprises a wafer (102) having semiconductor devices (104), a bevel (108), an edge (110), a frontside (111), and a backside (112). The system also has a chamber (107), and a heater (106) coupled to the interior of the chamber (107) and operable to hold and heat the wafer (102). A showerhead (114) is also coupled to the interior of the chamber (107) and is operable to introduce a precursor gas (116) containing copper over the wafer (102). A shield (118) is coupled to the interior of the chamber (107) and is operable to partially shield the bevel (108), the edge (110), and the backside (112) of the wafer (102) from the precursor gas (116). There is an opening (122) in the chamber (107) through which a reactive backside gas (124) may be introduced under the wafer (102). A method for constructing semiconductor devices is disclosed. Step one calls for placing a wafer (102) on a heater (106) in a chamber (107).

Abstract: A digital signal system (100) for determining an approximate logarithm of a value of x having a base b. The approximate logarithm includes an integer portion (i) and a decimal portion (f). The system comprises an input (12) for receiving a signal, and circuitry (18) for measuring an attribute of the signal. The attribute relates at least in part the value of x. The system further comprises circuitry (104) for identifying a bounded region within which x falls. The bounded region is one of a plurality of bounded regions, where each of the plurality of bounded regions corresponds to a different value of an integer n and is bounded on a lower side by bn and on a higher side by bn+1. Additionally, the identified bounded region identifies the integer portion of the approximate logarithm.

Abstract: Sidewall spacers extending above a silicon gate with the distance between the spacers exceeding the length of the gate are used to confine selective silicon growth of the gate and subsequent self-aligned silicidation.

Abstract: This document describes a simple modification to the traditional pipelined analog-to-digital converter (ADC) architecture that reduces the signal swing of the inter-stage amplifier by a factor of two. This is a significant advantage when low power supply voltages limit the output range of operational amplifies. The modification requires no additional hardware and produces no additional power consumption.

Abstract: An integrated circuit device (10) comprising a conductor (11) for receiving a scan data signal. The integrated circuit device further comprises a plurality of storage circuit devices (SC1 through SC4), and each of those storage circuits has a data input and a data output. A first (SC1) of the plurality of storage circuit devices is coupled to receive the scan data signal at its data input. Moreover, each of the plurality of storage circuit devices other than the first of the plurality of storage circuit devices is coupled to receive at its data input a scan data bit as output from another one of the plurality of storage circuit devices as part of the scan data signal, thereby forming a clocked scan path through the integrated circuit device. The integrated circuit device further comprises a scannable multiplexer circuit (14) having an output (24) coupled to a data input of one (e.g., SC1) of the plurality of storage circuits.

Abstract: A method for commutation of a switched reluctance motor (SRM) is disclosed that requires no rotor position sensor or detailed prior knowledge of the motor's magnetic characteristics. The apparatus and method employs a calibration routine to learn the flux-current characteristics of each SRM phase in its aligned position. From these characteristics, the flux-current characteristics at other appropriate switching angles are approximated. Commutation is accomplished by estimating the flux in an active phase and comparing the estimate to the flux approximated for the switching angle. The apparatus and method is particularly well suited for relatively heavy duty loading applications, such as a fan.

Abstract: A method for forming multiple threshold voltage integrated circuit transistors. Angled pocket type implants (80) are performed to form asymmetric regions (90) and (95). The source and drain regions (120, 121, 122, and 123) are connected such that multiple threshold voltage transistors are formed.

Abstract: In one aspect, the present invention discloses a communication device (see, for example, FIG. 5), such as a mobile unit (e.g., a cellular telephone handset) or a stationary unit (e.g., a cellular telephone base station). The communication device utilizes global positioning system (GPS) information 560 within a Doppler profile generator 540. For example, in a mobile unit, the GPS information would typically be generated at the device. A receiver 520 is coupled to the Doppler profile generator 550. The receiver 520 utilizes Doppler profile information in translating a received wireless signal into user information.

Abstract: The objective of this invention is to prevent the defects of a semiconductor chip occurring when the passivation film or oxide film is damaged by reducing the stress applied to the main plane of the semiconductor chip during the curing stage of a potting resin in an overlap type TCP semiconductor device. In overlap type TCP semiconductor device 10, an elastic film 7 is formed on insulating film 2 on the side that faces the main plane of semiconductor chip 1. The filler made of silica oxide and contained in the supplied potting resin 6 flows into the space S between semiconductor chip 1 and insulating film 2 formed by support bumps 5. As potting resin 6 cures, the volume of the resin is reduced, and the space S is also reduced. The filler with a relatively large size is sandwiched between the main plane of semiconductor chip 1 and insulating film 2 to apply stress to the chip's main plane.

Abstract: A method of operating a multiple execution unit microprocessor in a software pipelined loop is disclosed. This method executes the loop body before the pipeline is fully initialized, thus replacing prolog instructions with additional loop iterations. The method has the potential to greatly reduce prolog size for many software pipelined loops. As a further aspect of the method, the loop results are insulated from any deleterious effects of loop body execution prior to full initialization—methods for accomplishing this are disclosed, including array overallocation, conditional execution of some loop body instructions, and register initialization.

Abstract: This invention cures many inefficiencies with known scan conversion methods. This invention employs a edge array rather than a set linked list from an array of pointers equal in number to the number of scan lines. This invention thus eliminates storage of linked list pointers which in the prior art included many null pointers resulting in better memory utilization. es on-chip memory when employing a single chip microprocessor. This invention sorts the active edge table only at edge intersections and vertices, thus eliminating much unneeded sorting. This invention permits integrated clipping of a subject polygon by a clip polygon and forming trapezoids filling the clipped area by activating trapezoid formation at every vertex of either polygon and at every edge intersection. This process saves code space and computer processing time. This invention efficiently utilizes the resources of a multiprocessor integrated circuit by spawning of subtasks from a RISC type processor to one or more DSP type processors.

Abstract: A testing system includes a testing hardware subsystem which can perform testing under a plurality of testing modes. Each testing mode corresponds to the operation of a particular version of a tester. A control subsystem is coupled to the testing hardware subsystem. The control subsystem can direct the testing hardware subsystem to test under one of the plurality of testing modes at a given moment.

Abstract: A socket (1) includes a body (1a) and a cover (3). Body (1a) has a base (2) having a horizontally movable slide (4) thereon on which a BGA package can be mounted and a plurality of contact members (6) arranged on base (2) corresponding to a pattern of solder balls of the BGA package. Each of contact members (6) has a pair of spring arms (6a, 6b) which can be opened and closed in response to movement of slide (4). In one embodiment, a cover (3) is vertically movable relative to body (1a). The cover (3) has motion transfer portions (31) having a wedge shape which are engageable with tapered force receiving portions (43) of slide(4). As cover (3) is pushed down, engagement surfaces (31) of motion transfer portions (30) engage force receiving surfaces (43) of slide (4) and slide (4) moves so that arms (6a, 6b) of contact members (6) are opened. In another embodiment, the motion transfer parts (31) are provided on a head (11) which has an air suction holder for a BGA package.