Patents Assigned to Texas Instruments
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Patent number: 6236240Abstract: A single-rail input to dual-rail output conversion circuit suitable for a domino logic hold-time latch. The conversion circuit integrates the two circuit functions in the same circuit block. The circuit involves minimal circuit complexity including a single additional transistor. This circuit eliminates a problem of false output of the prior art.Type: GrantFiled: December 15, 1999Date of Patent: May 22, 2001Assignee: Texas Instruments IncorporatedInventor: Anthony M. Hill
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Patent number: 6236101Abstract: A thick layer of copper is formed on the outside the protective overcoat (PO) which protects an integrated circuit, and forms both an inductor and the upper electrode of a capacitor. Placing this layer outside the PO greatly reduces parasitic capacitances with the substrate in the devices.Type: GrantFiled: October 30, 1998Date of Patent: May 22, 2001Assignee: Texas Instruments IncorporatedInventors: John P. Erdeljac, Louis Nicholas Hutter, M. Ali Khatibzadeh, John Kenneth Arch
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Patent number: 6235581Abstract: The invention comprises a floating gate memory structure, a method for making a floating gate memory structure, and a method for forming a continuous source line in a floating gate memory structure. One aspect of the invention is a method for forming a continuous source line. A plurality of trenches and moats are formed in a semiconductor structure wherein the moats are adjacent to the trenches. A portion of each moat forms the source region of a transistor. A silicate glass layer is deposited outwardly from a semiconductor structure to form an intermediate structure. The silicate glass layer contains an n-type dopant. The intermediate structure is heated for a first period of time to dope the plurality of trenches. Portions of the doped plurality of trenches form a part of at least one continuous source line.Type: GrantFiled: July 1, 1998Date of Patent: May 22, 2001Assignee: Texas Instruments IncorporatedInventor: Men-Chee Chen
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Patent number: 6234374Abstract: A method and apparatus for selectively heating a structure capable of absorbing heat radiations in the 0.5 to 2 micron range relative to an adjacent structure wherein a first structure capable of absorbing heat radiations in the 0.5 to 2 micron range is disposed adjacent a second structure much less capable of absorbing heat radiations in the 0.5 to 2 micron range. An unfocused heat source which provides a major portion of its heat energy in the range of from about 0.5&mgr; to about 2&mgr; relative to heat energy above 2&mgr; and below 0.5 micron directs heat concurrently to the first and second structures to heat the first structure to a temperature sufficiently high and much higher then the second structure to permit a predetermined function to be performed in conjunction with the first structure while maintaining the second structure below a predetermined temperature. The function is then performed. The heat source preferably comprises an unfocused tungsten halogen lamp.Type: GrantFiled: November 8, 1999Date of Patent: May 22, 2001Assignee: Texas Instruments IncorporatedInventors: Ming Hwang, Gonzalo Amador, Lobo Wang
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Patent number: 6236254Abstract: A circuit (10) operates at relatively low values of the supply voltage, and includes a differential input circuit (16) which receives a differential input signal at first and second terminals (18, 21). A differential voltage derived by the input circuit from the differential input signal is present at third and fourth terminals (28, 31) and is amplified by a differential amplifier (12). A differential level adjuster (14) adjusts output voltages from the amplifier to suitable values for application to a matcher (15). The matcher (15) generates two currents that also flow within a differential compensator (17), and that match respective currents flowing in the amplifier. The differential compensator then provides a suitable current to each of the third and fourth terminals, such that the current flow between the first and third terminals, and between the second and fourth terminals, is substantially zero.Type: GrantFiled: July 17, 2000Date of Patent: May 22, 2001Assignee: Texas Instruments IncorporatedInventors: Mark W. Morgan, Fernando D. Carvajal
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Patent number: 6236773Abstract: A grating (18) couples the waveguide region (36) of a semiconductor laser (11) to a dielectric waveguide (26). The waveguide region of the laser includes a mirror (15) at one end thereof and an absorber (19) at the other end thereof. The dielectric waveguide includes a reflector (24) therein to reflect a portion of the light coupled from the laser to the dielectric waveguide back into the laser waveguide region.Type: GrantFiled: December 15, 1998Date of Patent: May 22, 2001Assignee: Texas Instruments IncorporatedInventors: Jerome K. Butler, Lily Y. Pang, Gary A. Evans
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Patent number: 6237017Abstract: The present invention includes a data compression system which implements transformation and quantization functions using analog devites. The system includes a transformation module with analog devices (22), a quantization module with analog devices (24) and an entropy coding module (26). A data decompression system which implements inverse transformation and inverse quantization functions using analog devices is also shown.Type: GrantFiled: April 25, 1996Date of Patent: May 22, 2001Assignee: Texas Instruments India LimitedInventor: Vinod Menezes
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Patent number: 6234296Abstract: A system for positioning a carrier relative to a travel path which includes a base having a pair of opposing side walls extending normal to the base and defining a path therebetween. A force applying device is disposed in one of the side walls and extends into the path for applying a force in the direction of the other side wall. A pair of rotatable eccentric members is secured to the other of the walls and extends into the path for selectively positioning a carrier between the eccentric members and the force applying device.Type: GrantFiled: October 5, 2000Date of Patent: May 22, 2001Assignee: Texas Instruments IncorporatedInventors: Gonzalo Amador, Katherine Gail Heinen, Jessie Buendia, Leslie E. Stark, Chill Go
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Patent number: 6232955Abstract: A palette device controllable by a digital computer with a video memory to produce signals representing color for a video monitor. The palette device includes a multiple-bit input latch for entry of color codes from the video memory, and a look-up table memory for supplying color data words in response to color codes from the input latch. A digital to analog converter responds to color data words to produce an analog color signal. Selection circuitry connected to the input latch and to the look-up table memory supplies the digital to analog converter either with a color data word supplied by the look-up table memory or with a color data word comprised of color codes from the input latch. Improved graphics computer systems, facsimile systems, printer systems and other systems and methods are also disclosed.Type: GrantFiled: June 22, 1993Date of Patent: May 15, 2001Assignee: Texas Instruments IncorporatedInventors: Karl M. Guttag, Carrell R. Killebrew, Jr., Jerry R. Van Aken
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Patent number: 6233715Abstract: This invention relates to improvements in servo Gray code detection techniques in rotating data storage drives such as hard disk drives, or the like. The detection technique uses a rate ¼ Gray code servo signals equalized to a PR4 target, and a matched filter detector, and can realize a servo Gray code detector having high speed and performance. The Gray code detector (30) has an input (44) for receiving an input signal containing a Gray code that has been equalized to a PR4 target and a circuit (40-42, 46) for processing said input signal to determine a maximum Euclidean distance from zero to a value of the Gray code. The construction of the detector (30) depends upon the particular Gray code that is employed.Type: GrantFiled: December 30, 1998Date of Patent: May 15, 2001Assignee: Texas Instruments IncorporatedInventors: Ryohei Kuki, Koshiro Saeki
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Patent number: 6232558Abstract: An electronic component mounting base board has an insulating substrate provided with a conductor circuit and a mount portion for an electronic component, and a heat slug adhered to the insulating substrate, wherein the heat slug is comprised of a flat main body and a projection portion extending vertically from a side face of the main body, and provided with a slit deforming portion absorbing deformation of the insulating substrate.Type: GrantFiled: April 23, 1998Date of Patent: May 15, 2001Assignees: Ibiden Co., Ltd., Texas Instruments IncorporatedInventors: Kiyotaka Tsukada, Hisashi Minoura, Koji Asano, Naoto Ishida, Morio Nakao
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Patent number: 6232917Abstract: The navigational system, device and method of the present invention provide navigational information to the user derived from data signals received from a plurality of transmitters (20,22,24,26). The range to each of the plurality of transmitters (20,22,24,26) is then computed based upon the corresponding data signal received from the transmitters, and a current position relative to each of said plurality of transmitters is then determined. Geographical data relating to at least the current location of the user module 32 is stored in a memory 40, and selected geographical data relating to the current location of the user module 32 is retrieved from the memory 40 to provide an audio or video display 44.Type: GrantFiled: November 19, 1998Date of Patent: May 15, 2001Assignee: Texas Instruments IncorporatedInventors: Jean-Claude Baumer, Jean-Claude Giacalone, Hans-Martin Hilbig
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Patent number: 6232936Abstract: A method and device for increasing the effective horizontal resolution of a display device. One embodiment forms a cardinal array of digital micromirror elements by staggering alternate rows in an array. According to a second embodiment, an ordinal pixel array 57, is converted to a cardinal pixel array, by grouping SLM elements 59, 61, 63, and 65 into a pixel block 58. All of the elements in a pixel block are controlled in unison such that the pixel block acts like a single pixel. Rows of pixel blocks 67 and 69 are offset to provide the effect of a cardinal array of pixels without the decrease in efficiency sometimes associated with cardinal pixel arrays.Type: GrantFiled: March 31, 1995Date of Patent: May 15, 2001Assignee: Texas Instruments IncorporatedInventors: Robert J. Gove, Jeffrey B. Sampsell
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Patent number: 6231190Abstract: A method of and system for improving the saturation of the primary colors in a display system. A color correction filter (218) removes unwanted wavelengths from a beam of light. A color splitter (228) separates the beam of light into at least three primary color beams of light. The primary color beams of light are selectively modulated by spatial light modulators (220, 222, 224) before passing through a projection lens (104) which focuses the beams of light onto an image plane.Type: GrantFiled: June 22, 1999Date of Patent: May 15, 2001Assignee: Texas Instruments IncorporatedInventor: D. Scott Dewald
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Patent number: 6232907Abstract: An A/D converter which includes a sample-and-hold circuit having an input and an output, a zero-crossing detector having an input coupled to the output of the sample-and-hold circuit and having an output indicative of a change in polarity of an input signal thereto and a polarity reverser having an input coupled to the output of the sample-and-hold circuit, a control terminal coupled to and under control of the output of the zero-crossing detector and an output terminal. A bank of comparators, preferably in a first and second array, each have inputs respectively coupled to the output of the polarity reverser, each comparator having an output. An encoder preferably having first and second portions is coupled to the output of the comparator, the first array preferably coupled to the first encoder portion and the second array preferably coupled to the second encoder portion, the encoder having an output.Type: GrantFiled: May 20, 1999Date of Patent: May 15, 2001Assignee: Texas Instruments IncorporatedInventors: Krishnaswamy Nagaraj, T. R. Viswanathan
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Patent number: 6232661Abstract: The purpose is to improve the assembly reliability of the BGA package. The present invention provides a type of BGA semiconductor device having plural conductor bumps arranged two-dimensionally on one surface of the insulating substrate. In this semiconductor device, there is adhesive layer (8) for attaching semiconductor chip (2) to said insulating substrate (3). According to the present invention, the outer edge of said adhesive layer (8) extends beyond the outer edge of said semiconductor chip (2).Type: GrantFiled: July 14, 1999Date of Patent: May 15, 2001Assignee: Texas Instruments IncorporatedInventors: Masazumi Amagai, Norihito Umehara, Kiyoshi Yajima
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Patent number: 6232188Abstract: A method for forming a MOSFET transistor using a disposable gate process which has no need for a chemical mechanical polishing step to expose the disposable gate after deposition of the field dielectric. The field dielectric is deposited non-conformally by HDP-CVD over a disposable gate structure so that the disposable gate remains partially exposed. After deposition, the partially exposed disposable gate may then be removed by selective isotropic etch. In the space left by the removal of the disposable gate, the gate dielectric may be formed and the gate electrode may be deposited. Eliminating the need for exposure of the disposable gate by CMP eliminates the problem of polish rate dependence on gate pattern density.Type: GrantFiled: July 29, 1998Date of Patent: May 15, 2001Assignee: Texas Instruments IncorporatedInventors: Suhail Murtaza, Amitava Chatterjee
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Patent number: 6230399Abstract: A TAB device (10) is coupled to a circuit board (12). The TAB device (10) includes a semiconductor die (11) having leads (18) extending therefrom. A material layer (30), typically a polyimide layer, covers the inward portion of the leads (18) to maintain leading position during attachment of the TAB device (10) to the circuit board (12). Prior to attachment, a backside encapsulation region (40) is applied to the backside of the TAB device (10), sealing the backside of the leads (18). The backside encapsulation material is selected to have a coefficient of thermal expansion similar to the coefficient of thermal expansion of the first material layer (18). The backside encapsulation material is selected to have a coefficient of thermal expansion similar to the coefficient of thermal expansion of the first material layer (30), to prevent excessive warpage.Type: GrantFiled: August 12, 1998Date of Patent: May 15, 2001Assignee: Texas Instruments IncorporatedInventors: Abhay Maheshwari, Sunil Thomas
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Patent number: 6233039Abstract: An embodiment of the instant invention is an optical illumination system for illuminating the mask of an exposure apparatus for transferring the image of the pattern on the mask onto the semiconductor wafer, the optical illumination system comprising: illumination means (illumination means 45 of FIG. 3) comprised of a plurality of light sources for emitting light beams along beam paths; and a lens system (lenses 55 and 57 of FIG. 3) for focusing the light beams to the wafer, the lens system comprising at least one lens element positioned in the beams paths. Preferably, the light sources are individually addressable point like sources, and the optical illumination system further comprising a light control means for operating each of the light sources independently of the others.Type: GrantFiled: May 27, 1998Date of Patent: May 15, 2001Assignee: Texas Instruments IncorporatedInventors: Anthony Yen, Barundeb Dutta
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Patent number: 6231147Abstract: A data storage circuit (30) has a data input (12′) for receiving a data voltage (D′) and a node (17′) for receiving an interim voltage in response to the data voltage. The data storage circuit also includes an output enable circuit (32) for providing at least one conditional path coupled to the node and for coupling the interim voltage to the node. The output enable circuit has a transistor (32p) having a first threshold voltage and operable to provide a conductive path along the at least one conditional path. The data storage circuit also includes a data output (19′) for providing an output voltage in response to the interim voltage at the node and a data retention circuit coupled between the node and the data output. The data retention circuit (18′ and 20′) has at least one transistor having a second threshold voltage higher in magnitude than the first threshold voltage.Type: GrantFiled: April 19, 1999Date of Patent: May 15, 2001Assignee: Texas Instruments IncorporatedInventor: Patrick W. Bosshart