Patents Assigned to Texas Instruments
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Patent number: 6229426Abstract: A circuit breaker (10) is shown having a movable electrical contact (36) adapted to move into and out of engagement with a stationary electrical contact (38, 40). A current carrying thermostatic trip member (42) has a portion movable in response to changes in temperature with a motion transfer member (46) transferring the motion to latch/catch mechanism (20, 24, 30, 32). The catch portion (30, 32) comprises a generally U-shaped adjustment element (30) formed of thermostatic material whose legs are fixed to the base (32a) of a catch member (32) which in turn is pivotably mounted in the casing of the circuit breaker. The bight (30c) of the adjustment element is free to move in response to temperature changes relative to the catch member. Overcurrent will cause the thermostatic trip member to transfer motion to the bight of the adjustment element causing the adjustment element and catch member to pivot and release a latch to thereby open the circuit breaker.Type: GrantFiled: October 25, 1999Date of Patent: May 8, 2001Assignee: Texas Instruments IncorporatedInventors: Michael J. Lavado, Nathaniel Wicks, Peter G. Berg
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Patent number: 6228725Abstract: A low power transistor (70, 70′) formed in a face of a semiconductor layer (86) of a first conductivity type. The transistor includes a source and drain regions (76, 78) of a second conductivity type formed in the face of the semiconductor layer, and a gate (72) insulatively disposed adjacent the face of the semiconductor layer and between the source and drain regions. A layer of counter doping (80, 80′) of the second conductivity type is formed adjacent to the face of the semiconductor layer generally between the source and drain regions. A first and second pockets (82, 84, 82′, 84′) of the first conductivity type may also be formed generally adjacent to the source and drain regions and the counter doped layer (80, 80′).Type: GrantFiled: March 30, 1999Date of Patent: May 8, 2001Assignee: Texas Instruments IncorporatedInventors: Mahalingam Nandakumar, Amitava Chatterjee, Mark S. Rodder, Ih-Chin Chen
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Patent number: 6225829Abstract: A circuit (100) for generating configurable device signatures is disclosed. The circuit (100) includes a combinatorial logic section (102) that receives a number of information signals, and according to the logic of the information signals, activates one of a number of configuration signals (CONFIG0-CONFIGn). The configuration signals (CONFIG0-CONFIGn) are received by a signature option section (200). The signature option section (200) includes a number of conductive options (210-0 to 210-n and 212) that enable a unique signature (SIG0-SIG15) to be generated in response to each of the configuration signals (CONFIG0-CONFIGn). In the preferred embodiment, the conductive options (210-0 to 210-n and 212) are configured by way of a final metallization layer option.Type: GrantFiled: June 22, 1999Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventor: Pramod Acharya
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Patent number: 6225824Abstract: An output buffer (500) is disclosed that includes an output driver circuit (508) having a first drive transistor (P504) for driving an output node (520) to a first logic level according the potential at a first pre-drive node (516), and a second drive transistor (N504) for driving the output node (520) to a second logic level according the potential at a second pre-drive node (518). The potential at the first pre-drive node (516) is established by a first standard pre-drive circuit (504) and a first phased pre-drive circuit (512). The potential at the second pre-drive node (518) is established by a second standard pre-drive circuit (506) and a second phased pre-drive circuit (514). In a low voltage mode of operation, where the rate of current drawn (di/dt) by the output driver circuit (508) is reduced, the standard and phased pre-drive circuits (504, 506, 512, 514) function together to drive their respective pre-drive nodes.Type: GrantFiled: March 8, 1999Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventors: R Madhu, Abhijit Ray
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Patent number: 6226452Abstract: In integrated semiconductor manufacturing, semiconductor dies may be packaged in ceramic packages. Such packages typically have a base into which the semiconductor die is securedly placed and typically have a lead frame securedly attached to base so that electrical connection may be made to the semiconductor die. A halagen lamp radiant chamber significantly reduces the time it takes to attach the die and lead frame to the ceramic base while reducing particles commonly associated with open belt converyor furnaces.Type: GrantFiled: December 17, 1998Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventors: Paul Joseph Hundt, Katherine Gail Heinen, Kwan Yew Kee, Ming-Jang Hwang, Leslie E. Stark, Gonzalo Amador
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Patent number: 6225839Abstract: To provide a buffer circuit that is able to achieve a reduction of the input current and a high input impedance by compensating the base current of a transistor, and to avoid a lowering of the input dynamic range by means of a current compensation circuit. By means of transistor P2, the base voltage of transistor Q2 is established in response to the signal of input node ND1 of the differential circuit, and the emitter voltage of transistor Q2 is set at virtually the same level as the reference voltage Vref. The collector current IC2 of transistor P2 is the same as the base current of transistor Q2, and is established with the amplification ratio of transistor Q2 as well as the current I2 of current source IS2.Type: GrantFiled: November 24, 1999Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventor: Shigeki Ohtsuka
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Patent number: 6226322Abstract: Digital subscriber modems (8, 15) for use in Asynchronous Digital Subscriber Line (ADSL) communications are disclosed. Each modem includes a digital transceiver function (10, 13) and an analog front end function (10, 11), where the analog front end function (10, 11) is integrated into a single integrated circuit. According to the disclosed embodiments, the analog front end functions (10, 11) each include a transmit and a receive side. The transmit side includes oversampled registers (44C, 44R) and digital filters (46C, 46R) which serve to increase the sample rates of the digital data to be transmitted, so that the analog-to-digital converter (48C, 48R) operates in an oversampled manner, and so that the downstream analog low pass filters (50C, 50R) can be realized with relatively simple, low-order filters. On the receive side, digital filter functions (64C, 64R) are included downstream from the analog-to-digital converters (62C, 62R), to minimize the complexity of the receive-side analog filters (58C, 58R).Type: GrantFiled: March 30, 1998Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventor: Subahashish Mukherjee
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Patent number: 6225684Abstract: A leadframe is provided which has an integrated resistive element incorporated within the leadframe. The resistive element suitably comprises a material that can provide a temperature coefficient of under 500 ppm/° C., preferably approximating 100 ppm/° C. or less. Exemplary embodiments of the resistive material may include Constantan or Manganin. The leadframe and integrated resistive element may be utilized in a variety of integrated circuit applications, such as a current monitoring circuit. Accordingly, variations in temperature will not dramatically affect the accuracy of any integrated circuit devices during operation. Additionally, after encapsulation of the leadframe and integrated resistive element and any such integrated circuit device, the gain of the encapsulated circuit may be suitably adjusted by various calibration techniques.Type: GrantFiled: February 29, 2000Date of Patent: May 1, 2001Assignee: Texas Instruments Tucson CorporationInventors: R. Mark Stitt, II, Larry D. Hobson
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Patent number: 6226054Abstract: A method for performing pulse width modulation (PWM) on a binary spatial light modulator using spatial-temporal multiplexing. A 10% light boost is achieved by eliminating deadtimes that are typically generated using the global-reset operation of a DMD when bit-planes having small on times are utilized. The number of bit-planes required is reduced by using a combination of binary and ternary bit-planes to achieve grayscale of a displayed digital image. By using a combination of spatial and temporal processing, digital pixel values can be displayed using a reduced number of bit-planes, without generating perceived artifacts such as pulsing due to pixels being turned on-off from frame to frame.Type: GrantFiled: June 2, 1998Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventors: Daniel J. Morgan, Gregory J. Hewlett, Peter F. VanKessel
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Patent number: 6226664Abstract: Two thermometer coded words having a most significant byte (MSB) and a least significant byte (LSB) are subtracted, and a check detects a borrowing condition. A first borrowing condition is detected if word B MSB is greater than word A MSB (12), and word A LSB is greater than word B LSB (14). In such a case a borrow (16) must take place on word B MSB. A second borrowing condition is detected when the word A MSB is greater than the word B MSB (18) and the word B LSB is greater than the word A LSB (20). In this instance, a borrow (22) should take place on word A MSB through a shift right function. After borrowing, a subtraction (24) takes place by exclusive-or'ing word A and B MSBs. The result is reconstructed (26) through a shift right process into proper thermometer code format. If a borrowing condition exists, an appropriate LSB is translated (28, 30) before an LSB subtraction process (32) takes the resulting word A and word B LSBs and exclusively-or's them together.Type: GrantFiled: July 19, 1994Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventors: Fuk Ho P. Ng, Shivaling S. Mahant-Shetti
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Patent number: 6226708Abstract: A method of writing a plurality of data values to a plurality of non-volatile memory modules connected to a processor includes initiating writing of a first data value to a first non-volatile memory array and delaying processing by the processor for a predetermined time to allow the first data value to be written to the first non-volatile memory array. The method further includes initiating writing of a second data value to a second non-volatile memory array before delaying processing by the processor to allow the processor to delay processing while both the first data value and the second data value are being written.Type: GrantFiled: August 18, 1998Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventors: Robert F. McGoldrick, Andrew J. Allan
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Patent number: 6226193Abstract: The invention relates to a DC/DC converter operating on the charge pump principle, regulated to a fixed, predetermined output voltage and comprising two charge pump capacitors switched in a switch matrix consisting of nine switches. A control circuit is provided capable of controlling the switches so that the charge pump is changed over between a charging phase and a discharge phase and which is capable of operating the charge pump in two modes having different voltage gain factors (1.5; 2).Type: GrantFiled: July 26, 2000Date of Patent: May 1, 2001Assignee: Texas Instruments Deutschland, GmbHInventors: Erich Bayer, Christian Meindl, Hans Schmeller
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Patent number: 6226194Abstract: The invention relates to a DC/DC converter operating on the principle of a charge pump and comprising a first capacitor C1 alternatingly charged via four MOSFETs M1-M4 to the input voltage and then discharged in series with the input voltage via a second capacitor C2 connected to the output of the circuit. To set the starting current for charging the as yet empty capacitors to a precisely defined small value a switchable current mirror M3, M5 is used comprising one of the four MOSFETs (M3) and a further small MOSFET (M5) which is connected to a current source 4. A comparator 5 handles selection between the starting phase and the normal charge pump mode by comparing the output voltage Vout of the converter to a reference voltage Vref, it switching the current mirror and—via two small switches S2 and S3 connected to the gates of two of the four MOSFETs—also two of the four MOSFETs so that the capacitors may be charged in an energy-saving way.Type: GrantFiled: June 15, 2000Date of Patent: May 1, 2001Assignee: Texas Instruments Deutschland, GmbHInventors: Erich Bayer, Hans Schmeller
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Patent number: 6225796Abstract: In one aspect, the present invention provides a method of generating a substantially constant voltage. A bandgap reference circuit (112/114/116) is trimmed such that a voltage output (VBG) from the bandgap reference circuit is at its peak value when an operating temperature is at its minimum value within a specified operating temperature range. A plurality of additional current sources (118-124) are also provided with the bandgap reference circuit. Each current source is designed to successively provide additional current as the operating temperature increases within the specified operating temperature range.Type: GrantFiled: June 22, 2000Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventor: Baoson Nguyen
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Patent number: 6226141Abstract: An improved write drive circuit which reduces the ringing and overshoot transients of an H-bridge drive circuit for a hard disk drive. The invention uses a damp circuit which minimizes the amount of capacitance on the outputs of the write driver while still accomplishing the dampening of the transient ring. In a preferred embodiment, the damp circuit is a ring clamp circuit which includes a resistor connected to each node of the write head. Each resistor is then connected to the emitter of a npn transistor where the transistors have a commonly enabled gate and a common collector connected to a source voltage.Type: GrantFiled: September 19, 1997Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventor: Patrick M. Teterud
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Patent number: 6226315Abstract: The present application discloses an improved mobile communications architecture, in which each base station broadcasts not only data which has been spread by that station's long code word, but also (intermittently) code identification data which has not been spread. The code identification data is a block code which includes multiple symbols, so that multiple intermittent transmissions are required to complete the transmission of the code identification data. This transmission lets the mobile station shorten the search for the base station's long code word in two ways: the code identification data gives at least some information about the long code itself; and the phase of the block code gives at least some information about the phase of the long code word.Type: GrantFiled: April 27, 1998Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventors: Sundararajan Sriram, Srinath Hosur
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Patent number: 6223603Abstract: A fluid pressure sensor (10) includes a capacitive pressure sensing element (12) having a thin, relatively flexible ceramic diaphragm (14) mounted in closely spaced apart relation to a rigid ceramic substrate (16) by a glass annulus (18) mounted in a housing (28) having a port (28a) for fluid whose pressure is to be sensed by being received on an outer face (12a) of the diaphragm. An electronic circuit (36) is mounted in a chamber (20a) formed between a connector (20) and an outer face (12b) of the substrate. An electrically conductive coating (14b) is placed on the outer face (12a) of the diaphragm and an annular electrically conductive gasket (30) is disposed between the diaphragm and the bottom floor (28c) of the housing surrounding a fluid inlet (28a) in order to effect an electrical path between the conductive layer on the diaphragm and the housing.Type: GrantFiled: May 18, 1999Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventor: E. Martin McKinnon
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Patent number: 6226280Abstract: A method is provided for allocating and de-allocating transmission resources in a local multipoint distribution services system. In the method, one of an off-hook after idle signal and an incoming call request signal is detected. A frequency and a time slot for a call are assigned at a base system in response to the detection of the off-hook after idle signal or the incoming call request signal. A customer premises equipment unit is tuned to the assigned frequency in order to deliver the call.Type: GrantFiled: December 11, 1997Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventors: Charles W. Roark, Michael L. Robinson, Andrew Cilia
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Patent number: 6225703Abstract: The purpose of the present invention is to reduce the warpage of the semiconductor package caused by thermal contraction. According to the present invention, semiconductor device (9) has plate-shaped member (7) which is positioned on a surface of semiconductor chip (1) and is sealed together with semiconductor chip (1) with molding resin (8). Said plate-shaped member (7) has a linear expansion coefficient that is less than the linear expansion coefficient of the aforementioned molding resin. By placing a plate-shaped member with a small linear expansion coefficient on semiconductor chip (1), it is possible to reduce the thermal contraction on the upper side of the semiconductor chip. Also, the presence of the plate-shaped member on the semiconductor chip leads to substantial reduction in the thickness of the molding resin on the semiconductor chip. The pulling force due to contraction of the molding resin that leads to warping is proportional to the thickness of the molding resin.Type: GrantFiled: July 9, 1999Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventors: Norito Umehara, Chikara Azuma, Akira Karashima
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Patent number: 6225175Abstract: A method of fabricating a semiconductor device wherein a first material is provided on a first surface which has a surface and a sidewall. A sidewall structure of predetermined thickness, extending away from the sidewall, is formed with a second material different from the first material. The sidewall structure can be formed on a pair of adjacent sidewalls, the sidewall structure filling the space between the sidewall pair. Optionally, portions of the sidewall structure are removed and a second sidewall deposition of the same or different thickness can be added on exposed portions of the sidewall and the sidewall structure, thereby providing a disposition of different sidewall structure thickness. Additional portions of the sidewall structure can be removed. A third material different from the second material is formed covering exposed portions of the first surface, sidewall structure and first material. The first and third materials can be the same.Type: GrantFiled: June 16, 1998Date of Patent: May 1, 2001Assignee: Texas Instruments IncorporatedInventor: Theodore W. Houston