Abstract: A method for forming a semiconductor device may include providing a transistor structure. The transistor structure may include a set of semiconductor fins and a set of gate structures, disposed on the set of semiconductor fins, wherein an isolation layer is disposed between the set of semiconductor fins and between the set of gate structures. The method may include implanting ions into an exposed area of the isolation layer, wherein an altered portion of the isolation layer is formed in the exposed area, wherein an altered region of the set of semiconductor fins is formed in an exposed portion of the set of semiconductor fins. The altered portion of the isolation layer may have a first etch rate, wherein an unaltered portion of the isolation layer, not exposed to the ions, has a second etch rate, greater than the first etch rate.

Abstract: Provided herein are approaches for reducing particles in an ion implanter. An electrostatic filter may include a housing and a plurality of conductive beam optics within the housing. The conductive beam optics are arranged around an ion beam-line directed towards a wafer, and may include entrance aperture electrodes proximate an entrance aperture of the housing. The conductive beam optics may further include energetic electrodes downstream along the ion beam-line from the entrance aperture electrodes, and ground electrodes downstream from the energetic electrodes. The energetic electrodes are positioned farther away from the ion beam-line than the entrance electrodes and the ground electrodes, thus causing the energetic electrodes to be physically blocked from impact by an envelope of back-sputter material returning from the wafer. The electrostatic filter may further include an electrical system for independently delivering a voltage and a current to each of the conductive beam optics.

Abstract: An apparatus may include an ion source, arranged to generate an ion beam at a first ion energy. The apparatus may further include a DC accelerator column, disposed downstream of the ion source, and arranged to accelerate the ion beam to a second ion energy, the second ion energy being greater than the first ion energy. The apparatus may include a linear accelerator, disposed downstream of the DC accelerator column, the linear accelerator arranged to accelerate the ion beam to a third ion energy, greater than the second ion energy.

Abstract: Provided herein are approaches for forming a conduit embedded within a component of a semiconductor manufacturing device (e.g., an ion implanter) using an additive manufacturing process (e.g., 3-D printing), wherein the conduit is configured to deliver a fluid throughout the component to provide heating, cooling, and gas distribution thereof. In one approach, the conduit includes a set of raised surface features formed on an inner surface of the conduit for varying fluid flow characteristics within the conduit. In another approach, the conduit may be formed in a helical configuration. In another approach, the conduit is formed with a polygonal cross section. In another approach, the component of the ion implanter includes at least one of an ion source, a plasma flood gun, a cooling plate, a platen, and/or an arc chamber base.

Abstract: A method of doping a substrate. The method may include providing a substrate in a process chamber. The substrate may include a semiconductor structure, and a dopant layer disposed on a surface of the semiconductor structure. The method may include maintaining the substrate at a first temperature for a first interval, the first temperature corresponding to a vaporization temperature of the dopant layer. The method may further include rapidly cooling the substrate to a second temperature, less than the first temperature, and heating the substrate from the second temperature to a third temperature, greater than the first temperature.

Abstract: Provided herein are approaches for forming a conduit embedded within a component of a semiconductor manufacturing device (e.g., an ion implanter) using an additive manufacturing process (e.g., 3-D printing), wherein the conduit is configured to deliver a fluid throughout the component to provide heating, cooling, and gas distribution thereof. In one approach, the conduit includes a set of raised surface features formed on an inner surface of the conduit for varying fluid flow characteristics within the conduit. In another approach, the conduit may be formed in a helical configuration. In another approach, the conduit is formed with a polygonal cross section. In another approach, the component of the ion implanter includes at least one of an ion source, a plasma flood gun, a cooling plate, a platen, and/or an arc chamber base.

Abstract: A method of patterning a substrate may include providing a cavity in a layer, disposed on the substrate. The cavity may have a first length along a first direction and a first width along a second direction, perpendicular to the first direction. The method may include directing first angled ions in a first exposure to the cavity, wherein after the first exposure the cavity has a second length, greater than the first length; directing normal ions in a second exposure to the cavity, wherein the cavity retains the second length after the second exposure; and directing second angled ions to the cavity is a third exposure, subsequent to the second exposure, wherein the cavity has a third length, greater than the second length, after the third exposure.

Abstract: A method may include providing a device structure, where the device structure includes a semiconductor region, and a gate structure, disposed over the semiconductor region. The gate structure may further include a gate metal. The method may further include oxidizing an upper portion of the gate metal, wherein the upper portion forms an oxide cap, and wherein a lower portion of the gate metal remains metallic.

Abstract: A method may include providing a substrate, comprising a patterning layer. The method may include forming a first pattern of first linear structures in the patterning layer, the first linear structures being elongated along a first direction. The method may include forming a mask over the patterning layer, the mask comprising a second pattern of second linear structures, elongated along a second direction, forming a non-zero angle with respect to the first direction. The method may include selectively removing a portion of the patterning layer while the mask is in place, wherein a first etch pattern is formed in the patterning stack, the first etch pattern comprising a two-dimensional array of cavities. The method may include directionally etching the first etch pattern using an angled ion beam, wherein a second etch pattern is formed, comprising the two-dimensional array of cavities, elongated along the first direction.

Abstract: A method of forming a semiconductor device. The method may include providing a semiconductor device structure. The semiconductor device structure may include a semiconductor fin; and a mask, disposed over the semiconductor fin, the mask defining a plurality of openings, wherein the semiconductor fin is exposed in the plurality of openings. The method may further include directing angled ions into the plurality of openings, wherein a plurality of trenches are formed in the semiconductor fin, wherein a given trench of the plurality of trenches comprises a reentrant profile.

Abstract: Methods herein may include forming a gate dielectric within a set of trenches in a stack of layers. A first work function (WF) metal may be formed atop the gate dielectric, and a capping layer may be formed over the first WF metal using an angled ion implant deposition, the capping layer extending across the trenches.

Abstract: An apparatus may include an electrode assembly, the electrode assembly comprising a plurality of electrodes, arranged in a plurality of electrode pairs arranged to conduct an ion beam therethrough. A given electrode pair lies along a radius of an arc describing a nominal central ray trajectory, wherein a radius of a first electrode pair and an adjacent electrode pair define an angular spacing. The plurality of electrode pairs may define a plurality of angular spacings, wherein, in a first configuration, the plurality of angular spacings are not all equal. The apparatus may also include a power supply in communication with the EM, the power supply configured to independently supply voltage to the plurality of electrodes.

Abstract: Embodiments of the disclosure include a fault current limiter (FCL) providing symmetrical electrostatic shielding. In some embodiments, a FCL includes a superconductor maintained at a first voltage greater than zero voltage, and an enclosure containing the superconductor, the enclosure maintained at a second voltage greater than zero voltage, wherein the second voltage is different from the first voltage. The FCL may include an electrical connection directly coupling the superconductor and the enclosure, wherein the electrical connection enables each of a plurality of current limiting modules of the superconductor to receive, during a fault condition, an equal or unequal sub-portion of a total voltage drop.

Abstract: In one embodiment, an ion extraction optics for extracting a plurality of ion beams is provided. The ion extraction optics may include, an extraction plate, the extraction plate defining a cut-out region, the cut-out region being elongated along a first direction. The extraction apparatus may include a slidable insert, the slidable insert disposed to overlap the cut-out region, and slidably movable with respect to the extraction plate, along the first direction, wherein the slidable insert and cut-out region define a first aperture and a second aperture.

Abstract: A method of processing a workpiece is disclosed, where the interior surfaces of the plasma chamber are first coated using a conditioning gas that contains the desired dopant species. A working gas, which does not contain the desired dopant species, is then introduced and energized to form a plasma. This plasma is used to sputter the desired dopant species from the interior surfaces. This dopant species is deposited on the workpiece. A subsequent implant process may then be performed to implant the dopant into the workpiece. The implant process may include a thermal treatment, a knock in mechanism, or both.

Abstract: A method may include depositing a mask layer on a substrate using physical vapor deposition, wherein an absolute value of a stress in the mask layer has a first value; and directing a dose of ions into the mask layer, wherein the absolute value of the stress in the mask layer has a second value, less than the first value, after the directing the dose.

Abstract: An ion source having dual indirectly heated cathodes is disclosed. Each of the cathodes may be independently biased relative to its respective filament so as to vary the profile of the beam current that is extracted from the ion source. In certain embodiments, the ion source is used in conjunction with an ion implanter. The ion implanter comprises a beam profiler to measure the current of the ribbon ion beam as a function of beam position. A controller uses this information to independently control the bias voltages of the two indirectly heated cathodes so as to vary the uniformity of the ribbon ion beam. In certain embodiments, the current passing through each filament may also be independently controlled by the controller.

Abstract: Embodiments of the disclosure include a fault current limiter having a first current splitting device including a primary winding and secondary winding wound around a first core, and a second current splitting device including a primary winding and a secondary winding wound around a second core. The fault current limiter may further include a fault current limiter module (e.g., a switching module) electrically connected in series between the secondary winding of the first current splitting device and the secondary winding of the second current splitting device. The fault current limiter may further include a second fault current limiter module electrically connected in series with the secondary winding of the second current splitting device. By splitting the fault current limiter into parts with fault current limiter modules interspersed between the windings, the fault current limiter may be to be built with less insulation between the windings.

Abstract: An apparatus and methods of improving the ion beam quality of a halogen-based source gas are disclosed. Unexpectedly, the introduction of a noble gas, such as argon or neon, to an ion source chamber may increase the percentage of desirable ion species, while decreasing the amount of contaminants and halogen-containing ions. This is especially beneficial in non-mass analyzed implanters, where all ions are implanted into the workpiece. In one embodiment, a first source gas, comprising a processing species and a halogen is introduced into a ion source chamber, a second source gas comprising a hydride, and a third source gas comprising a noble gas are also introduced. The combination of these three source gases produces an ion beam having a higher percentage of pure processing species ions than would occur if the third source gas were not used.

Abstract: A system for heating substrates while being transported between the load lock and the platen is disclosed. The system comprises an array of light emitting diodes (LEDs) disposed above the alignment station. The LEDs may be GaN or GaP LEDs, which emit light at a wavelength which is readily absorbed by silicon, thus efficiently and quickly heating the substrate. The LEDs may be arranged so that the rotation of the substrate during alignment results in a uniform temperature profile of the substrate. Further, heating during alignment may also increase throughput and eliminate preheating stations that are currently associated with the processing chamber.