Abstract: There is provided a technique that includes selectively doping a metal film with a dopant by performing: supplying a dopant-containing gas containing the dopant to a substrate in which the metal film and a film other than the metal film are formed on a film in which the dopant is doped; and removing the dopant-containing gas from above the substrate.

Abstract: Provided are a laser annealing apparatus and a method of manufacturing a substrate having a poly-Si layer using the laser annealing apparatus. The laser annealing apparatus includes a laser beam source that emits a linearly polarized laser beam, a polygon mirror that rotates around a rotation axis and reflects the laser beam emitted from the laser beam source, a first Kerr cell disposed on a laser beam path between the laser beam source and the polygon mirror, and a first optical element that directs the laser beam reflected by the polygon mirror toward an amorphous Si layer where the laser beam is irradiated upon the amorphous Si layer.

Abstract: Systems and methods are provided for monitoring wafer bonding and for detecting or determining defects in a wafer bond formed between two semiconductor wafers. A wafer bonding system includes a camera configured to monitor bonding between two semiconductor wafers. Wafer bonding defect detection circuitry receives video data from the camera, and detects a bonding defect based on the received video data.

Abstract: The present disclosure proposes a micro power generation device including a plurality of generators stacked one above the other. Each of the plurality of generators includes: an upper electrode and a lower electrode spaced up and down; a spacer provided between peripheral edges of the upper electrode and the lower electrode; an upper friction material layer provided on a side of the upper electrode facing the lower electrode; and a lower friction material layer provided on a side of the lower electrode facing the upper electrode. The upper friction material layer, the lower friction material layer and the spacer together form a cavity. An intermediate spacer is provided between each adjacent two generators, each adjacent two generators and the intermediate spacer together form an intermediate cavity, and the intermediate cavity is filled with gas. A cavity of an upper one of any two adjacent generators communicates with the intermediate cavity between the two adjacent generators.

Abstract: An integral multifunction chip is provided. The integral multifunction chip includes an electronic fuse and an interface fuse. The interface fuse and the electronic fuse are disposed in parallel and integrated in a single chip. In a case where only a single chip is provided, the integral multifunction chip of the present disclosure can be selectively operated in a working mode of the electronic fuse or the interface fuse, so that convenience of use of the integral multifunction chip can be improved.

Abstract: A touch-sensitive assembly and method of making includes a first electrically conductive layer disposed on a first substrate and a second electrically conductive layer disposed on a second substrate. A piezoelectric film is disposed between the first electrically conductive layer and the second electrically conductive layer. The piezoelectric film includes a plurality of aligned piezoelectric particles disposed in a polymeric matrix and is characterized by a haze value of about 5% or less.

Abstract: A method of forming a semiconductor device structure is provided. The method includes forming a resist structure over a substrate. The resist structure includes an anti-reflective coating (ARC) layer and a photoresist layer over the ARC layer. The method further includes patterning the photoresist layer to form a trench therein. The method further includes performing a hydrogen plasma treatment to the patterned photoresist layer. The hydrogen plasma treatment is configured to smooth sidewalls of the trench without etching the ARC layer. The method further includes patterning the ARC layer using the patterned photoresist layer as a etch mask.

Abstract: An apparatus includes: a processing container; a stage provided inside the processing container to place a substrate thereon; a gas supply mechanism for supplying a processing gas into the processing container; and at least three ultraviolet light sources provided to irradiate the processing gas inside the processing container with ultraviolet rays. The ultraviolet light sources are provided to be offset from a rotation axis of the stage in a plan view, and are arranged in a light source arrangement direction with distances from the ultraviolet light sources to the rotation axis being different from one another. The ultraviolet light sources include first to third ultraviolet light source. The third ultraviolet light source is arranged such that distances L1, L2, and L3 from the first to third ultraviolet light sources, respectively, to the rotation axis in a plan view satisfies a relationship of L1<L3<L2.

Abstract: A pattern formation method includes forming an organic film on a substrate, processing the organic film to form an organic film pattern, exposing the organic film pattern to an organic gas, and exposing the organic film pattern to a metal-containing gas, and after (i) exposing the organic film pattern to the organic gas and (ii) exposing the organic film pattern to the metal-containing gas, treating the organic film pattern with an oxidizing agent.

Abstract: Provided is a composition for forming a silica layer, the composition containing a silicon-containing polymer and a solvent, wherein a silica layer formed of the composition for forming the silica layer satisfies Relation 1. The definition of Relation 1 is as described in the specification. The definition of Relation 1 is the same as described in the specification.

Abstract: A process for batch fabrication of circuit components is disclosed via simultaneously packaging multiple circuit component dice in a matrix. Each die has electrodes on its tops and bottom surfaces to be electrically connected to a corresponding electrical terminal of the circuit component it's packaged in. For each circuit component in the matrix, the process forms preparative electrical terminals on a copper substrate. Component dice are pick-and-placed onto the copper substrate with their bottom electrodes landing on corresponding preparative electrical terminal. Horizontal conductor plates are then placed horizontally on top of the circuit component dice, with bottom surface at one end of each plate landing on the dice's top electrode. An opening is formed at the opposite end and has vertical conductive surfaces.

Abstract: A method of forming a gallium oxide film is provided, and the method may include supplying mist of a material solution comprising gallium atoms and chlorine atoms to a surface of a substrate while heating the substrate so as to form the gallium oxide film on the surface of the substrate, in which a molar concentration of chlorine in the material solution is equal to or more than 3.0 times and equal to or less than 4.5 times a molar concentration of gallium in the material solution.

Abstract: A method of removing a substrate from III-nitride based semiconductor layers with a cleaving technique. A growth restrict mask is formed on or above a substrate, and one or more III-nitride based semiconductor layers are grown on or above the substrate using the growth restrict mask. The III-nitride based semiconductor layers are bonded to a support substrate or film, and the III-nitride based semiconductor layers are removed from the substrate using a cleaving technique on a surface of the substrate. Stress may be applied to the III-nitride based semiconductor layers, due to differences in thermal expansion between the III-nitride substrate and the support substrate or film bonded to the III-nitride based semiconductor layers, before the III-nitride based semiconductor layers are removed from the substrate. Once removed, the substrate can be recycled, resulting in cost savings for device fabrication.

Abstract: The invention relates to a method of healing defects related to implantation of species in a donor substrate (1) made of a semiconducting material to form therein a plane of weakness (5) in it separating a thin layer (4) from a bulk part of the donor substrate. The method comprises a superficial amorphisation of the thin layer, followed by application of a heat treatment on the superficially amorphised thin layer. The method comprises application of laser annealing to the superficially amorphised thin layer after the heat treatment, to recrystallise it in the solid phase.

Abstract: The present disclosure discloses a display panel which includes a substrate and plurality of insulating layers disposed on the substrate, and a plurality of metal routings, and includes a display region and a first non-display region at left and right sides of the display region, and a display, the plurality of metal routings being at the first non-display region and insulated from each other, and at least adjacent two of the metal routings being positioned on different layers of the insulating layers. An interval between adjacent metal routings on different insulating layers in a horizontal direction can be reduced through the above wiring manner, thereby reducing a space occupied by the first non-display region.

Abstract: A semiconductor device and a method of producing the semiconductor device are described. The semiconductor device includes: a semiconductor substrate; a metallization layer over the semiconductor substrate; a plating over the metallization layer, the plating including NiP; a passivation over the metallization layer and laterally adjacent the plating such that a surface of the plating that faces away from the semiconductor substrate is uncovered by the passivation, wherein a seam is present along an interface between the passivation and the plating; and a structure that covers the seam along a periphery of the plating and delimits a bondable area for the plating. The structure extends from the periphery of the plating onto the passivation. The structure includes an imide having a curing temperature below a recrystallization temperature of the NiP or an oxide having a deposition temperature below the recrystallization temperature of the NiP.

Abstract: An electronic device, e.g. integrated circuit, has top and bottom metal plates located over a substrate, the bottom plate located between the top plate and the substrate. A high-stress silicon dioxide layer is located between the bottom plate and the substrate. At least one low-stress silicon dioxide layer is located between the top plate and the bottom plate.

Abstract: A method for preparing a silicon nitride film with a high deposition rate and a reduced damage to the substrate and/or the underlying layer formed under the silicon nitride film. The method for preparing a silicon nitride film contains the steps of irradiating a nitride with an ultraviolet light, and contacting the nitride irradiated with the ultraviolet light and a hydrogenated cyclic silane represented by a general formula SinH2n, wherein n is 5, 6, or 7.

Abstract: Processes for oxidation of a workpiece are provided. In one example, a method includes placing a workpiece on a workpiece support in a processing chamber. The method includes performing a pre-oxidation treatment process on the workpiece in the processing chamber to initiate oxide layer formation on the workpiece. The method includes performing a remote plasma oxidation process on the workpiece in the processing chamber to continue the oxide layer formation on the workpiece. Subsequent to performing the pre-oxidation treatment process and the remote plasma oxidation process, the method can include removing the workpiece from the processing chamber. In some embodiments, the remote plasma oxidation process can include generating a first plasma from a remote plasma oxidation process gas in a plasma chamber; filtering species generated in the plasma to generate a mixture having one or more radicals; and exposing the one or more radicals to the workpiece.

Abstract: A manufacturing apparatus and a manufacturing method are provided. A manufacturing apparatus includes a chamber, and a stage disposed in the chamber. The stage includes an upper surface on which a target substrate is disposed, a lower surface opposite to the upper surface, a first side surface extending between the upper surface and the lower surface in a first direction, and a second side surface extending between the upper surface and the lower surface in a second direction perpendicular to the first direction. The first side surface is in a round shape, and at least a portion of the first side surface is convex toward an outside of the stage.