Abstract: The structural body of a ferroelectric capacitor C is located over a source region (23) between a gate electrode (22) and a local oxide film (26). The structural body has a ferroelectric film (29) and an upper electrode (30) and a lower electrode (31) for sandwiching the ferroelectric film (29), and is provided with a conductive oxide film (32) between the lower electrode (31) and the source region (23). The conductive oxide film (32) is ITO, ReO.sub.2, RuO.sub.2 or MoO.sub.3. If an oxygen anneal is conducted after forming the ferroelectric film (29) for the purpose of reforming crystallizability of the ferroelectric film (29), oxygen enters into the conductive oxide film (32) to some extent. As a result, the conductive oxide film (32) is further oxidized, and becomes a so-called oxide barrier or dummy layer.

Abstract: A gate insulating layer, which is formed on a channel region of a semiconductor substrate and interposed between the semiconductor substrate and a gate electrode, consists of a first part and a second part adjoining each other. The first part includes an oxide lower layer and a nitride upper layer, and a second part includes a nitride lower layer and an oxide upper layer.

Abstract: A semiconductor device accommodated in a package includes a semiconductor chip, a package body for accommodating the semiconductor chip, and a plurality of terminal members embedded in the package body in electrical connection to the semiconductor chip and projecting from a bottom surface of the package body, wherein each of said terminal members is of spherical form, and of a substantially identical diameter.

Abstract: An integrated heat sink module includes a sinuously channeled base and a bonded top surface electrode that is dielectrically isolated from the base. The top surface electrode acts as a common modular electrode capable of conducting heat to an ultimate cooling medium with no intervening thermal barrier. Constrained copper technology (CCT) is employed to ensure that the relatively low effective temperature coefficient of expansion of the channel base is acquired by the channel cover, which is the dielectrically (but not thermally) insulated top surface, and that the common electrode is integrated with, by forming a part of, the fluid channel in the base. The heat sink weight is reduced significantly by the channeling, while use of the CCT technology ensures high reliability and integrity of the module.

Abstract: A semiconductor device is disclosed in which a groove type element isolation region in the surroundings of a first diffused layer of one conductivity type formed on the surface of a silicon substrate of the opposite conductivity type, an insulating film is embedded in the groove type element isolation region, and an interlayer insulating film is provided on the silicon substrate. A contact hole for connecting the first diffused layer to a metallic wiring is provided at a position that straddles the boundary between the first diffused layer and the groove type element isolation region, the insulating film embedded in the groove type element isolation region is exposed in a part of the bottom face of the contact hole, and the silicon substrate including the first diffused layer is exposed on the side face of the contact hole.

Abstract: A lead frame (10) is connected to an integrated circuit (32) by adhesives. The lead frame (10) includes a mold gate (40) to provide for constant flow of resin (72) into the mold cavity (66) during encapsulation of the integrated circuit (32). The lead frame (10) also has an air vent (50) to direct air and any excess resin (74) from the mold cavity (66) to a dummy cavity (70).

Abstract: A packaged semiconductor device has a wiring substrate. A plurality of semiconductor device chips are connected to the wiring substrate by a use of bumps. A heat sink is bonded through a high heat conductive bonding layer to a surface of each of the semiconductor device chips. In addition, a package casing which accommodates the semiconductor device chips and the wiring substrate, has internal conductors which are positioned in the inside of the package casing. External connection pins extend outwardly from the package casing and are connected to corresponding internal conductors. The wiring substrate is connected to the internal conductors of the package casing via a flexible wiring circuit member. The flexibility of this wiring permits the thermal expansion and contraction to occur without breaking the connections to the bumps.

Abstract: A multiple stacked die device is disclosed that contains up to four dies and does not exceed the height of current single die packages. Close-tolerance stacking is made possible by a low-loop-profile wire-bonding operation and thin-adhesive layer between the stacked dies.

Abstract: A photosensor device includes doped and undoped hydrogenated amorphous silicon layers adjacent each other and sandwiched between a conductive layer on one side and a metal layer on the other side with the sensor having been annealed under a hydrogen atmosphere and exhibiting low dark currents. The photosensor device is particularly useful as an X-ray image sensing device with the addition of a luminescent layer having at least one X-ray phosphor.

Abstract: A compound semiconductor device and a process for manufacturing it is disclosed. The process comprises the steps of forming a first conduction type first clad layer, a first conduction type or second conduction type activated layer, a second conduction type second clad layer, and a second conduction type cap layer upon a first conduction type semiconductor substrate, forming a first conduction type electrode and a second conduction type electrode, and forming a rectangular pole shaped laser diode, a triangular pole shaped detecting photo-diode, and a triangular pole shaped receiving photo-diode by carrying out a single round of anisotropic etching. According to the present invention, the high density can be easily realized, so that the power consumption and the manufacturing cost can be saved.

Abstract: Deformation of TAB tapes due to temperature changes is prevented by thermo-mechanical leads. In one embodiment of the invention, a semiconductor device (30) includes an electronic component (31) and a TAB tape. The tape includes a carrier film (12) and electrical leads (20) formed on the carrier film. The electrical leads are electrically coupled to the electronic component. Also included on the carrier film are thermo-mechanical leads (32) which are formed in opposing regions of the carrier film, regions which are typically void of leads. The thermo-mechanical leads have approximately the same lead pitch as the electrical leads in order to provide a uniform distribution of stresses across the TAB tape upon exposure to varying temperatures.

Abstract: A premolded battery package supports a volatile memory chip and a replaceable backup battery for preserving data in the event of loss of main power supply. The package includes an integrally formed external socket for receiving a replaceable backup battery which can be manually inserted into or removed from the socket after molding encapsulation and metal trim work have been completed. The socket assembly includes an interface battery cavity which permits the negative terminal of a backup battery to engage a negative power finger lead. The positive battery terminal is engaged by a resilient terminal contact portion of a positive finger lead which projects externally of the molded package. The terminal contact portion of the positive power lead serves as a retainer in combination with socket shoulder portions for retaining the backup battery within the socket.

Abstract: A semiconductor device is provided with a polyimide film 21 between the encapsulating synthetic resin 16 and the passivating film 20. If a material having a high hardness (E-modulus.gtoreq.1.0.multidot.10.sup.10 Pa) is selected as the polyimide, the number of defects caused by variations in temperature is reduced.

Abstract: An electron emitting device is provided for use in a flat display, an electron beam drawing apparatus, a CRT display and so on. The electron emitting device comprises a first layer having a first bandgap, a second layer formed on the first layer and having the first bandgap, a third layer formed on the second layer and having a second bandgap, which is narrower than the first bandgap, and a fourth layer formed on the third layer and having an electron emitting surface. According to this structure, a high electron emission efficiency can be obtained.

Abstract: A hybrid integrated circuit device is provided with: a microcomputer, a plurality of peripheral circuit elements, and a non-volatile memory which is positioned adjacent to the microcomputer, all of which are interconnected by a plurality of specified conductive paths; pair of integrated circuit substrates on which is formed the conductive paths and a casing provided with the pair of integrated circuit substrates secured to the upper and lower surfaces of the casing, forming a sealed space between these surfaces. The microcomputer and the peripheral circuit elements are positioned in the sealed space and only the non-volatile memory is positioned in an exposed space. The hybrid integrated circuit device of the present invention has a compact and simple form with a high degree of mounting density as well as superior handling capabilities and reliability.

Abstract: A semiconductor sensor with a compact structure is provided, which comprises a semiconductor substrate, a semiconductor diaphragm integrally formed with the semiconductor substrate, and a penetrating aperture formed in the semiconductor substrate so as to surround desired sides of the diaphragm. The aperture has first and second funnel-shaped aperatures whose intersecting conic sections open toward opposite directions. A cavity for defining the diaphragm is provided when the semiconductor substrate is subjected to electrolytic etching to form the second funnel-shaped aperture therein.

Abstract: An optical semiconductor device includes a semiconductor laser buried with a current blocking layer, and a photodetector, such as a phototransistor, which are provided on a semiconductor substrate. In such a device, the photodetector has the same thickness and composition as those of the current blocking layer, and a groove is provided in the semiconductor substrate to define an emitting end surface of the semiconductor laser and a light detection surface of the photodetector opposed to each other.

Abstract: A resin-sealed semiconductor device, including a chip mounting die pad, porous fluorocarbon material located just beneath the die pad, beneath a die-pad supporting layer, gold lead wires, or in a sealing resin surrounding the other components, wherein any water vapor generated by the heat of soldering will be held within the porous fluorocarbon rather than crack the sealant under internal pressure.

Abstract: An optical package particularly suited for use with a pair of optical devices is disclosed. In a preferred embodiment, the package may house an optical transmitting device and an optical receiving device such that the package forms a transceiver. The package advantageously utilizes a number of molded plastic piece parts to reduce the package cost and simplify construction. By utilizing molded components, optical alignment within the package is automatically achieved.

Abstract: A bistable switching element is made of a material whose electrical resistance reversibly decreases in response to intercalation by positive ions. Flow of positive ions between the bistable switching element and a positive ion source is controlled by means of an electrical potential applied across a thermal switching element. The material of the thermal switching element generates heat in response to electrical current flow therethrough, which in turn causes the material to undergo a thermal phase transition from a high electrical resistance state to a low electrical resistance state as the temperature increases above a predetermined value. Application of the electrical potential in one direction renders the thermal switching element conductive to pass electron current out of the ion source. This causes positive ions to flow from the source into the bistable switching element and intercalate the same to produce a non-volatile, low resistance logic state.